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path: root/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardGpios.h
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Diffstat (limited to 'Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardGpios.h')
-rw-r--r--Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardGpios.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardGpios.h b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardGpios.h
index e0bdde8739..d72cd80c91 100644
--- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardGpios.h
+++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardGpios.h
@@ -80,13 +80,13 @@ BXT_GPIO_PAD_INIT mBenson_GpioInitData_N[] =
BXT_GPIO_PAD_CONF(L"GPIO_14", M1 , NA , NA , NA , NA , Wake_Disabled, P_20K_L, NA , NA ,NA , NA, GPIO_PADBAR+0x0070, NORTH),//Feature: LB
BXT_GPIO_PAD_CONF(L"GPIO_15", M1 , NA , NA , NA , NA , Wake_Disabled, P_20K_L, NA , NA ,NA , NA, GPIO_PADBAR+0x0078, NORTH),//Feature: LB
BXT_GPIO_PAD_CONF(L"GPIO_16", M0 , GPI , NA , NA , Edge , Wake_Disabled, P_20K_H, Inverted,IOAPIC, HizRx0I ,DisPuPd, GPIO_PADBAR+0x0080, NORTH),//Feature:SIM Card Detect Net in Sch: SIM_CON_CD1, falling edge trigger
- BXT_GPIO_PAD_CONF(L"GPIO_17", M1 , NA , NA , NA , NA , Wake_Disabled, P_20K_H, NA , NA, NA , NA, GPIO_PADBAR+0x0088, NORTH),//Feature: LB
+ BXT_GPIO_PAD_CONF(L"GPIO_17", M0 , GPI , GPIO_D, NA , Edge , Wake_Disabled, P_NONE , NA ,IOAPIC, NA ,DisPuPd, GPIO_PADBAR+0x0088, NORTH), // SOC_LSE_HOST_IRQ_N
BXT_GPIO_PAD_CONF(L"GPIO_18", M1 , NA , NA , NA , NA , Wake_Disabled, P_20K_H, NA , NA, NA , NA, GPIO_PADBAR+0x0090, NORTH),//Feature: LB
BXT_GPIO_PAD_CONF(L"GPIO_19", M1 , NA , NA , NA , NA , Wake_Disabled, P_20K_H, NA , NA, NA , NA, GPIO_PADBAR+0x0098, NORTH),//Feature: LB
BXT_GPIO_PAD_CONF(L"GPIO_20", M1 , NA , NA , NA , NA , Wake_Disabled, P_20K_L, NA , NA, NA , NA, GPIO_PADBAR+0x00A0, NORTH),//Feature: LB
BXT_GPIO_PAD_CONF(L"GPIO_21", M1 , NA , NA , NA , NA , Wake_Disabled, P_20K_L, NA , NA, NA , NA, GPIO_PADBAR+0x00A8, NORTH),//Feature: LB
BXT_GPIO_PAD_CONF(L"GPIO_22", M0 , GPIO ,GPIO_D , NA , NA , Wake_Disabled, P_20K_L, NA , NA, NA , NA, GPIO_PADBAR+0x00B0, NORTH),//Feature: LB
- BXT_GPIO_PAD_CONF(L"GPIO_23", M0 , GPIO ,GPIO_D , NA , NA , Wake_Disabled, P_20K_L, NA , NA, NA , NA, GPIO_PADBAR+0x00B8, NORTH),//Feature: LB USB Power in LFH
+ BXT_GPIO_PAD_CONF(L"GPIO_23", M0 , GPO ,GPIO_D, LO , NA , Wake_Disabled, P_20K_H, NA , NA, NA , EnPu, GPIO_PADBAR+0x00B8, NORTH), // SOC_SUE_RST_N
BXT_GPIO_PAD_CONF(L"GPIO_24", M0 , GPO ,GPIO_D , NA , NA , Wake_Disabled, P_20K_H, NA , NA, NA , NA, GPIO_PADBAR+0x00C0, NORTH),//SATA_DEVSLP0
BXT_GPIO_PAD_CONF(L"GPIO_25", M0 , GPO ,GPIO_D , NA , Level , Wake_Disabled, P_20K_H, Inverted, SCI, NA , NA, GPIO_PADBAR+0x00C8, NORTH),//Feature:ODD MD/DA SCI Net in Sch: SATA_ODD_DA_IN
BXT_GPIO_PAD_CONF(L"GPIO_26", M0 , GPIO ,GPIO_D , NA , NA , Wake_Disabled, P_20K_L, NA , NA, NA , NA, GPIO_PADBAR+0x00D0, NORTH),//SATA_LEDN