diff options
Diffstat (limited to 'Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt')
19 files changed, 1690 insertions, 0 deletions
diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Audio/AudioCodec_INT343A.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Audio/AudioCodec_INT343A.asl new file mode 100644 index 0000000000..a1756ec6ef --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Audio/AudioCodec_INT343A.asl @@ -0,0 +1,57 @@ +/** @file
+ Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+External(\IOBF, IntObj) // ScHdAudioIoBufferOwnership
+External(\IS3A, IntObj)
+
+Scope(\_SB.PCI0.I2C0) {
+ //-----------------------------------
+ // HD Audio I2S Codec device
+ // ALC 298
+ // I2C1
+ // GPIO_192:SOC_CODEC_PD_N North West Community number 5
+ // GPIO_116:SOC_CODEC_IRQ North West Community, direct IRQ, IRQ number 0x5B.
+ //-----------------------------------
+ Device (HDAC)
+ {
+ Name (_HID, "INT343A")
+ Name (_CID, "INT343A")
+ Name (_DDN, "Intel(R) Smart Sound Technology Audio Codec")
+ Name (_UID, 1)
+ Name (CADR, 0) // Codec I2C address
+
+ Method(_INI) {
+ }
+
+ Method (_CRS, 0, Serialized) {
+ Name (SBFB, ResourceTemplate () {
+ I2cSerialBus (0x1C, ControllerInitiated, 400000, AddressingMode7Bit, "\\_SB.PCI0.I2C0",,,)
+ })
+
+ Name (SBFI, ResourceTemplate () {
+ Interrupt (ResourceConsumer, Level, ActiveLow, ExclusiveAndWake,,,) {0x5B}
+ })
+
+ Return (ConcatenateResTemplate(SBFB, SBFI))
+ }
+
+ Method (_STA, 0, NotSerialized)
+ {
+ If (LAnd (LEqual (IOBF, 3), LEqual(IS3A, 1))) {
+ Return (0xF) // I2S Codec Enabled
+ }
+ Return (0)
+ }
+ } // Device (HDAC)
+}
+
diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Audio/AudioCodec_INT34C1.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Audio/AudioCodec_INT34C1.asl new file mode 100644 index 0000000000..562f3bd0f2 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Audio/AudioCodec_INT34C1.asl @@ -0,0 +1,57 @@ +/** @file
+ Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+External(\ISC1, IntObj)
+
+Scope(\_SB.PCI0.I2C1)
+{
+ Device (ACD0) // Audio Codec driver I2C
+ {
+ Name (_ADR, 0x38)
+ Name (_HID, "INT34C1")
+ Name (_CID, "INT34C1")
+ Name (_DDN, "Intel(R) Smart Sound Technology Audio Codec" )
+ Name (_UID, 1)
+
+ Method(_CRS, 0x0, Serialized)
+ {
+ Name(SBUF,ResourceTemplate ()
+ {
+ I2CSerialBus(
+ 0x38, // SlaveAddress: bus address
+ , // SlaveMode: default to ControllerInitiated
+ 400000, // ConnectionSpeed: in Hz
+ , // Addressing Mode: default to 7 bit
+ "\\_SB.PCI0.I2C1", // ResourceSource: I2C bus controller name
+ , // Descriptor Name: creates name for offset of resource descriptor
+ ) // VendorData
+ GpioInt(Level, ActiveLow, ExclusiveAndWake, PullUp, 0,"\\_SB.GPO1") {69} // SOC_CODEC_IRQ
+ })
+ Return (SBUF)
+ }
+
+ Method (_STA, 0x0, NotSerialized)
+ {
+ If (LEqual (ISC1, 1)) {
+ Return (0xF) // I2S Codec Enabled
+ }
+ Return (0)
+ }
+
+ Method (_DIS, 0x0, NotSerialized)
+ {
+ }
+
+ } // Device (ACD0)
+}
+
diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Bluetooth/Bluetooth_BCM2E40.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Bluetooth/Bluetooth_BCM2E40.asl new file mode 100644 index 0000000000..a001d67357 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Bluetooth/Bluetooth_BCM2E40.asl @@ -0,0 +1,55 @@ +/** @file
+ Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+Scope(\_SB.PCI0.URT1)
+{
+ Device(BTH0) {
+ Method(_HID) {
+ // Return HID based on BIOS Setup
+ Return("BCM2EA8")
+ }
+
+ Method(_INI) {
+ }
+
+ Method(_CRS, 0x0, Serialized) {
+ Name(SBFG, ResourceTemplate (){
+ UARTSerialBus(115200,,,0xc0,,,FlowControlHardware,32,32,"\\_SB.PCI0.URT1" )
+ GpioIo(Exclusive, PullDown, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO1", ) {27} // North-west(27):GPIO_214 NGFF_BT_DEV_WAKE_N
+ GpioIo(Exclusive, PullDown, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO2", ) {24} // West(24):GPIO_154, BT_DISABLE2_1P8_N
+ GpioInt (Level, ActiveLow, Exclusive, PullDefault, 0x0000, "\\_SB.GPO1", 0x00, ResourceConsumer, ) {35}
+ })
+
+ Name(SBFI, ResourceTemplate () {
+ UARTSerialBus(115200,,,0xc0,,,FlowControlHardware,32,32,"\\_SB.PCI0.URT1" )
+ GpioIo(Exclusive, PullDown, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO1", ) {27} // North-west(27):GPIO_214 NGFF_BT_DEV_WAKE_N
+ GpioIo(Exclusive, PullDown, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO2", ) {24} // West(24):GPIO_154, BT_DISABLE2_1P8_N
+ Interrupt(ResourceConsumer, Level, ActiveLow, Exclusive, ) {0x34}
+ })
+
+ If(LLess(OSYS,2012)) { return (SBFI) } // For Windows 7 only report Interrupt; it doesn't support ACPI5.0 and wouldn't understand GpioInt nor I2cBus
+ Return (SBFG)
+ }
+
+ Method (_STA, 0x0, NotSerialized) {
+ If (LEqual (SBTD, 1)) {
+ Return (0xF)
+ }
+ Return (0)
+ }
+
+ Name (_S0W, 2) // required to put the device to D2 during S0 idle
+ } // Device BTH0
+
+} // end Scope(\_SB.PCI0.URT1)
+
diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Bluetooth/Bluetooth_BCM2EA1.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Bluetooth/Bluetooth_BCM2EA1.asl new file mode 100644 index 0000000000..815c6d3a98 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Bluetooth/Bluetooth_BCM2EA1.asl @@ -0,0 +1,55 @@ +/** @file
+ Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+Scope(\_SB.PCI0.URT1)
+{
+ Device(BTH0) {
+ Method(_HID) {
+ // Return HID based on BIOS Setup
+ Return("BCM2EA1")
+ }
+
+ Method(_INI) {
+ }
+
+ Method(_CRS, 0x0, Serialized) {
+ Name(SBFG, ResourceTemplate (){
+ UARTSerialBus(115200,,,0xc0,,,FlowControlHardware,32,32,"\\_SB.PCI0.URT1" )
+ GpioIo(Exclusive, PullDown, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO1", ) {27} // North-west(27):GPIO_214 NGFF_BT_DEV_WAKE_N
+ GpioIo(Exclusive, PullDown, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO2", ) {24} // West(24):GPIO_154, BT_DISABLE2_1P8_N
+ GpioInt (Level, ActiveLow, Exclusive, PullDefault, 0x0000, "\\_SB.GPO1", 0x00, ResourceConsumer, ) {35}
+ })
+
+ Name(SBFI, ResourceTemplate () {
+ UARTSerialBus(115200,,,0xc0,,,FlowControlHardware,32,32,"\\_SB.PCI0.URT1" )
+ GpioIo(Exclusive, PullDown, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO1", ) {27} // North-west(27):GPIO_214 NGFF_BT_DEV_WAKE_N
+ GpioIo(Exclusive, PullDown, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO2", ) {24} // West(24):GPIO_154, BT_DISABLE2_1P8_N
+ Interrupt(ResourceConsumer, Level, ActiveLow, Exclusive, ) {0x34}
+ })
+
+ If(LLess(OSYS,2012)) { return (SBFI) } // For Windows 7 only report Interrupt; it doesn't support ACPI5.0 and wouldn't understand GpioInt nor I2cBus
+ Return (SBFG)
+ }
+
+ Method (_STA, 0x0, NotSerialized) {
+ If (LEqual (SBTD, 2)) {
+ Return (0xF)
+ }
+ Return (0)
+ }
+
+ Name (_S0W, 2) // required to put the device to D2 during S0 idle
+ } // Device BTH0
+
+} // end Scope(\_SB.PCI0.URT1)
+
diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Camera/Camera_INT3471.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Camera/Camera_INT3471.asl new file mode 100644 index 0000000000..585e49d1fd --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Camera/Camera_INT3471.asl @@ -0,0 +1,187 @@ +/** @file
+ Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+Scope(\_SB.PCI0.I2C2)
+{
+ Device (PMC1) {
+ Name (_ADR, Zero)
+ Name (_HID, "INT3472")
+ Name (_CID, "INT3472")
+ Name (_DDN, "INCL-CRDD")
+ Name (_UID, "0")
+
+ Method (_CRS, 0x0, Serialized) {
+ Name (SBUF, ResourceTemplate() {
+ GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,
+ "\\_SB.GPO0", 0x00, ResourceConsumer, ,) {
+ 0x37 // GPIO_67
+ }
+ GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,
+ "\\_SB.GPO0", 0x00, ResourceConsumer, ,) {
+ 0x3C // GPIO_72
+ }
+ })
+
+ Return (SBUF)
+ }
+
+ Method (_STA, 0, NotSerialized) {
+ If (LEqual (WCAS, 2)) { // 2-IMX135
+ Return (0x0F)
+ }
+ Return (0x0)
+ }
+
+ Method (CLDB, 0, Serialized) {
+ Name (PAR, Buffer(0x20) {
+ 0x00, //Version
+ 0x01, //Control logic Type 0: UNKNOWN 1: DISCRETE 2: PMIC TPS68470 3: PMIC uP6641
+ 0x00, //Control logic ID: Control Logic 0
+ 0x70, //CRD board Type, 0: UNKNOWN 0x20: CRD-D 0x30: CRD-G 0x40: PPV 0x50: CRD-G2 0x70: CRD_G_BXT
+ 0x00, 0x00, 0x00, 0x00, // Reserved
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // Reserved
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // Reserved
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // Reserved
+ })
+ Return (PAR)
+ }
+
+ Method (_DSM, 4, NotSerialized) {
+ If (LEqual (Arg0, ToUUID("79234640-9E10-4FEA-A5C1-B5AA8B19756F"))) {
+ If (LEqual (Arg2, One)) {
+ Return (0x02) // number
+ }
+ If (LEqual (Arg2, 0x02)) {
+ Return (0x01004300) // RESET
+ }
+ If (LEqual (Arg2, 0x03)) {
+ Return (0x01004801) // POWER DOWN
+ }
+ }
+ Return (Zero)
+ }
+ }
+
+ //
+ // Rear Camera IMX135
+ //
+ Device (CAM1) {
+ Name (_ADR, Zero)
+ Name (_HID, "INT3471")
+ Name (_CID, "INT3471")
+ Name (_SUB, "INTL0000")
+ Name (_DDN, "SONY IMX135")
+ Name (_UID, One)
+ Name (_DEP, Package () {
+ \_SB.PCI0.I2C2.PMC1
+ })
+ Name (PLDB, Package(1) {
+ Buffer(0x14)
+ {
+ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x69, 0x0C, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
+ 0xFF, 0xFF, 0xFF, 0xFF
+ }
+ })
+ Method (_PLD, 0, Serialized) {
+ CreateField(DerefOf(Index(PLDB,0)), 115, 4, RPOS) // Rotation field
+ Store(CROT, RPOS)
+
+ Return(PLDB)
+ }
+
+ Method (_STA, 0, NotSerialized) {
+ If(LEqual (WCAS, 2)) { // 2-IMX135
+ Return (0x0F)
+ }
+ Return (0x0)
+ }
+
+ Method (SSDB, 0, Serialized) {
+ Name (PAR, Buffer(0x6C) {
+ 0x00, //Version
+ 0x70, //SKU: CRD_G_BXT
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, //GUID for CSI2 host controller
+ 0x00, //DevFunction
+ 0x00, //Bus
+ 0x00, 0x00, 0x00, 0x00, //DphyLinkEnFuses
+ 0x00, 0x00, 0x00, 0x00, //ClockDiv
+ 0x06, //LinkUsed
+ 0x04, //LaneUsed
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_TERMEN_CLANE
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_SETTLE_CLANE
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_TERMEN_DLANE0
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_SETTLE_DLANE0
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_TERMEN_DLANE1
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_SETTLE_DLANE1
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_TERMEN_DLANE2
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_SETTLE_DLANE2
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_TERMEN_DLANE3
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_SETTLE_DLANE3
+ 0x00, 0x00, 0x00, 0x00, //MaxLaneSpeed
+ 0x00, //SensorCalibrationFileIdx
+ 0x00, 0x00, 0x00, //SensorCalibrationFileIdxInMBZ
+ 0x00, //RomType: NONE
+ 0x03, //VcmType: AD5816
+ 0x08, //Platform info BXT
+ 0x00, //Platform sub info
+ 0x03, //Flash ENABLED
+ 0x00, //Privacy LED not supported
+ 0x00, //0 degree
+ 0x01, //MIPI link/lane defined in ACPI
+ 0x00, 0xF8, 0x24, 0x01, // MCLK: 19200000Hz
+ 0x00, //Control logic ID
+ 0x00, 0x00, 0x00,
+ 0x02, // M_CLK Port
+ 0x00, 0x00, 0x00, //Reserved
+ 0x00, 0x00, 0x00, 0x00, 0x00, //Reserved
+ 0x00, 0x00, 0x00, 0x00, 0x00, //Reserved
+ })
+ Return (PAR)
+ }
+
+ Method (_CRS, 0, Serialized) {
+ Name (SBUF, ResourceTemplate() {
+ I2CSerialBus(0x0010, ControllerInitiated, 0x00061A80, AddressingMode7Bit,
+ "\\_SB.PCI0.I2C2", 0x00, ResourceConsumer,,)
+ I2CSerialBus(0x000E, ControllerInitiated, 0x00061A80, AddressingMode7Bit,
+ "\\_SB.PCI0.I2C2", 0x00, ResourceConsumer,,)
+ })
+ Return(SBUF)
+ }
+
+ Method (_DSM, 4, NotSerialized)
+ {
+ If (LEqual (Arg0, ToUUID ("822ACE8F-2814-4174-A56B-5F029FE079EE"))) {
+ Return("13P2BAD33")
+ }
+
+ If (LEqual (Arg0, ToUUID ("26257549-9271-4CA4-BB43-C4899D5A4881"))) {
+ If (LEqual (Arg2, One)) {
+ Return (0x02)
+ }
+ If (LEqual (Arg2, 0x02)) {
+ // I2C 0:bit31-24:BUS. 23-16:Speed.15-8:Addr. 0-7:Function
+ Return (0x02001000) // SENSOR
+ }
+ If (LEqual (Arg2, 0x03)) {
+ // I2C 0:bit31-24:BUS. 23-16:Speed.15-8:Addr. 0-7:Function
+ Return (0x02000E01) // VCM
+ }
+ }
+
+ Return(Zero)
+ }
+ }
+} // Scope(\_SB.PCI0.I2C2)
+
diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Camera/Camera_INT3474.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Camera/Camera_INT3474.asl new file mode 100644 index 0000000000..b3c6be7a24 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Camera/Camera_INT3474.asl @@ -0,0 +1,196 @@ +/** @file
+ Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+Scope(\_SB.PCI0.I2C0)
+{
+ Device(PMC0)
+ {
+ Name(_ADR, Zero)
+ Name(_HID, "INT3472")
+ Name(_CID, "INT3472")
+ Name(_DDN, "INCL-CRDD")
+ Name(_UID, "1")
+
+ Method(_CRS, 0x0, Serialized)
+ {
+ Name(SBUF, ResourceTemplate()
+ {
+ GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,
+ "\\_SB.GPO0", 0x00, ResourceConsumer, ,)
+ { // Pin list
+ 0x35 // GPIO_65
+ }
+ GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,
+ "\\_SB.GPO0", 0x00, ResourceConsumer, ,)
+ { // Pin list
+ 0x3B // GPIO_71
+ }
+ })
+ Return (SBUF)
+ }
+
+ Method(_STA, 0, NotSerialized) // _STA: Status
+ {
+ If (LEqual (UCAS, 1)) { // 1-OV2740
+ Return (0x0F)
+ } else {
+ Return (0x0)
+ }
+ }
+ Method(CLDB, 0, Serialized)
+ {
+ Name(PAR, Buffer(0x20)
+ {
+ 0x00, //Version
+ 0x01, //Control logic Type 0: UNKNOWN 1: DISCRETE 2: PMIC TPS68470 3: PMIC uP6641
+ 0x01, //Control logic ID: Control Logic 1
+ 0x70, //CRD board Type, 0: UNKNOWN 0x20: CRD-D 0x30: CRD-G 0x40: PPV 0x50: CRD-G2 0x70: CRD_G_BXT
+ 0x00, 0x00, 0x00, 0x00, // Reserved
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // Reserved
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // Reserved
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // Reserved
+ })
+ Return (PAR)
+ }
+
+ Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
+ {
+ If (LEqual (Arg0, ToUUID("79234640-9E10-4FEA-A5C1-B5AA8B19756F"))) {
+ If (LEqual (Arg2, One)) {
+ Return (0x02) // number
+ }
+ If (LEqual (Arg2, 0x02)) {
+ Return (0x01004100) // RESET
+ }
+ If (LEqual (Arg2, 0x03)) {
+ Return (0x01004701) // POWER DOWN
+ }
+ }
+ Return (Zero)
+ }
+ }
+
+ Device(CAM0)
+ {
+ Name(_ADR, Zero)
+ Name(_HID, "INT3474")
+ Name(_CID, "INT3474")
+ Name(_SUB, "INTL0000")
+ Name(_DDN, "OV2740")
+ Name(_UID, One)
+
+ Name (_DEP, Package () // _DEP: Dependencies
+ {
+ \_SB.PCI0.I2C0.PMC0
+ })
+
+ Name(PLDB, Package(1)
+ {
+ Buffer(0x14)
+ {
+ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x61, 0x0C, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
+ 0xFF, 0xFF, 0xFF, 0xFF
+ }
+ })
+
+ Method(_PLD, 0, Serialized)
+ {
+ CreateField(DerefOf(Index(PLDB,0)), 115, 4, RPOS) // Rotation field
+ Store(CROT, RPOS)
+
+ Return(PLDB)
+ }
+
+ Method(_STA, 0, NotSerialized)
+ {
+ If (LEqual (UCAS, 1)) { // 1-OV2740
+ Return (0x0F)
+ } else {
+ Return (0x0)
+ }
+ }
+ Method(SSDB, 0, Serialized)
+ {
+ Name(PAR, Buffer(0x6C)
+ {
+ 0x00, //Version
+ 0x70, //SKU: CRD_G_BXT
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, //GUID for CSI2 host controller
+ 0x00, //DevFunction
+ 0x00, //Bus
+ 0x00, 0x00, 0x00, 0x00, //DphyLinkEnFuses
+ 0x00, 0x00, 0x00, 0x00, //ClockDiv
+ 0x02, //LinkUsed
+ 0x02, //LaneUsed
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_TERMEN_CLANE
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_SETTLE_CLANE
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_TERMEN_DLANE0
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_SETTLE_DLANE0
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_TERMEN_DLANE1
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_SETTLE_DLANE1
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_TERMEN_DLANE2
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_SETTLE_DLANE2
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_TERMEN_DLANE3
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_SETTLE_DLANE3
+ 0x00, 0x00, 0x00, 0x00, //MaxLaneSpeed
+ 0x00, //SensorCalibrationFileIdx
+ 0x00, 0x00, 0x00, //SensorCalibrationFileIdxInMBZ
+ 0x00, //RomType: NONE
+ 0x00, //VcmType: none
+ 0x08, //Platform info BXT
+ 0x00, //Platform sub info
+ 0x02, //Flash none
+ 0x00, //Privacy LED not supported
+ 0x00, //0 degree
+ 0x01, //MIPI link/lane defined in ACPI
+ 0x00, 0xF8, 0x24, 0x01, // MCLK: 19200000Hz
+ 0x01, //Control logic ID
+ 0x00, 0x00, 0x00,
+ 0x01, // M_CLK
+ 0x00, 0x00, 0x00, //Reserved
+ 0x00, 0x00, 0x00, 0x00, 0x00, //Reserved
+ 0x00, 0x00, 0x00, 0x00, 0x00, //Reserved
+ })
+ Return (PAR)
+ }
+
+ Method(_CRS, 0, Serialized)
+ {
+ Name(SBUF, ResourceTemplate()
+ {
+ I2CSerialBus(0x0036, ControllerInitiated, 0x00061A80, AddressingMode7Bit,
+ "\\_SB.PCI0.I2C0", 0x00, ResourceConsumer,,)
+ })
+ Return(SBUF)
+ }
+
+ Method(_DSM, 4, NotSerialized)
+ {
+ If (LEqual(Arg0, ToUUID("822ACE8F-2814-4174-A56B-5F029FE079EE"))) {
+ Return("4SF259T2")
+ }
+ If (LEqual(Arg0, ToUUID("26257549-9271-4CA4-BB43-C4899D5A4881"))) {
+ If (LEqual(Arg2, One)) {
+ Return(One)
+ }
+ If (LEqual(Arg2, 0x02)) {
+ // I2C 0:bit31-24:BUS. 23-16:Speed.15-8:Addr. 0-7:Function
+ Return(0x00003600) // SENSOR
+ }
+ }
+ Return(Zero)
+ }
+ }
+}
+
diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Camera/Camera_Sony214A.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Camera/Camera_Sony214A.asl new file mode 100644 index 0000000000..721e867b8b --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Camera/Camera_Sony214A.asl @@ -0,0 +1,188 @@ +/** @file
+ Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+Scope(\_SB.PCI0.I2C2)
+{
+ Device (PMC2) {
+ Name (_ADR, Zero)
+ Name (_HID, "INT3472")
+ Name (_CID, "INT3472")
+ Name (_DDN, "INCL-CRDD")
+ Name (_UID, "0")
+
+ Method (_CRS, 0x0, Serialized) {
+ Name (SBUF, ResourceTemplate() {
+ GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,
+ "\\_SB.GPO0", 0x00, ResourceConsumer, ,) {
+ 0x37 // GPIO_67
+ }
+
+ GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,
+ "\\_SB.GPO0", 0x00, ResourceConsumer, ,) {
+ 0x3C // GPIO_72
+ }
+ })
+ Return (SBUF)
+ }
+
+ Method (_STA, 0, NotSerialized) {
+ If (LEqual (WCAS, 1)) { // 1-IMX214
+ Return (0x0F)
+ }
+ Return (0x0)
+ }
+
+ Method (CLDB, 0, Serialized) {
+ Name (PAR, Buffer(0x20) {
+ 0x00, //Version
+ 0x01, //Control logic Type 0: UNKNOWN 1: DISCRETE 2: PMIC TPS68470 3: PMIC uP6641
+ 0x00, //Control logic ID: Control Logic 0
+ 0x70, //CRD board Type, 0: UNKNOWN 0x20: CRD-D 0x30: CRD-G 0x40: PPV 0x50: CRD-G2 0x70: CRD_G_BXT
+ 0x00, 0x00, 0x00, 0x00, // Reserved
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // Reserved
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // Reserved
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // Reserved
+ })
+ Return (PAR)
+ }
+
+ Method (_DSM, 4, NotSerialized) {
+ If (LEqual (Arg0, ToUUID("79234640-9E10-4FEA-A5C1-B5AA8B19756F"))) {
+ If (LEqual (Arg2, One)) {
+ Return (0x02) // number
+ }
+ If (LEqual (Arg2, 0x02)) {
+ Return (0x01004300) // RESET
+ }
+ If (LEqual (Arg2, 0x03)) {
+ Return (0x01004801) // POWER DOWN
+ }
+ }
+ Return (Zero)
+ }
+ }
+
+ //
+ // Rear Camera IMX214A
+ //
+ Device (CAM2) {
+ Name (_ADR, Zero)
+ Name (_HID, "SONY214A")
+ Name (_CID, "SONY214A")
+ Name (_SUB, "INTL0000")
+ Name (_DDN, "SONY IMX214")
+ Name (_UID, One)
+
+ Name (_DEP, Package () {
+ \_SB.PCI0.I2C2.PMC2
+ })
+
+ Name (PLDB, Package(1) {
+ Buffer(0x14)
+ {
+ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x69, 0x0C, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
+ 0xFF, 0xFF, 0xFF, 0xFF
+ }
+ })
+ Method (_PLD, 0, Serialized) {
+ CreateField(DerefOf(Index(PLDB,0)), 115, 4, RPOS) // Rotation field
+ Store(CROT, RPOS)
+
+ Return(PLDB)
+ }
+
+ Method (_STA, 0, NotSerialized) {
+ If (LEqual (WCAS, 1)) { // 1-IMX214
+ Return (0x0F)
+ }
+ Return (0x0)
+ }
+
+ Method (SSDB, 0, Serialized) {
+ Name (PAR, Buffer(0x6C) {
+ 0x00, //Version
+ 0x70, //SKU: CRD_G_BXT
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, //GUID for CSI2 host controller
+ 0x00, //DevFunction
+ 0x00, //Bus
+ 0x00, 0x00, 0x00, 0x00, //DphyLinkEnFuses
+ 0x00, 0x00, 0x00, 0x00, //ClockDiv
+ 0x06, //LinkUsed
+ 0x04, //LaneUsed
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_TERMEN_CLANE
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_SETTLE_CLANE
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_TERMEN_DLANE0
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_SETTLE_DLANE0
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_TERMEN_DLANE1
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_SETTLE_DLANE1
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_TERMEN_DLANE2
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_SETTLE_DLANE2
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_TERMEN_DLANE3
+ 0x00, 0x00, 0x00, 0x00, //CSI_RX_DLY_CNT_SETTLE_DLANE3
+ 0x00, 0x00, 0x00, 0x00, //MaxLaneSpeed
+ 0x00, //SensorCalibrationFileIdx
+ 0x00, 0x00, 0x00, //SensorCalibrationFileIdxInMBZ
+ 0x00, //RomType: NONE
+ 0x02, //VcmType: DW9714A
+ 0x08, //Platform info BXT
+ 0x00, //Platform sub info
+ 0x03, //Flash ENABLED
+ 0x00, //Privacy LED not supported
+ 0x00, //0 degree
+ 0x01, //MIPI link/lane defined in ACPI
+ 0x00, 0xF8, 0x24, 0x01, // MCLK: 19200000Hz
+ 0x00, //Control logic ID
+ 0x00, 0x00, 0x00,
+ 0x02, // M_CLK Port
+ 0x00, 0x00, 0x00, //Reserved
+ 0x00, 0x00, 0x00, 0x00, 0x00, //Reserved
+ 0x00, 0x00, 0x00, 0x00, 0x00, //Reserved
+ })
+ Return (PAR)
+ }
+
+ Method (_CRS, 0, Serialized) {
+ Name (SBUF, ResourceTemplate() {
+ I2CSerialBus(0x001A, ControllerInitiated, 0x00061A80, AddressingMode7Bit,
+ "\\_SB.PCI0.I2C2", 0x00, ResourceConsumer,,)
+ I2CSerialBus(0x000C, ControllerInitiated, 0x00061A80, AddressingMode7Bit,
+ "\\_SB.PCI0.I2C2", 0x00, ResourceConsumer,,)
+ })
+ Return(SBUF)
+ }
+
+ Method (_DSM, 4, NotSerialized)
+ {
+ If (LEqual (Arg0, ToUUID ("822ACE8F-2814-4174-A56B-5F029FE079EE"))) {
+ Return("P13N05BA")
+ }
+
+ If (LEqual (Arg0, ToUUID ("26257549-9271-4CA4-BB43-C4899D5A4881"))) {
+ If (LEqual (Arg2, One)) {
+ Return (0x02)
+ }
+ If (LEqual (Arg2, 0x02)) {
+ // I2C 0:bit31-24:BUS. 23-16:Speed.15-8:Addr. 0-7:Function
+ Return (0x02001A00) // SENSOR
+ }
+ If (LEqual (Arg2, 0x03)) {
+ // I2C 0:bit31-24:BUS. 23-16:Speed.15-8:Addr. 0-7:Function
+ Return (0x02000C01) // VCM
+ }
+ }
+ Return(Zero)
+ }
+ }
+} // Scope(\_SB.PCI0.I2C2)
+
diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Camera/Flash_TPS61311.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Camera/Flash_TPS61311.asl new file mode 100644 index 0000000000..b16fff32ab --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Camera/Flash_TPS61311.asl @@ -0,0 +1,93 @@ +/** @file
+ Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+Scope (\_SB.PCI0.I2C2)
+{
+ Device (STRB)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ Name (_HID, "INT3481") // _HID: Hardware ID
+ Name (_CID, "INT3481") // _CID: Compatible ID
+ Name (_SUB, "INTL0000") // _SUB: Subsystem ID
+ Name (_DDN, "Flash TPS61311") // _DDN: DOS Device Name
+ Name (_UID, Zero) // _UID: Unique ID
+ Name (PLDB, Package (0x01)
+ {
+ Buffer (0x14)
+ {
+ /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
+ /* 0008 */ 0x69, 0x0C, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, /* i....... */
+ /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF /* .... */
+ }
+ })
+
+ Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
+ {
+ Return (PLDB) /* \_SB_.PCI0.I2C2.STRB.PLDB */
+ }
+
+ Method (_STA, 0, NotSerialized) // _STA: Status
+ {
+ Return (0x0F)
+ }
+
+ Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
+ {
+ Name (SBUF, ResourceTemplate ()
+ {
+ GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,
+ "\\_SB.GPO0", 0x00, ResourceConsumer, ,
+ )
+ { // Pin list
+ 0x0036
+ }
+ I2cSerialBus (0x0033, ControllerInitiated, 0x00061A80,
+ AddressingMode7Bit, "\\_SB.PCI0.I2C2",
+ 0x00, ResourceConsumer, ,
+ )
+ })
+ Return (SBUF) /* \_SB_.PCI0.I2C2.STRB._CRS.SBUF */
+ }
+
+ Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
+ {
+ If (LEqual(Arg0,ToUUID ("377ba76a-f390-4aff-ab38-9b1bf33a3015"))) {
+ Return ("INT3481")
+ }
+ If (LEqual(Arg0,ToUUID ("3c62aaaa-d8e0-401a-84c3-fc05656fa28c"))) {
+ Return ("TPS61311")
+ }
+ If (LEqual(Arg0,ToUUID ("2959512a-028c-4646-b73d-4d1b5672fad8"))) {
+ Return ("BXT")
+ }
+ If (LEqual(Arg0,ToUUID ("26257549-9271-4ca4-bb43-c4899d5a4881"))) {
+ If (LEqual(Arg2,One)) {
+ Return (One)
+ }
+ If (LEqual(Arg2,0x02)) {
+ Return (0x02003300)
+ }
+ }
+ If (LEqual(Arg0,ToUUID ("79234640-9e10-4fea-a5c1-b5aa8b19756f"))) {
+ If (LEqual(Arg2,One)) {
+ Return (One)
+ }
+ If (LEqual(Arg2,0x02)) {
+ Return (0x01003604)
+ }
+ }
+ Return (Zero)
+ }
+ }
+}
+
diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Fingerprint/Fingerprint_FPC.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Fingerprint/Fingerprint_FPC.asl new file mode 100644 index 0000000000..03d73f2d9c --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Fingerprint/Fingerprint_FPC.asl @@ -0,0 +1,50 @@ +/** @file
+ Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+External(\SDS1, IntObj)
+
+//-----------------------------
+// Serial IO SPI1 Controller
+//-----------------------------
+Scope(\_SB.PCI0.SPI1)
+{
+ Device(FPNT) {
+ Method(_HID) {
+ //
+ // Return FPS HID based on BIOS Setup
+ //
+ if (LEqual(SDS1, 1)) {Return ("FPC1020")}
+ if (LEqual(SDS1, 2)) {Return ("FPC1021")}
+ Return ("FPNT_DIS")
+ }
+
+ Method(_STA) {
+ //
+ // Is SerialIo SPI1 FPS enabled in BIOS Setup?
+ //
+ If (LNotEqual(SDS1, 0)) {
+ Return (0x0F)
+ }
+ Return (0x00)
+ }
+ Method(_CRS, 0x0, Serialized) {
+ Name(BBUF,ResourceTemplate () {
+ SPISerialBus(0x00,PolarityLow,FourWireMode,8,ControllerInitiated,3000000,ClockPolarityLow,ClockPhaseFirst,"\\_SB.PCI0.SPI1",,,SPIR)
+ GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO1",,,GSLP) {67} //North-west(67):GPIO_112 FGR_RESET_N
+ GpioInt (Edge, ActiveHigh, ExclusiveAndWake, PullDefault, 0x0000, "\\_SB.GPO0", 0x00, ResourceConsumer,GINT ) {14} //North(14):GPIO_14 : FGR_INT
+ })
+ Return (BBUF)
+ }
+ } // Device (FPNT)
+} // end Scope(\_SB.PCI0.SPI1)
+
diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Gps/Gps.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Gps/Gps.asl new file mode 100644 index 0000000000..f011d8e016 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Gps/Gps.asl @@ -0,0 +1,56 @@ +/** @file
+ Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+External(\GSBC, IntObj)
+
+Scope(\_SB.PCI0.URT2)
+{
+ Device(GPS1)//GPS for Windows OS.
+ {
+ Name(_HID, "BCM4752") //Vendor: test GPS device for BYT
+ Name(_HRV, 0x0001)
+
+ Method(_STA, 0x0, NotSerialized)
+ {
+ If (LEqual (GSBC, 1)) {
+ Return (0xF)
+ }
+ Return (0)
+ }
+
+ Method(_CRS, 0x0, Serialized)
+ {
+ // UARTSerial Bus Connection Descriptor
+ Name(BBUF, ResourceTemplate () {
+ UARTSerialBus(
+ 115200, // InitialBaudRate: in bits ber second
+ , // BitsPerByte: default to 8 bits
+ , // StopBits: Defaults to one bit
+ 0xfc, // LinesInUse: 8 1-bit flags to declare line enabled
+ , // IsBigEndian: default to LittleEndian
+ , // Parity: Defaults to no parity
+ FlowControlHardware, // FlowControl: Defaults to no flow control
+ 32, // ReceiveBufferSize
+ 32, // TransmitBufferSize
+ "\\_SB.PCI0.URT2", // ResourceSource: UART bus controller name
+ ,) // DescriptorName: creates name for offset of resource descriptor
+ //
+ //Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, , , ) {62} // GPS_HOSTREQ IRQ - 62
+ GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO1", ) {36} // GNSS_UART_WAKE_N
+ })
+ Return (BBUF)
+ }
+
+ } // Device GPS1
+}
+
diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Irmt.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Irmt.asl new file mode 100644 index 0000000000..c68e66467c --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Irmt.asl @@ -0,0 +1,99 @@ +/** @file
+ ACPI interface for Intel Ready Mode Technology(IRMT)
+
+ Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+DefinitionBlock (
+ "IrmtAcpi.aml",
+ "SSDT",
+ 2,
+ "Intel_",
+ "IrmtTabl",
+ 0x1000
+ )
+{
+ External(IRMC) // Irmt Configuration
+ External(\_SB.PCI0.GFX0.TCHE) // Technology enabled indicator
+ External(\_SB.PCI0.GFX0.STAT) // State Indicator
+
+ Scope (\_SB) {
+ Device (AOAA) {
+ Name (_HID, "INT3398")
+
+ Name (NSMD, 0x00) // Used to store mode settings:
+ /**
+ Bits Description
+ - (1:0) 00: Leave Never Sleep Mode;
+ 01: Enter Never Sleep Mode.
+ 10: Power Reduction Mode
+ 11: Enter Do Not Disturb mode.
+ - (7:2) Reserved: Set to 0.
+ **/
+
+ Method (_STA, 0)
+ {
+ //
+ //The Intel RMT ACPI device is a hidden device and
+ //listed under system devices on Device Manager.
+ //
+ Return (0x0B)
+ }
+
+ /**
+ GNSC - Get Never Sleep Configuration
+ Input: None
+ Return:
+ Bits Description
+ - 0 State(Never Sleep Enabling Status in BIOS): 0 = Disabled, 1 = Enabled
+ - 1 Notification(Hardware notification enabling status): 0 = Unsupported, 1 = Supported
+ - (7:2) Reserved: Set to 0.
+ **/
+ Method (GNSC, 0, NotSerialized, 0, IntObj) {
+ Return (IRMC)
+ }
+
+ /**
+ GNSM - Get Never Sleep Mode
+ Input: None
+ Return:
+ Bits Description
+ - (1:0) 00: Leave Never Sleep Mode;
+ 01: Enter Never Sleep Mode.
+ 10: Power Reduction Mode
+ 11: Enter Do Not Disturb mode.
+ - (7:2) Reserved: Set to 0.
+ **/
+ Method (GNSM, 0, NotSerialized, 0, IntObj) {
+ Return (NSMD)
+ }
+
+ /**
+ SNSM - Set Never Sleep Mode
+ Input:
+ Bits Description
+ - (1:0) 00: Leave Never Sleep Mode;
+ 01: Enter Never Sleep Mode.
+ 10: Power Reduction Mode
+ 11: Enter Do Not Disturb mode.
+ - (7:2) Reserved: Set to 0.
+ Return:
+ **/
+ Method (SNSM, 1, NotSerialized, 0, UnknownObj, IntObj) {
+ And(Arg0, 0x3, NSMD)
+ }
+
+ } // Device (AOAA)
+ } // Scope (\_SB)
+} // End SSDT
+
+
diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Nfc/Nfc.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Nfc/Nfc.asl new file mode 100644 index 0000000000..cd0f383da8 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Nfc/Nfc.asl @@ -0,0 +1,70 @@ +/** @file
+ Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/*
+NXP NPC100 non-secure NFC
+* I2C 1(0 based)
+* Slave address: 0x29
+* IRQ : GPIO_20, direct IRQ, level high
+* Reset : GPIO_150, output
+* Fw update : GPIO_27, output
+*/
+External(\NFCN, IntObj)
+
+Scope (\_SB.PCI0.I2C1)
+{
+ Device (NFC1)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ Name (_HID, EISAID("NXP1001")) // _HID: Hardware ID
+ Name (_DDN, "NXP NPC100") // _DDN: DOS Device Name
+ Name (_UID, One) // _UID: Unique ID
+
+ Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
+ {
+ Name (SBUF, ResourceTemplate ()
+ {
+ I2cSerialBus (0x29, ControllerInitiated, 0x00061A80,
+ AddressingMode7Bit, "\\_SB.PCI0.I2C1",
+ 0x00, ResourceConsumer, ,
+ )
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000077, // GPIO_20
+ }
+ GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,
+ "\\_SB.GPO0", 0x00, ResourceConsumer, ,
+ )
+ { // Pin list, GPIO_27
+ 0x001B
+ }
+ GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,
+ "\\_SB.GPO2", 0x00, ResourceConsumer, ,
+ )
+ { // Pin list, GPIO_150
+ 0x0014
+ }
+ })
+ Return (SBUF)
+ }
+
+ Method (_STA, 0, NotSerialized) // _STA: Status
+ {
+ If (LEqual (NFCN, 1)) {
+ Return (0xF)
+ }
+ Return (0)
+ }
+ } // Device (NFC1)
+} // Scope (\_SB.PCI0.I2C1)
+
diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/PSS/MonzaX2K_IMPJ0003.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/PSS/MonzaX2K_IMPJ0003.asl new file mode 100644 index 0000000000..c821139205 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/PSS/MonzaX2K_IMPJ0003.asl @@ -0,0 +1,51 @@ +/** @file
+ Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+External(\PSSI, IntObj)
+
+Scope(\_SB.PCI0.I2C7){
+//------------------------
+// PSS on I2C7
+//------------------------
+/*
+PSS: Monza_X-2K_Dura
+* GPIO: None
+* I2C bus: I2C 7 (0 based)
+* I2C slave address: 0x6E
+* I2C frequency: 400K
+* ACPI ID: IMPJ0003
+*/
+ Device (IMP3)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ Name (_HID, "IMPJ0003") // _HID: Hardware ID
+ Name (_CID, "IMPJ0003") // _CID: Compatible ID
+ Name (_UID, One) // _UID: Unique ID
+
+ Method(_STA, 0x0, NotSerialized) {
+ If (LEqual (PSSI, 1)) {
+ Return (0xF)
+ }
+ Return (0)
+ }
+
+ Method (_CRS, 0, Serialized) {
+ Name (SBUF, ResourceTemplate () {
+ I2cSerialBus (0x6E,ControllerInitiated,400000,AddressingMode7Bit,"\\_SB.PCI0.I2C7",0x00,ResourceConsumer,,)
+ })
+ Return (SBUF)
+ }
+
+ } // Device (IMP3)
+} //Scope(\_SB.PCI0.I2C7)
+
diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/PlatformSsdt.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/PlatformSsdt.asl new file mode 100644 index 0000000000..fd7feddf75 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/PlatformSsdt.asl @@ -0,0 +1,71 @@ +/** @file
+ Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+DefinitionBlock (
+ "PlatformSsdt.aml",
+ "SSDT",
+ 1,
+ "Intel_",
+ "PlatformTable",
+ 0x1000
+ )
+{
+ External(\_SB.PCI0.I2C0, DeviceObj)
+ External(\_SB.PCI0.I2C1, DeviceObj)
+ External(\_SB.PCI0.I2C2, DeviceObj)
+ External(\_SB.PCI0.I2C3, DeviceObj)
+ External(\_SB.PCI0.I2C4, DeviceObj)
+ External(\_SB.PCI0.I2C7, DeviceObj)
+ External(\_SB.PCI0.URT1, DeviceObj)
+ External(\_SB.PCI0.URT2, DeviceObj)
+ External(\_SB.PCI0.SDIO, DeviceObj)
+ External(\_SB.PCI0.SPI1, DeviceObj)
+ External(\_SB.GPO0.CWLE, IntObj)
+ External(\_SB.GPO0.AVBL, IntObj)
+ External(\_SB.PCI0.SDIO.PSTS, IntObj)
+ External(HIDG, MethodObj)
+ External(OSYS, IntObj)
+ External(SBTD, IntObj)
+ External(WCAS, IntObj)
+ External(UCAS, IntObj)
+ External(CROT, IntObj)
+ External(TP7G)
+ External(IPUD)
+
+ include ("Audio/AudioCodec_INT34C1.asl")
+ include ("Audio/AudioCodec_INT343A.asl")
+
+ If (LEqual(IPUD, 1)) {
+ include ("Camera/Camera_INT3471.asl")
+ include ("Camera/Camera_INT3474.asl")
+ include ("Camera/Camera_Sony214A.asl")
+ include ("Camera/Flash_TPS61311.asl")
+ }
+
+ include ("Touch/TouchPanel_I2C3.asl")
+ include ("Touch/TouchPads_I2C4.asl")
+
+ include ("PSS/MonzaX2K_IMPJ0003.asl")
+
+ include ("Bluetooth/Bluetooth_BCM2E40.asl")
+
+ include ("Wifi/WIFI_Broadcom1.asl")
+ include ("Wifi/WIFI_Broadcom2.asl")
+
+ include ("Gps/Gps.asl")
+
+ include ("Nfc/Nfc.asl")
+
+ include ("Fingerprint/Fingerprint_FPC.asl")
+}
+
diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/PlatformSsdt.inf b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/PlatformSsdt.inf new file mode 100644 index 0000000000..96a8ded34e --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/PlatformSsdt.inf @@ -0,0 +1,31 @@ +## @file
+# Component description file for PlatformAcpiTable module.
+#
+# Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = PlatformSsdt
+ FILE_GUID = 8041F38B-0A34-49D7-A905-03AEEF4826F7
+ MODULE_TYPE = USER_DEFINED
+ VERSION_STRING = 1.0
+ EDK_RELEASE_VERSION = 0x00020000
+ EFI_SPECIFICATION_VERSION = 0x00020000
+
+[sources]
+ Irmt.asl
+ PlatformSsdt.asl
+
+[Packages]
+ MdePkg/MdePkg.dec
+ BroxtonSiPkg/BroxtonSiPkg.dec
diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Touch/TouchPads_I2C4.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Touch/TouchPads_I2C4.asl new file mode 100644 index 0000000000..9094e3ab7b --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Touch/TouchPads_I2C4.asl @@ -0,0 +1,115 @@ +/** @file
+ Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+External(\TCPD, IntObj)
+
+Scope(\_SB.PCI0.I2C4) {
+//------------------------
+// Touch Pads on I2C4
+// Note: instead of adding more touch devices, parametrize this one with appropriate _HID value and GPIO numbers
+// GPIO_18:TCHPAD_INT_N North West Community, IRQ number 0x75.
+//------------------------
+
+ Device(TPD0)
+ {
+ Name(_ADR, One)
+ Name(_HID, "ALPS0001")
+ Name(_CID, "PNP0C50")
+ Name(_UID, One)
+ Name(_S0W, 4) // required to put the device to D3 Cold during S0 idle
+ Name (SBFB, ResourceTemplate () {
+ I2cSerialBus (
+ 0x2C,
+ ControllerInitiated,
+ 400000,
+ AddressingMode7Bit,
+ "\\_SB.PCI0.I2C4",
+ 0x00,
+ ResourceConsumer,
+ ,
+ )
+ })
+ Name (SBFG, ResourceTemplate () {
+ GpioInt (Level, ActiveLow, Exclusive, PullDefault, 0x0000, "\\_SB.GPO0", 0x00, ResourceConsumer, ,)
+ { // Pin list
+ 0x0012
+ }
+ })
+ Name (SBFI, ResourceTemplate () {
+ Interrupt(ResourceConsumer, Level, ActiveLow, ExclusiveAndWake,,,)
+ {
+ 0x75,
+ }
+ })
+ Method (_INI, 0, NotSerialized)
+ {
+ }
+ Method (_STA, 0, NotSerialized)
+ {
+ If (LEqual (TCPD, 1)) {
+ Return (0x0F)
+ }
+ Return (0x00)
+ }
+ Method (_CRS, 0, NotSerialized)
+ {
+ If (LLess (OSYS, 2012)) {
+ Return (SBFI)
+ }
+ Return (ConcatenateResTemplate (SBFB, SBFI))
+ }
+ Method(_DSM, 0x4, NotSerialized)
+ {
+ // DSM UUID for HIDI2C. Do Not change.
+ If (LEqual(Arg0, ToUUID("3CDFF6F7-4267-4555-AD05-B30A3D8938DE"))) {
+ // Function 0 : Query Function
+ If (LEqual(Arg2, Zero)) {
+ // Revision 1
+ If (LEqual(Arg1, One)) {
+ Return (Buffer (One) {0x03})
+ }
+ Else
+ {
+ Return (Buffer (One) {0x00})
+ }
+ } ElseIf (LEqual(Arg2, One)) { // Function 1 : HID Function
+ // HID Descriptor Address (IHV Specific)
+ Return(0x0020)
+ } Else {
+ Return (Buffer (One) {0x00})
+ }
+ }
+ Else
+ {
+ If (LEqual(Arg0, ToUUID("EF87EB82-F951-46DA-84EC-14871AC6F84B"))) {
+ If (LEqual (Arg2, Zero)) {
+ If (LEqual (Arg1, One)) {
+ Return (Buffer (One) {0x03})
+ }
+ }
+
+ If (LEqual (Arg2, One)) {
+ Return (ConcatenateResTemplate (SBFB, SBFG))
+ }
+
+ Return (Buffer (One) {0x00})
+ }
+ Else
+ {
+ Return (Buffer (One) {0x00})
+ }
+ }
+ }
+ }
+} //Scope(\_SB.PCI0.I2C4)
+
diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Touch/TouchPanel_I2C3.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Touch/TouchPanel_I2C3.asl new file mode 100644 index 0000000000..07196c0606 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Touch/TouchPanel_I2C3.asl @@ -0,0 +1,142 @@ +/** @file
+ Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+External(\TCPL, IntObj)
+
+Scope(\_SB.PCI0.I2C3) {
+//------------------------
+// Touch Panels on I2C3
+// Note: instead of adding more touch panels, parametrize this one with appropriate _HID value and GPIO numbers
+// GPIO_21:TCH_PNL_INTR_LS_N North Community, IRQ number 0x32.
+//------------------------
+ Device (TPL1) {
+ Name (HID2, Zero)
+ Name (_HID, "ELAN221D") // _HID: Hardware ID
+ Name (_CID, "PNP0C50") // _CID: Compatible ID
+ Name (_S0W, 0x04) // _S0W: S0 Device Wake State
+ Name (SBFB, ResourceTemplate () {
+ I2cSerialBus (
+ 0x0010,
+ ControllerInitiated,
+ 400000,
+ AddressingMode7Bit,
+ "\\_SB.PCI0.I2C3",
+ 0x00,
+ ResourceConsumer,
+ ,
+ )
+ })
+ Name (SBFG, ResourceTemplate () {
+ GpioInt (Level, ActiveLow, Exclusive, PullDefault, 0x0000,
+ "\\_SB.GPO0", 0x00, ResourceConsumer, ,
+ )
+ { // Pin list
+ 0x0015
+ }
+ })
+ Name (SBFI, ResourceTemplate () {
+ Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, )
+ {
+ 0x32,
+ }
+ })
+
+ Method (_INI, 0, NotSerialized) // _INI: Initialize
+ {
+ }
+
+ Method (_STA, 0, NotSerialized) // _STA: Status
+ {
+ If (LEqual (TCPL, 1)) {
+ Return (0x0F)
+ }
+ Return (0x00)
+ }
+
+ Method (_CRS, 0, NotSerialized) {
+ If (LLess (OSYS,2012)) {
+ // For Windows 7 only report Interrupt; it doesn't support ACPI5.0 and wouldn't understand GpioInt nor I2cBus
+ return (SBFI)
+ }
+ Return (ConcatenateResTemplate(SBFB, SBFI))
+ }
+
+ Method(_DSM, 0x4, Serialized){
+ Store ("Method _DSM begin", Debug)
+ If (LEqual(Arg0, ToUUID("3CDFF6F7-4267-4555-AD05-B30A3D8938DE"))) {
+ // DSM Function
+ switch(ToInteger(Arg2))
+ {
+ // Function 0: Query function, return based on revision
+ case(0)
+ {
+ // DSM Revision
+ switch(ToInteger(Arg1))
+ {
+ // Revision 1: Function 1 supported
+ case(1)
+ {
+ Store ("Method _DSM Function Query", Debug)
+ Return(Buffer(One) { 0x03 })
+ }
+
+ default
+ {
+ // Revision 2+: no functions supported
+ Return(Buffer(One) { 0x00 })
+ }
+ }
+ }
+
+ // Function 1 : HID Function
+ case(1)
+ {
+ Store ("Method _DSM Function HID", Debug)
+ // HID Descriptor Address
+ Return(0x0001)
+ }
+
+ default
+ {
+ // Functions 2+: not supported
+ Return(0x0000)
+ }
+ }
+ }
+ Elseif(LEqual(Arg0, ToUUID("EF87EB82-F951-46DA-84EC-14871AC6F84B")))
+ { // Windows 7 Resources DSM (Intel specific)
+
+ // Function 0 : Query Function
+ If (LEqual(Arg2, Zero)) {
+ // Revision 1
+ If (LEqual(Arg1, One)) {
+ Return(Buffer(One) { 0x03 })
+ }
+ }
+ // Function 1 : I2CSerialBus(...) and GpioInt(...) resources
+ If (LEqual(Arg2, One)) {
+ Return (ConcatenateResTemplate(SBFB, SBFG))
+ }
+
+ Return(Buffer(One) { 0x00 })
+ }
+ else
+ {
+ // No other GUIDs supported
+ Return(Buffer(One) { 0x00 })
+ }
+ }
+
+ } // Device (TPL0)
+} //Scope(\_SB.PCI0.I2C3)
+
diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Wifi/WIFI_Broadcom1.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Wifi/WIFI_Broadcom1.asl new file mode 100644 index 0000000000..8a48108e36 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Wifi/WIFI_Broadcom1.asl @@ -0,0 +1,68 @@ +/** @file
+ Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/*
+ GPIO_10 for Wi-Fi direct IRQ 0x6D.
+ GPIO_15 for Wi-Fi reset
+ PMIC_STDBY for Wi-Fi disable, NW index 30
+*/
+
+
+Scope(\_SB.PCI0.SDIO)
+{
+ Device (BRCM)
+ {
+ Name (_ADR, One) // _ADR: Address
+ Name (_DEP, Package() {\_SB.GPO0})
+ Name (_S4W, 2)
+ Name (_S0W, 2)
+
+ Method (_STA, 0, NotSerialized)
+ {
+ Return (0xF)
+ }
+
+ Method (_RMV, 0, NotSerialized)
+ {
+ Return (Zero)
+ }
+
+ Name (_PRW, Package (0x02)
+ {
+ Zero,
+ Zero
+ })
+
+ Method (_CRS, 0, Serialized)
+ {
+ Name (RBUF, ResourceTemplate ()
+ {
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, ExclusiveAndWake, , , ) {0x6D} // GPIO_10 to IOAPIC IRQ 0x6D
+ })
+ Return (RBUF)
+ }
+
+ Method (_PS3, 0, NotSerialized)
+ {
+ Store( 0x00, \_SB.GPO0.CWLE ) // Put WiFi chip in Reset
+ Sleep(150)
+ }
+
+ Method (_PS0, 0, NotSerialized)
+ {
+ Store( 0x01, \_SB.GPO0.CWLE ) // Take WiFi chip out in Reset
+ Sleep(150)
+ }
+ }
+}
+
diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Wifi/WIFI_Broadcom2.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Wifi/WIFI_Broadcom2.asl new file mode 100644 index 0000000000..52db361659 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Wifi/WIFI_Broadcom2.asl @@ -0,0 +1,49 @@ +/** @file
+ Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+Scope(\_SB.PCI0.SDIO)
+{
+ Device (BRC2)
+ {
+ Name (_ADR, 0x02)
+
+ Method (_STA, 0, NotSerialized)
+ {
+ Return (0xF)
+ }
+
+ Method (_RMV, 0, NotSerialized)
+ {
+ Return (Zero)
+ }
+
+ Method (_CRS, 0, Serialized)
+ {
+ Name (NAM, Buffer ()
+ { // 20
+ "\\_SB.PCI0.SDIO.BRCM"
+ })
+ Name (SPB, Buffer ()
+ {
+ /* 0000 */ 0x8E, 0x1D, 0x00, 0x01, 0x00, 0xC0, 0x02, 0x00,
+ /* 0008 */ 0x00, 0x01, 0x00, 0x00
+ })
+ Name(END, Buffer() {0x79, 0x00})
+
+ Concatenate (SPB, NAM, Local0)
+ Concatenate (Local0, END, Local1)
+ Return (Local1)
+ }
+ }
+}
+
|