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-rw-r--r--Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c197
-rw-r--r--Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610Strings.unibin0 -> 4292 bytes
-rw-r--r--Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c141
-rw-r--r--Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf54
4 files changed, 392 insertions, 0 deletions
diff --git a/Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c b/Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c
new file mode 100644
index 0000000000..66d62895a6
--- /dev/null
+++ b/Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c
@@ -0,0 +1,197 @@
+/** @file
+*
+* Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+* Copyright (c) 2015, Linaro Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Uefi.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Protocol/Smbios.h>
+#include <IndustryStandard/SmBios.h>
+
+#include <PlatformArch.h>
+#include <Library/OemMiscLib.h>
+#include <Library/SerdesLib.h>
+#include <Library/I2CLib.h>
+#include <Library/HiiLib.h>
+
+I2C_DEVICE gDS3231RtcDevice = {
+ .Socket = 0,
+ .Port = 6,
+ .DeviceType = DEVICE_TYPE_SPD,
+ .SlaveDeviceAddress = 0x68
+};
+
+SERDES_POLARITY_INVERT gSerdesPolarityTxDesc[] =
+{
+ {SERDES_INVALID_MACRO_ID, SERDES_INVALID_LANE_NUM}
+};
+
+SERDES_POLARITY_INVERT gSerdesPolarityRxDesc[] =
+{
+ {SERDES_INVALID_MACRO_ID, SERDES_INVALID_LANE_NUM}
+};
+
+SERDES_PARAM gSerdesParam = {
+ .Hilink0Mode = EmHilink0Pcie1X8,
+ .Hilink1Mode = EmHilink1Pcie0X8,
+ .Hilink2Mode = EmHilink2Pcie2X8,
+ .Hilink3Mode = 0x0,
+ .Hilink4Mode = 0xF,
+ .Hilink5Mode = EmHilink5Sas1X4,
+ .Hilink6Mode = 0x0,
+ .UseSsc = 0,
+};
+
+SERDES_PARAM gSerdesParam0 = {
+ .Hilink0Mode = EmHilink0Hccs1X8Width16,
+ .Hilink1Mode = EmHilink1Hccs0X8Width16,
+ .Hilink2Mode = EmHilink2Pcie2X8,
+ .Hilink3Mode = 0x0,
+ .Hilink4Mode = 0xF,
+ .Hilink5Mode = EmHilink5Sas1X4,
+ .Hilink6Mode = 0x0,
+ .UseSsc = 0,
+};
+
+SERDES_PARAM gSerdesParam1 = {
+ .Hilink0Mode = EmHilink0Hccs1X8Width16,
+ .Hilink1Mode = EmHilink1Hccs0X8Width16,
+ .Hilink2Mode = EmHilink2Pcie2X8,
+ .Hilink3Mode = 0x0,
+ .Hilink4Mode = 0xF,
+ .Hilink5Mode = EmHilink5Pcie3X4,
+ .Hilink6Mode = 0xF,
+ .UseSsc = 0,
+};
+
+EFI_STATUS OemGetSerdesParam (SERDES_PARAM *ParamA, SERDES_PARAM *ParamB, UINT32 SocketId)
+{
+ if (ParamA == NULL) {
+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Param == NULL!\n", __FUNCTION__, __LINE__));
+ return EFI_INVALID_PARAMETER;
+ }
+
+ (VOID) CopyMem(ParamA, &gSerdesParam, sizeof(*ParamA));
+ return EFI_SUCCESS;
+}
+
+
+VOID OemPcieResetAndOffReset(void)
+ {
+ return;
+ }
+
+SMBIOS_TABLE_TYPE9 gPcieSlotInfo[] = {
+ // PCIe0 Slot 1
+ {
+ { // Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // Type,
+ 0, // Length,
+ 0 // Handle
+ },
+ 1, // SlotDesignation
+ SlotTypePciExpressX8, // SlotType
+ SlotDataBusWidth8X, // SlotDataBusWidth
+ SlotUsageAvailable, // SlotUsage
+ SlotLengthOther, // SlotLength
+ 0x0001, // SlotId
+ { // SlotCharacteristics1
+ 0, // CharacteristicsUnknown :1;
+ 0, // Provides50Volts :1;
+ 0, // Provides33Volts :1;
+ 0, // SharedSlot :1;
+ 0, // PcCard16Supported :1;
+ 0, // CardBusSupported :1;
+ 0, // ZoomVideoSupported :1;
+ 0 // ModemRingResumeSupported:1;
+ },
+ { // SlotCharacteristics2
+ 0, // PmeSignalSupported :1;
+ 0, // HotPlugDevicesSupported :1;
+ 0, // SmbusSignalSupported :1;
+ 0 // Reserved :5;
+ },
+ 0x00, // SegmentGroupNum
+ 0x00, // BusNum
+ 0 // DevFuncNum
+ },
+
+ // PCIe0 Slot 4
+ {
+ { // Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // Type,
+ 0, // Length,
+ 0 // Handle
+ },
+ 1, // SlotDesignation
+ SlotTypePciExpressX8, // SlotType
+ SlotDataBusWidth8X, // SlotDataBusWidth
+ SlotUsageAvailable, // SlotUsage
+ SlotLengthOther, // SlotLength
+ 0x0004, // SlotId
+ { // SlotCharacteristics1
+ 0, // CharacteristicsUnknown :1;
+ 0, // Provides50Volts :1;
+ 0, // Provides33Volts :1;
+ 0, // SharedSlot :1;
+ 0, // PcCard16Supported :1;
+ 0, // CardBusSupported :1;
+ 0, // ZoomVideoSupported :1;
+ 0 // ModemRingResumeSupported:1;
+ },
+ { // SlotCharacteristics2
+ 0, // PmeSignalSupported :1;
+ 0, // HotPlugDevicesSupported :1;
+ 0, // SmbusSignalSupported :1;
+ 0 // Reserved :5;
+ },
+ 0x00, // SegmentGroupNum
+ 0x00, // BusNum
+ 0 // DevFuncNum
+ }
+};
+
+
+UINT8 OemGetPcieSlotNumber ()
+{
+ return sizeof (gPcieSlotInfo) / sizeof (SMBIOS_TABLE_TYPE9);
+}
+
+EFI_STRING_ID gDimmToDevLocator[MAX_SOCKET][MAX_CHANNEL][MAX_DIMM] = {
+ {{STRING_TOKEN(STR_LEMON_C10_DIMM_000), STRING_TOKEN(STR_LEMON_C10_DIMM_001), STRING_TOKEN(STR_LEMON_C10_DIMM_002)},
+ {STRING_TOKEN(STR_LEMON_C10_DIMM_010), STRING_TOKEN(STR_LEMON_C10_DIMM_011), STRING_TOKEN(STR_LEMON_C10_DIMM_012)},
+ {STRING_TOKEN(STR_LEMON_C10_DIMM_020), STRING_TOKEN(STR_LEMON_C10_DIMM_021), STRING_TOKEN(STR_LEMON_C10_DIMM_022)},
+ {STRING_TOKEN(STR_LEMON_C10_DIMM_030), STRING_TOKEN(STR_LEMON_C10_DIMM_031), STRING_TOKEN(STR_LEMON_C10_DIMM_032)}},
+
+ {{STRING_TOKEN(STR_LEMON_C10_DIMM_100), STRING_TOKEN(STR_LEMON_C10_DIMM_101), STRING_TOKEN(STR_LEMON_C10_DIMM_102)},
+ {STRING_TOKEN(STR_LEMON_C10_DIMM_110), STRING_TOKEN(STR_LEMON_C10_DIMM_111), STRING_TOKEN(STR_LEMON_C10_DIMM_112)},
+ {STRING_TOKEN(STR_LEMON_C10_DIMM_120), STRING_TOKEN(STR_LEMON_C10_DIMM_121), STRING_TOKEN(STR_LEMON_C10_DIMM_122)},
+ {STRING_TOKEN(STR_LEMON_C10_DIMM_130), STRING_TOKEN(STR_LEMON_C10_DIMM_131), STRING_TOKEN(STR_LEMON_C10_DIMM_132)}}
+};
+
+EFI_HII_HANDLE
+EFIAPI
+OemGetPackages (
+ )
+{
+ return HiiAddPackages (
+ &gEfiCallerIdGuid,
+ NULL,
+ OemMiscLib2PStrings,
+ NULL,
+ NULL
+ );
+}
+
+
diff --git a/Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610Strings.uni b/Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610Strings.uni
new file mode 100644
index 0000000000..38def406b9
--- /dev/null
+++ b/Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610Strings.uni
Binary files differ
diff --git a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c
new file mode 100644
index 0000000000..fa1039bda1
--- /dev/null
+++ b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c
@@ -0,0 +1,141 @@
+/** @file
+*
+* Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+* Copyright (c) 2015, Linaro Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Uefi.h>
+
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/TimerLib.h>
+#include <Library/SerialPortLib.h>
+#include <Library/OemMiscLib.h>
+#include <PlatformArch.h>
+#include <Library/PlatformSysCtrlLib.h>
+#include <Library/OemAddressMapLib.h>
+#include <Library/LpcLib.h>
+REPORT_PCIEDIDVID2BMC PcieDeviceToReport[PCIEDEVICE_REPORT_MAX] = {
+ {67,0,0,0},
+ {225,0,0,3},
+ {0xFFFF,0xFFFF,0xFFFF,0xFFFF},
+ {0xFFFF,0xFFFF,0xFFFF,0xFFFF}
+};
+
+// Right now we only support 1P
+BOOLEAN OemIsSocketPresent (UINTN Socket)
+{
+ if (0 == Socket)
+ {
+ return TRUE;
+ }
+
+ if(1 == Socket)
+ {
+ return TRUE;
+ }
+
+ return FALSE;
+}
+
+
+UINTN OemGetSocketNumber (VOID)
+{
+
+ if(!OemIsMpBoot())
+ {
+ return 1;
+ }
+
+ return 2;
+
+}
+
+
+UINTN OemGetDdrChannel (VOID)
+{
+ return 4;
+}
+
+
+UINTN OemGetDimmSlot(UINTN Socket, UINTN Channel)
+{
+ return 2;
+}
+
+
+// Nothing to do for EVB
+VOID OemPostEndIndicator (VOID)
+{
+
+ DEBUG((EFI_D_ERROR,"M3 release reset CONFIG........."));
+
+ MmioWrite32(0xd0002180, 0x3);
+ MmioWrite32(0xd0002194, 0xa4);
+ MmioWrite32(0xd0000a54, 0x1);
+
+ MicroSecondDelay(10000);
+
+ MmioWrite32(0xd0002108, 0x1);
+ MmioWrite32(0xd0002114, 0x1);
+ MmioWrite32(0xd0002120, 0x1);
+ MmioWrite32(0xd0003108, 0x1);
+
+ MicroSecondDelay(500000);
+ DEBUG((EFI_D_ERROR,"Done\n"));
+
+}
+
+
+
+VOID CoreSelectBoot(VOID)
+{
+ if (!PcdGet64 (PcdTrustedFirmwareEnable))
+ {
+ StartupAp ();
+ }
+
+ return;
+}
+
+BOOLEAN OemIsMpBoot()
+{
+ UINT32 Tmp;
+
+ Tmp = MmioRead32(0x602E0050);
+ if ( ((Tmp >> 10) & 0xF) == 0x3)
+ return TRUE;
+ else
+ return FALSE;
+}
+
+VOID OemLpcInit(VOID)
+{
+ LpcInit();
+ return;
+}
+
+UINT32 OemIsWarmBoot(VOID)
+{
+ return 0;
+}
+
+VOID OemBiosSwitch(UINT32 Master)
+{
+ (VOID)Master;
+ return;
+}
+
+BOOLEAN OemIsNeedDisableExpanderBuffer(VOID)
+{
+ return TRUE;
+}
diff --git a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf
new file mode 100644
index 0000000000..310bbaea84
--- /dev/null
+++ b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf
@@ -0,0 +1,54 @@
+#/** @file
+#
+# Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+# Copyright (c) 2015, Linaro Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = OemMiscLib2P
+ FILE_GUID = B9CE7465-21A2-4ecd-B347-BBDDBD098CEE
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = OemMiscLib
+
+[Sources.common]
+ BoardFeature2PHi1610.c
+ OemMiscLib2PHi1610.c
+ BoardFeature2PHi1610Strings.uni
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ ArmPkg/ArmPkg.dec
+
+ Silicon/Hisilicon/HisiPkg.dec
+
+[LibraryClasses]
+ PcdLib
+ TimerLib
+
+[BuildOptions]
+
+[Ppis]
+ gEfiPeiReadOnlyVariable2PpiGuid ## SOMETIMES_CONSUMES
+
+[Pcd]
+ gHisiTokenSpaceGuid.PcdTrustedFirmwareEnable
+ gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz
+
+[FixedPcd.common]
+
+[Guids]
+
+[Protocols]
+
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-01 18:20:09 +0000