diff options
Diffstat (limited to 'Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple')
2 files changed, 225 insertions, 0 deletions
diff --git a/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciHostBridgeLibSimple.c b/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciHostBridgeLibSimple.c new file mode 100644 index 0000000000..557ac2a5b3 --- /dev/null +++ b/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciHostBridgeLibSimple.c @@ -0,0 +1,166 @@ +/** @file
+ SA PciHostBridge Library
+
+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+#include <PiDxe.h>
+#include <IndustryStandard/Pci.h>
+#include <Protocol/PciHostBridgeResourceAllocation.h>
+#include <Library/BaseLib.h>
+#include <Library/DevicePathLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PcdLib.h>
+#include <Library/IoLib.h>
+#include <Library/DebugLib.h>
+#include <Library/DxeServicesTableLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+#include <Library/PciHostBridgeLib.h>
+
+GLOBAL_REMOVE_IF_UNREFERENCED CHAR16 *mPciHostBridgeLibAcpiAddressSpaceTypeStr[] = {
+ L"Mem", L"I/O", L"Bus"
+};
+ACPI_HID_DEVICE_PATH mRootBridgeDeviceNode = {
+ {
+ ACPI_DEVICE_PATH,
+ ACPI_DP,
+ {
+ (UINT8) (sizeof (ACPI_HID_DEVICE_PATH)),
+ (UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8)
+ }
+ },
+ EISA_PNP_ID (0x0A03),
+ 0
+};
+
+PCI_ROOT_BRIDGE mRootBridge = {
+ 0,
+ EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |
+ EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO |
+ EFI_PCI_ATTRIBUTE_ISA_IO |
+ EFI_PCI_ATTRIBUTE_ISA_IO_16 |
+ EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO |
+ EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16 |
+ EFI_PCI_ATTRIBUTE_VGA_MEMORY |
+ EFI_PCI_ATTRIBUTE_VGA_IO |
+ EFI_PCI_ATTRIBUTE_VGA_IO_16, // Supports;
+ 0, // Attributes;
+ FALSE, // DmaAbove4G;
+ FALSE, // NoExtendedConfigSpace;
+ FALSE, // ResourceAssigned;
+ EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM, // AllocationAttributes
+ { 0, 255 }, // Bus
+ { 0, 0 }, // Io - to be fixed later
+ { 0, 0 }, // Mem - to be fixed later
+ { 0, 0 }, // MemAbove4G - to be fixed later
+ { 0, 0 }, // PMem - COMBINE_MEM_PMEM indicating no PMem and PMemAbove4GB
+ { 0, 0 }, // PMemAbove4G
+ NULL // DevicePath;
+};
+
+PCI_ROOT_BRIDGE *
+EFIAPI
+PciHostBridgeGetRootBridges (
+ UINTN *Count
+ )
+{
+ mRootBridge.Mem.Base = PcdGet32 (PcdPciReservedMemBase);
+ if (PcdGet32(PcdPciReservedMemLimit) != 0) {
+ mRootBridge.Mem.Limit = PcdGet32 (PcdPciReservedMemLimit);
+ } else {
+ mRootBridge.Mem.Limit = (UINT32)PcdGet64 (PcdPciExpressBaseAddress);
+ }
+
+ mRootBridge.MemAbove4G.Base = PcdGet64 (PcdPciReservedMemAbove4GBBase);
+ mRootBridge.MemAbove4G.Limit = PcdGet64 (PcdPciReservedMemAbove4GBLimit);
+
+ mRootBridge.PMem.Base = PcdGet32 (PcdPciReservedPMemBase);
+ mRootBridge.PMem.Limit = PcdGet32 (PcdPciReservedPMemLimit);
+ mRootBridge.PMemAbove4G.Base = PcdGet64 (PcdPciReservedPMemAbove4GBBase);
+ mRootBridge.PMemAbove4G.Limit = PcdGet64 (PcdPciReservedPMemAbove4GBLimit);
+
+ if (mRootBridge.MemAbove4G.Base < mRootBridge.MemAbove4G.Limit) {
+ mRootBridge.AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
+ }
+
+ mRootBridge.Io.Base = PcdGet16 (PcdPciReservedIobase);
+ mRootBridge.Io.Limit = PcdGet16 (PcdPciReservedIoLimit);
+
+ mRootBridge.DmaAbove4G = PcdGetBool (PcdPciDmaAbove4G);
+ mRootBridge.NoExtendedConfigSpace = PcdGetBool (PcdPciNoExtendedConfigSpace);
+ mRootBridge.ResourceAssigned = PcdGetBool (PcdPciResourceAssigned);
+
+ mRootBridge.DevicePath = AppendDevicePathNode (NULL, &mRootBridgeDeviceNode.Header);
+ *Count = 1;
+ return &mRootBridge;
+}
+
+VOID
+EFIAPI
+PciHostBridgeFreeRootBridges (
+ PCI_ROOT_BRIDGE *Bridges,
+ UINTN Count
+ )
+{
+ ASSERT (Count == 1);
+ FreePool (Bridges->DevicePath);
+}
+
+/**
+ Inform the platform that the resource conflict happens.
+
+ @param HostBridgeHandle Handle of the Host Bridge.
+ @param Configuration Pointer to PCI I/O and PCI memory resource descriptors.
+ The Configuration contains the resources for all the
+ root bridges. The resource for each root bridge is
+ terminated with END descriptor and an additional END
+ is appended indicating the end of the whole resources.
+ The resource descriptor field values follow the description
+ in EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.SubmitResources().
+**/
+
+VOID
+EFIAPI
+PciHostBridgeResourceConflict (
+ EFI_HANDLE HostBridgeHandle,
+ VOID *Configuration
+ )
+{
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
+ UINTN RootBridgeIndex;
+ DEBUG ((EFI_D_ERROR, "PciHostBridge: Resource conflict happens!\n"));
+
+ RootBridgeIndex = 0;
+ Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration;
+ while (Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) {
+ DEBUG ((EFI_D_ERROR, "RootBridge[%d]:\n", RootBridgeIndex++));
+ for (; Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR; Descriptor++) {
+ ASSERT (Descriptor->ResType <
+ sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr) / sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr[0])
+ );
+ DEBUG ((EFI_D_ERROR, " %s: Length/Alignment = 0x%lx / 0x%lx\n",
+ mPciHostBridgeLibAcpiAddressSpaceTypeStr[Descriptor->ResType], Descriptor->AddrLen, Descriptor->AddrRangeMax));
+ if (Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) {
+ DEBUG ((EFI_D_ERROR, " Granularity/SpecificFlag = %ld / %02x%s\n",
+ Descriptor->AddrSpaceGranularity, Descriptor->SpecificFlag,
+ ((Descriptor->SpecificFlag & EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE) != 0) ? L" (Prefetchable)" : L""
+ ));
+ }
+ }
+ //
+ // Skip the END descriptor for root bridge
+ //
+ ASSERT (Descriptor->Desc == ACPI_END_TAG_DESCRIPTOR);
+ Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) ((EFI_ACPI_END_TAG_DESCRIPTOR *) Descriptor + 1);
+ }
+
+ ASSERT (FALSE);
+}
diff --git a/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciHostBridgeLibSimple.inf b/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciHostBridgeLibSimple.inf new file mode 100644 index 0000000000..631de8e6b6 --- /dev/null +++ b/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciHostBridgeLibSimple.inf @@ -0,0 +1,59 @@ +## @file
+# Component description file for the SA PciHostBridge library
+#
+# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License which accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = PciHostBridgeLibSimple
+ FILE_GUID = F24CC210-DAD9-44E1-9F7E-B1CE05D22A36
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PciHostBridgeLib
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+[Sources]
+ PciHostBridgeLibSimple.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MinPlatformPkg/MinPlatformPkg.dec
+
+[LibraryClasses]
+ DebugLib
+ DevicePathLib
+ BaseMemoryLib
+ BaseLib
+
+[Pcd]
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
+ gPlatformModuleTokenSpaceGuid.PcdPciReservedIobase
+ gPlatformModuleTokenSpaceGuid.PcdPciReservedIoLimit
+ gPlatformModuleTokenSpaceGuid.PcdPciReservedMemBase
+ gPlatformModuleTokenSpaceGuid.PcdPciReservedMemLimit
+ gPlatformModuleTokenSpaceGuid.PcdPciReservedMemAbove4GBBase
+ gPlatformModuleTokenSpaceGuid.PcdPciReservedMemAbove4GBLimit
+ gPlatformModuleTokenSpaceGuid.PcdPciReservedPMemBase
+ gPlatformModuleTokenSpaceGuid.PcdPciReservedPMemLimit
+ gPlatformModuleTokenSpaceGuid.PcdPciReservedPMemAbove4GBBase
+ gPlatformModuleTokenSpaceGuid.PcdPciReservedPMemAbove4GBLimit
+ gPlatformModuleTokenSpaceGuid.PcdPciDmaAbove4G
+ gPlatformModuleTokenSpaceGuid.PcdPciNoExtendedConfigSpace
+ gPlatformModuleTokenSpaceGuid.PcdPciResourceAssigned
+
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