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-rw-r--r--Platform/Intel/MinPlatformPkg/PlatformInit/Library/BoardInitLibNull/BoardInitLib.c124
-rw-r--r--Platform/Intel/MinPlatformPkg/PlatformInit/Library/BoardInitLibNull/BoardInitLibNull.inf36
-rw-r--r--Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/DxeBoardInitLib.c84
-rw-r--r--Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/DxeMultiBoardInitSupportLib.c39
-rw-r--r--Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/DxeMultiBoardInitSupportLib.inf42
-rw-r--r--Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/PeiBoardInitLib.c229
-rw-r--r--Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/PeiMultiBoardInitSupportLib.c82
-rw-r--r--Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/PeiMultiBoardInitSupportLib.inf44
-rw-r--r--Platform/Intel/MinPlatformPkg/PlatformInit/Library/SecBoardInitLibNull/Ia32/SecBoardInit.nasm32
-rw-r--r--Platform/Intel/MinPlatformPkg/PlatformInit/Library/SecBoardInitLibNull/SecBoardInitLib.c25
-rw-r--r--Platform/Intel/MinPlatformPkg/PlatformInit/Library/SecBoardInitLibNull/SecBoardInitLibNull.inf40
-rw-r--r--Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitDxe/PlatformInitDxe.c400
-rw-r--r--Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitDxe/PlatformInitDxe.inf60
-rw-r--r--Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPostMem.c228
-rw-r--r--Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPostMem.inf59
-rw-r--r--Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.c507
-rw-r--r--Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf71
-rw-r--r--Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitSmm/PlatformInitSmm.c168
-rw-r--r--Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf52
19 files changed, 2322 insertions, 0 deletions
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/Library/BoardInitLibNull/BoardInitLib.c b/Platform/Intel/MinPlatformPkg/PlatformInit/Library/BoardInitLibNull/BoardInitLib.c
new file mode 100644
index 0000000000..f680fc27ce
--- /dev/null
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/Library/BoardInitLibNull/BoardInitLib.c
@@ -0,0 +1,124 @@
+/** @file
+
+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Library/BoardInitLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DebugLib.h>
+
+EFI_STATUS
+EFIAPI
+BoardDetect (
+ VOID
+ )
+{
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+BoardDebugInit (
+ VOID
+ )
+{
+ return EFI_SUCCESS;
+}
+
+EFI_BOOT_MODE
+EFIAPI
+BoardBootModeDetect (
+ VOID
+ )
+{
+ return BOOT_WITH_FULL_CONFIGURATION;
+}
+
+EFI_STATUS
+EFIAPI
+BoardInitBeforeMemoryInit (
+ VOID
+ )
+{
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+BoardInitAfterMemoryInit (
+ VOID
+ )
+{
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+BoardInitBeforeTempRamExit (
+ VOID
+ )
+{
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+BoardInitAfterTempRamExit (
+ VOID
+ )
+{
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+BoardInitBeforeSiliconInit (
+ VOID
+ )
+{
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+BoardInitAfterSiliconInit (
+ VOID
+ )
+{
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+BoardInitAfterPciEnumeration (
+ VOID
+ )
+{
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+BoardInitReadyToBoot (
+ VOID
+ )
+{
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+BoardInitEndOfFirmware (
+ VOID
+ )
+{
+ return EFI_SUCCESS;
+}
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/Library/BoardInitLibNull/BoardInitLibNull.inf b/Platform/Intel/MinPlatformPkg/PlatformInit/Library/BoardInitLibNull/BoardInitLibNull.inf
new file mode 100644
index 0000000000..65a445b0f7
--- /dev/null
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/Library/BoardInitLibNull/BoardInitLibNull.inf
@@ -0,0 +1,36 @@
+## @file
+# Component information file for Board Init Library
+#
+# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License which accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BoardInitLib
+ FILE_GUID = 71B4AEBA-6CBA-442F-912E-E1851B21F106
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = BoardInitLib
+
+[LibraryClasses]
+ BaseLib
+ PcdLib
+ DebugLib
+
+[Packages]
+ MinPlatformPkg/MinPlatformPkg.dec
+ MdePkg/MdePkg.dec
+
+[Sources]
+ BoardInitLib.c
+
+[Pcd]
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/DxeBoardInitLib.c b/Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/DxeBoardInitLib.c
new file mode 100644
index 0000000000..13c623c640
--- /dev/null
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/DxeBoardInitLib.c
@@ -0,0 +1,84 @@
+/** @file
+
+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Library/BoardInitLib.h>
+#include <Library/MultiBoardInitSupportLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DebugLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+
+EFI_STATUS
+EFIAPI
+BoardInitAfterPciEnumeration (
+ VOID
+ )
+{
+ BOARD_NOTIFICATION_INIT_FUNC *BoardNotificationInit;
+ EFI_STATUS Status;
+
+ Status = gBS->LocateProtocol (
+ &gBoardNotificationInitGuid,
+ NULL,
+ (VOID **)&BoardNotificationInit
+ );
+ if (!EFI_ERROR(Status)) {
+ if (BoardNotificationInit->BoardInitAfterPciEnumeration != NULL) {
+ return BoardNotificationInit->BoardInitAfterPciEnumeration ();
+ }
+ }
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+BoardInitReadyToBoot (
+ VOID
+ )
+{
+ BOARD_NOTIFICATION_INIT_FUNC *BoardNotificationInit;
+ EFI_STATUS Status;
+
+ Status = gBS->LocateProtocol (
+ &gBoardNotificationInitGuid,
+ NULL,
+ (VOID **)&BoardNotificationInit
+ );
+ if (!EFI_ERROR(Status)) {
+ if (BoardNotificationInit->BoardInitReadyToBoot != NULL) {
+ return BoardNotificationInit->BoardInitReadyToBoot ();
+ }
+ }
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+BoardInitEndOfFirmware (
+ VOID
+ )
+{
+ BOARD_NOTIFICATION_INIT_FUNC *BoardNotificationInit;
+ EFI_STATUS Status;
+
+ Status = gBS->LocateProtocol (
+ &gBoardNotificationInitGuid,
+ NULL,
+ (VOID **)&BoardNotificationInit
+ );
+ if (!EFI_ERROR(Status)) {
+ if (BoardNotificationInit->BoardInitEndOfFirmware != NULL) {
+ return BoardNotificationInit->BoardInitEndOfFirmware ();
+ }
+ }
+ return EFI_SUCCESS;
+}
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/DxeMultiBoardInitSupportLib.c b/Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/DxeMultiBoardInitSupportLib.c
new file mode 100644
index 0000000000..f7a4c5b5a1
--- /dev/null
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/DxeMultiBoardInitSupportLib.c
@@ -0,0 +1,39 @@
+/** @file
+
+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Library/BoardInitLib.h>
+#include <Library/MultiBoardInitSupportLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DebugLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+
+EFI_STATUS
+EFIAPI
+RegisterBoardNotificationInit (
+ IN BOARD_NOTIFICATION_INIT_FUNC *BoardNotificationInit
+ )
+{
+ EFI_HANDLE Handle;
+ EFI_STATUS Status;
+
+ Handle = NULL;
+ Status = gBS->InstallProtocolInterface (
+ &Handle,
+ &gBoardNotificationInitGuid,
+ EFI_NATIVE_INTERFACE,
+ BoardNotificationInit
+ );
+ ASSERT_EFI_ERROR(Status);
+
+ return EFI_SUCCESS;
+}
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/DxeMultiBoardInitSupportLib.inf b/Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/DxeMultiBoardInitSupportLib.inf
new file mode 100644
index 0000000000..188c98db0a
--- /dev/null
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/DxeMultiBoardInitSupportLib.inf
@@ -0,0 +1,42 @@
+## @file
+# Component information file for Board Init Library
+#
+# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License which accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = DxeMultiBoardInitSupportLib
+ FILE_GUID = 4790240A-F86D-4E91-BA4C-7E24B9AC393B
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = MultiBoardInitSupportLib
+ LIBRARY_CLASS = BoardInitLib
+
+[LibraryClasses]
+ BaseLib
+ PcdLib
+ DebugLib
+ UefiBootServicesTableLib
+
+[Packages]
+ MinPlatformPkg/MinPlatformPkg.dec
+ MdePkg/MdePkg.dec
+
+[Sources]
+ DxeMultiBoardInitSupportLib.c
+ DxeBoardInitLib.c
+
+[Guids]
+ gBoardNotificationInitGuid
+
+[Pcd]
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/PeiBoardInitLib.c b/Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/PeiBoardInitLib.c
new file mode 100644
index 0000000000..9bfe1551fb
--- /dev/null
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/PeiBoardInitLib.c
@@ -0,0 +1,229 @@
+/** @file
+
+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Library/BoardInitLib.h>
+#include <Library/MultiBoardInitSupportLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PeiServicesLib.h>
+
+EFI_STATUS
+EFIAPI
+BoardDetect (
+ VOID
+ )
+{
+ BOARD_DETECT_FUNC *BoardDetectFunc;
+ UINTN Index;
+ EFI_STATUS Status;
+
+ for (Index = 0; ; Index++) {
+ Status = PeiServicesLocatePpi(
+ &gBoardDetectGuid,
+ Index,
+ NULL,
+ (VOID **)&BoardDetectFunc
+ );
+ if (EFI_ERROR(Status)) {
+ break;
+ }
+ if (BoardDetectFunc->BoardDetect != NULL) {
+ BoardDetectFunc->BoardDetect ();
+ }
+ }
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+BoardDebugInit (
+ VOID
+ )
+{
+ BOARD_PRE_MEM_INIT_FUNC *BoardPreMemInit;
+ EFI_STATUS Status;
+
+ Status = PeiServicesLocatePpi(
+ &gBoardPreMemInitGuid,
+ 0,
+ NULL,
+ (VOID **)&BoardPreMemInit
+ );
+ if (!EFI_ERROR(Status)) {
+ if (BoardPreMemInit->BoardDebugInit != NULL) {
+ return BoardPreMemInit->BoardDebugInit ();
+ }
+ }
+ return EFI_SUCCESS;
+}
+
+EFI_BOOT_MODE
+EFIAPI
+BoardBootModeDetect (
+ VOID
+ )
+{
+ BOARD_PRE_MEM_INIT_FUNC *BoardPreMemInit;
+ EFI_STATUS Status;
+
+ Status = PeiServicesLocatePpi(
+ &gBoardPreMemInitGuid,
+ 0,
+ NULL,
+ (VOID **)&BoardPreMemInit
+ );
+ if (!EFI_ERROR(Status)) {
+ if (BoardPreMemInit->BoardBootModeDetect != NULL) {
+ return BoardPreMemInit->BoardBootModeDetect ();
+ }
+ }
+ return BOOT_WITH_FULL_CONFIGURATION;
+}
+
+EFI_STATUS
+EFIAPI
+BoardInitBeforeMemoryInit (
+ VOID
+ )
+{
+ BOARD_PRE_MEM_INIT_FUNC *BoardPreMemInit;
+ EFI_STATUS Status;
+
+ Status = PeiServicesLocatePpi(
+ &gBoardPreMemInitGuid,
+ 0,
+ NULL,
+ (VOID **)&BoardPreMemInit
+ );
+ if (!EFI_ERROR(Status)) {
+ if (BoardPreMemInit->BoardInitBeforeMemoryInit != NULL) {
+ return BoardPreMemInit->BoardInitBeforeMemoryInit ();
+ }
+ }
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+BoardInitAfterMemoryInit (
+ VOID
+ )
+{
+ BOARD_PRE_MEM_INIT_FUNC *BoardPreMemInit;
+ EFI_STATUS Status;
+
+ Status = PeiServicesLocatePpi(
+ &gBoardPreMemInitGuid,
+ 0,
+ NULL,
+ (VOID **)&BoardPreMemInit
+ );
+ if (!EFI_ERROR(Status)) {
+ if (BoardPreMemInit->BoardInitAfterMemoryInit != NULL) {
+ return BoardPreMemInit->BoardInitAfterMemoryInit ();
+ }
+ }
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+BoardInitBeforeTempRamExit (
+ VOID
+ )
+{
+ BOARD_PRE_MEM_INIT_FUNC *BoardPreMemInit;
+ EFI_STATUS Status;
+
+ Status = PeiServicesLocatePpi(
+ &gBoardPreMemInitGuid,
+ 0,
+ NULL,
+ (VOID **)&BoardPreMemInit
+ );
+ if (!EFI_ERROR(Status)) {
+ if (BoardPreMemInit->BoardInitBeforeTempRamExit != NULL) {
+ return BoardPreMemInit->BoardInitBeforeTempRamExit ();
+ }
+ }
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+BoardInitAfterTempRamExit (
+ VOID
+ )
+{
+ BOARD_PRE_MEM_INIT_FUNC *BoardPreMemInit;
+ EFI_STATUS Status;
+
+ Status = PeiServicesLocatePpi(
+ &gBoardPreMemInitGuid,
+ 0,
+ NULL,
+ (VOID **)&BoardPreMemInit
+ );
+ if (!EFI_ERROR(Status)) {
+ if (BoardPreMemInit->BoardInitAfterTempRamExit != NULL) {
+ return BoardPreMemInit->BoardInitAfterTempRamExit ();
+ }
+ }
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+BoardInitBeforeSiliconInit (
+ VOID
+ )
+{
+ BOARD_POST_MEM_INIT_FUNC *BoardPostMemInit;
+ EFI_STATUS Status;
+
+ Status = PeiServicesLocatePpi(
+ &gBoardPostMemInitGuid,
+ 0,
+ NULL,
+ (VOID **)&BoardPostMemInit
+ );
+ if (!EFI_ERROR(Status)) {
+ if (BoardPostMemInit->BoardInitBeforeSiliconInit != NULL) {
+ return BoardPostMemInit->BoardInitBeforeSiliconInit ();
+ }
+ }
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+BoardInitAfterSiliconInit (
+ VOID
+ )
+{
+ BOARD_POST_MEM_INIT_FUNC *BoardPostMemInit;
+ EFI_STATUS Status;
+
+ Status = PeiServicesLocatePpi(
+ &gBoardPostMemInitGuid,
+ 0,
+ NULL,
+ (VOID **)&BoardPostMemInit
+ );
+ if (!EFI_ERROR(Status)) {
+ if (BoardPostMemInit->BoardInitAfterSiliconInit != NULL) {
+ return BoardPostMemInit->BoardInitAfterSiliconInit ();
+ }
+ }
+ return EFI_SUCCESS;
+}
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/PeiMultiBoardInitSupportLib.c b/Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/PeiMultiBoardInitSupportLib.c
new file mode 100644
index 0000000000..2056782181
--- /dev/null
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/PeiMultiBoardInitSupportLib.c
@@ -0,0 +1,82 @@
+/** @file
+
+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Library/BoardInitLib.h>
+#include <Library/MultiBoardInitSupportLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DebugLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PeiServicesLib.h>
+
+EFI_STATUS
+EFIAPI
+RegisterBoardDetect (
+ IN BOARD_DETECT_FUNC *BoardDetect
+ )
+{
+ EFI_STATUS Status;
+ EFI_PEI_PPI_DESCRIPTOR *PpiListBoardDetect;
+
+ PpiListBoardDetect = AllocatePool (sizeof(EFI_PEI_PPI_DESCRIPTOR));
+ ASSERT (PpiListBoardDetect != NULL);
+
+ PpiListBoardDetect->Flags = (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);
+ PpiListBoardDetect->Guid = &gBoardDetectGuid;
+ PpiListBoardDetect->Ppi = BoardDetect;
+
+ Status = PeiServicesInstallPpi (PpiListBoardDetect);
+ ASSERT_EFI_ERROR(Status);
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+RegisterBoardPreMemInit (
+ IN BOARD_PRE_MEM_INIT_FUNC *BoardPreMemInit
+ )
+{
+ EFI_STATUS Status;
+ EFI_PEI_PPI_DESCRIPTOR *PpiListBoardInitPreMem;
+
+ PpiListBoardInitPreMem = AllocatePool (sizeof(EFI_PEI_PPI_DESCRIPTOR));
+ ASSERT (PpiListBoardInitPreMem != NULL);
+
+ PpiListBoardInitPreMem->Flags = (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);
+ PpiListBoardInitPreMem->Guid = &gBoardPreMemInitGuid;
+ PpiListBoardInitPreMem->Ppi = BoardPreMemInit;
+
+ Status = PeiServicesInstallPpi (PpiListBoardInitPreMem);
+ ASSERT_EFI_ERROR(Status);
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+RegisterBoardPostMemInit (
+ IN BOARD_POST_MEM_INIT_FUNC *BoardPostMemInit
+ )
+{
+ EFI_STATUS Status;
+ EFI_PEI_PPI_DESCRIPTOR *PpiListBoardInitPostMem;
+
+ PpiListBoardInitPostMem = AllocatePool (sizeof(EFI_PEI_PPI_DESCRIPTOR));
+ ASSERT (PpiListBoardInitPostMem != NULL);
+
+ PpiListBoardInitPostMem->Flags = (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);
+ PpiListBoardInitPostMem->Guid = &gBoardPostMemInitGuid;
+ PpiListBoardInitPostMem->Ppi = BoardPostMemInit;
+
+ Status = PeiServicesInstallPpi (PpiListBoardInitPostMem);
+ ASSERT_EFI_ERROR(Status);
+ return EFI_SUCCESS;
+}
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/PeiMultiBoardInitSupportLib.inf b/Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/PeiMultiBoardInitSupportLib.inf
new file mode 100644
index 0000000000..de769bf504
--- /dev/null
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/Library/MultiBoardInitSupportLib/PeiMultiBoardInitSupportLib.inf
@@ -0,0 +1,44 @@
+## @file
+# Component information file for Board Init Library
+#
+# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License which accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = PeiMultiBoardInitSupportLib
+ FILE_GUID = E0238683-D3FD-4D97-8874-37C6157E2906
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = MultiBoardInitSupportLib
+ LIBRARY_CLASS = BoardInitLib
+
+[LibraryClasses]
+ BaseLib
+ PcdLib
+ DebugLib
+
+[Packages]
+ MinPlatformPkg/MinPlatformPkg.dec
+ MdePkg/MdePkg.dec
+
+[Sources]
+ PeiMultiBoardInitSupportLib.c
+ PeiBoardInitLib.c
+
+[Guids]
+ gBoardDetectGuid
+ gBoardPreMemInitGuid
+ gBoardPostMemInitGuid
+ gBoardNotificationInitGuid
+
+[Pcd]
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/Library/SecBoardInitLibNull/Ia32/SecBoardInit.nasm b/Platform/Intel/MinPlatformPkg/PlatformInit/Library/SecBoardInitLibNull/Ia32/SecBoardInit.nasm
new file mode 100644
index 0000000000..71bf82933b
--- /dev/null
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/Library/SecBoardInitLibNull/Ia32/SecBoardInit.nasm
@@ -0,0 +1,32 @@
+;
+; This file contains an 'Intel Peripheral Driver' and is
+; licensed for Intel CPUs and chipsets under the terms of your
+; license agreement with Intel or your vendor. This file may
+; be modified by the user, subject to additional terms of the
+; license agreement
+;; @file
+; This is the code that goes from real-mode to protected mode.
+; It consumes the reset vector, calls TempRamInit API from FSP binary.
+;
+; Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials are licensed and made available under
+; the terms and conditions of the BSD License that accompanies this distribution.
+; The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;;
+
+SECTION .text
+
+global ASM_PFX(BoardBeforeTempRamInit)
+ASM_PFX(BoardBeforeTempRamInit):
+ ;
+ ; This hook is called before FSP TempRamInit API call
+ ; ESI, EDI need to be preserved
+ ; ESP contains return address
+ ;
+ jmp esp
+
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/Library/SecBoardInitLibNull/SecBoardInitLib.c b/Platform/Intel/MinPlatformPkg/PlatformInit/Library/SecBoardInitLibNull/SecBoardInitLib.c
new file mode 100644
index 0000000000..990e9c9b3a
--- /dev/null
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/Library/SecBoardInitLibNull/SecBoardInitLib.c
@@ -0,0 +1,25 @@
+/** @file
+
+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiDxe.h>
+#include <Library/BoardInitLib.h>
+#include <Library/PcdLib.h>
+
+EFI_STATUS
+EFIAPI
+BoardAfterTempRamInit (
+ VOID
+ )
+{
+ return EFI_SUCCESS;
+}
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/Library/SecBoardInitLibNull/SecBoardInitLibNull.inf b/Platform/Intel/MinPlatformPkg/PlatformInit/Library/SecBoardInitLibNull/SecBoardInitLibNull.inf
new file mode 100644
index 0000000000..186814925a
--- /dev/null
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/Library/SecBoardInitLibNull/SecBoardInitLibNull.inf
@@ -0,0 +1,40 @@
+## @file
+# Component information file for SEC Board Init Library
+#
+# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License which accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = SecBoardInitLibNull
+ FILE_GUID = B9DC6910-67E0-4FCE-A1A4-675115E71455
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = SecBoardInitLib
+
+[Sources.IA32]
+ Ia32/SecBoardInit.nasm
+
+[Sources]
+ SecBoardInitLib.c
+
+[Packages]
+ MinPlatformPkg/MinPlatformPkg.dec
+ MdePkg/MdePkg.dec
+ IntelFsp2Pkg/IntelFsp2Pkg.dec
+
+[LibraryClasses]
+ BaseLib
+
+[Guids]
+
+[Pcd]
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitDxe/PlatformInitDxe.c b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitDxe/PlatformInitDxe.c
new file mode 100644
index 0000000000..c8eca1c613
--- /dev/null
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitDxe/PlatformInitDxe.c
@@ -0,0 +1,400 @@
+/** @file
+ This driver will register two callbacks to call fsp's notifies.
+
+ Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiDxe.h>
+
+#include <Protocol/PciEnumerationComplete.h>
+
+#include <Library/UefiDriverEntryPoint.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/UefiLib.h>
+#include <Library/BoardInitLib.h>
+#include <Library/TestPointCheckLib.h>
+#include <Library/PerformanceLib.h>
+#include <Library/HobLib.h>
+#include <Protocol/ReportStatusCodeHandler.h>
+
+EFI_STATUS
+PlatformInitUnRegisterRscHandler (
+ VOID
+ );
+
+/**
+ PciEnumerationComplete Protocol notification event handler.
+
+ @param[in] Event Event whose notification function is being invoked.
+ @param[in] Context Pointer to the notification function's context.
+**/
+VOID
+EFIAPI
+OnPciEnumerationComplete (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ EFI_STATUS Status;
+ VOID *Interface;
+
+ //
+ // Try to locate it because gEfiPciEnumerationCompleteProtocolGuid will trigger it once when registration.
+ // Just return if it is not found.
+ //
+ Status = gBS->LocateProtocol (
+ &gEfiPciEnumerationCompleteProtocolGuid,
+ NULL,
+ &Interface
+ );
+ if (EFI_ERROR (Status)) {
+ return ;
+ }
+
+ Status = BoardInitAfterPciEnumeration ();
+ ASSERT_EFI_ERROR(Status);
+
+ TestPointPciEnumerationDone ();
+}
+
+/**
+ This stage is notified when system exists platform manufacture authentication.
+
+ @param Event Event whose notification function is being invoked.
+ @param Context Pointer to the notification function's context, which is
+ always zero in current implementation.
+
+**/
+VOID
+EFIAPI
+OnEndOfDxe (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ gBS->CloseEvent (Event);
+
+ TestPointEndOfDxe ();
+}
+
+/**
+ SmmReadyToLock Protocol notification event handler.
+
+ @param[in] Event Event whose notification function is being invoked.
+ @param[in] Context Pointer to the notification function's context.
+**/
+VOID
+EFIAPI
+OnDxeSmmReadyToLock (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ EFI_STATUS Status;
+ VOID *Interface;
+
+ //
+ // Try to locate it because gEfiPciEnumerationCompleteProtocolGuid will trigger it once when registration.
+ // Just return if it is not found.
+ //
+ Status = gBS->LocateProtocol (
+ &gEfiDxeSmmReadyToLockProtocolGuid,
+ NULL,
+ &Interface
+ );
+ if (EFI_ERROR (Status)) {
+ return ;
+ }
+
+ TestPointDxeSmmReadyToLock ();
+}
+
+/**
+ Notification function of EVT_GROUP_READY_TO_BOOT event group.
+
+ This is a notification function registered on EVT_GROUP_READY_TO_BOOT event group.
+ When the Boot Manager is about to load and execute a boot option, it reclaims variable
+ storage if free size is below the threshold.
+
+ @param[in] Event Event whose notification function is being invoked.
+ @param[in] Context Pointer to the notification function's context.
+
+**/
+VOID
+EFIAPI
+OnReadyToBoot (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ EFI_STATUS Status;
+
+ gBS->CloseEvent (Event);
+
+ Status = BoardInitReadyToBoot ();
+ ASSERT_EFI_ERROR(Status);
+}
+
+/**
+ This stage is notified just before the firmware/Preboot environment transfers
+ management of all system resources to the OS or next level execution environment.
+
+ @param Event Event whose notification function is being invoked.
+ @param Context Pointer to the notification function's context, which is
+ always zero in current implementation.
+
+**/
+VOID
+EFIAPI
+OnEndOfFirmware (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ EFI_STATUS Status;
+
+ gBS->CloseEvent (Event);
+
+ PlatformInitUnRegisterRscHandler ();
+
+ Status = BoardInitEndOfFirmware ();
+ ASSERT_EFI_ERROR(Status);
+
+ TestPointExitBootServices ();
+}
+
+/**
+ Main entry for the FSP DXE module.
+
+ This routine registers two callbacks to call fsp's notifies.
+
+ @param[in] ImageHandle The firmware allocated handle for the EFI image.
+ @param[in] SystemTable A pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS The entry point is executed successfully.
+ @retval other Some error occurs when executing this entry point.
+
+**/
+EFI_STATUS
+BoardNotificationInitEntryPoint (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_EVENT ReadyToBootEvent;
+ VOID *Registration;
+ EFI_EVENT ProtocolNotifyEvent;
+ EFI_EVENT ExitBootServicesEvent;
+ EFI_EVENT EndOfDxeEvent;
+ VOID *SmmReadyToLockRegistration;
+ EFI_EVENT SmmReadyToLockEvent;
+
+ ProtocolNotifyEvent = EfiCreateProtocolNotifyEvent (
+ &gEfiPciEnumerationCompleteProtocolGuid,
+ TPL_CALLBACK,
+ OnPciEnumerationComplete,
+ NULL,
+ &Registration
+ );
+ ASSERT (ProtocolNotifyEvent != NULL);
+
+ Status = gBS->CreateEventEx (
+ EVT_NOTIFY_SIGNAL,
+ TPL_CALLBACK,
+ OnEndOfDxe,
+ NULL,
+ &gEfiEndOfDxeEventGroupGuid,
+ &EndOfDxeEvent
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ SmmReadyToLockEvent = EfiCreateProtocolNotifyEvent (
+ &gEfiDxeSmmReadyToLockProtocolGuid,
+ TPL_CALLBACK,
+ OnDxeSmmReadyToLock,
+ NULL,
+ &SmmReadyToLockRegistration
+ );
+
+ Status = EfiCreateEventReadyToBootEx (
+ TPL_CALLBACK,
+ OnReadyToBoot,
+ NULL,
+ &ReadyToBootEvent
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ Status = gBS->CreateEventEx (
+ EVT_NOTIFY_SIGNAL,
+ TPL_CALLBACK,
+ OnEndOfFirmware,
+ NULL,
+ &gEfiEventExitBootServicesGuid,
+ &ExitBootServicesEvent
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return EFI_SUCCESS;
+}
+
+EFI_EVENT mRscNotifyEvent = NULL;
+EFI_RSC_HANDLER_PROTOCOL *mRscHandlerProtocol = NULL;
+
+/**
+ Report status code listener
+ for OsLoaderLoadImageStart and OsLoaderStartImageStart.
+
+ @param[in] CodeType Indicates the type of status code being reported.
+ @param[in] Value Describes the current status of a hardware or software entity.
+ This included information about the class and subclass that is used to
+ classify the entity as well as an operation.
+ @param[in] Instance The enumeration of a hardware or software entity within
+ the system. Valid instance numbers start with 1.
+ @param[in] CallerId This optional parameter may be used to identify the caller.
+ This parameter allows the status code driver to apply different rules to
+ different callers.
+ @param[in] Data This optional parameter may be used to pass additional data.
+
+ @retval EFI_SUCCESS Status code is what we expected.
+ @retval EFI_UNSUPPORTED Status code not supported.
+
+**/
+EFI_STATUS
+EFIAPI
+PlatformInitStatusCodeListener (
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN EFI_GUID *CallerId,
+ IN EFI_STATUS_CODE_DATA *Data
+ )
+{
+ EFI_STATUS Status;
+
+ //
+ // Check whether status code is what we are interested in.
+ //
+ if ((CodeType & EFI_STATUS_CODE_TYPE_MASK) != EFI_PROGRESS_CODE) {
+ return EFI_UNSUPPORTED;
+ }
+
+ Status = EFI_SUCCESS;
+ if (Value == (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_PC_READY_TO_BOOT_EVENT)) {
+ TestPointReadyToBoot ();
+ } else if (Value == PcdGet32 (PcdProgressCodeOsLoaderLoad)) {
+ } else if (Value == PcdGet32 (PcdProgressCodeOsLoaderStart)) {
+ } else if (Value == (EFI_SOFTWARE_EFI_BOOT_SERVICE | EFI_SW_BS_PC_EXIT_BOOT_SERVICES)) {
+ PlatformInitUnRegisterRscHandler ();
+ } else if (Value == (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_PC_LEGACY_BOOT_EVENT)) {
+ } else {
+ //
+ // Ignore else progress code.
+ //
+ Status = EFI_UNSUPPORTED;
+ }
+
+ return Status;
+}
+
+/**
+ RscHandler Protocol notification event handler.
+
+ @param[in] Event Event whose notification function is being invoked.
+ @param[in] Context Pointer to the notification function's context.
+**/
+VOID
+EFIAPI
+OnRscHandlerInstalled (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ EFI_STATUS Status;
+
+ Status = gBS->LocateProtocol (
+ &gEfiRscHandlerProtocolGuid,
+ NULL,
+ &mRscHandlerProtocol
+ );
+ if (EFI_ERROR (Status)) {
+ return ;
+ }
+
+ //
+ // Register report status code listener for OS Loader load and start.
+ //
+ Status = mRscHandlerProtocol->Register (PlatformInitStatusCodeListener, TPL_HIGH_LEVEL);
+ ASSERT_EFI_ERROR (Status);
+
+ gBS->CloseEvent (mRscNotifyEvent);
+ mRscNotifyEvent = NULL;
+}
+
+EFI_STATUS
+PlatformInitRegisterRscHandler (
+ VOID
+ )
+{
+ VOID *Registration;
+
+ mRscNotifyEvent = EfiCreateProtocolNotifyEvent (
+ &gEfiRscHandlerProtocolGuid,
+ TPL_CALLBACK,
+ OnRscHandlerInstalled,
+ NULL,
+ &Registration
+ );
+ ASSERT (mRscNotifyEvent != NULL);
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+PlatformInitUnRegisterRscHandler (
+ VOID
+ )
+{
+ if (mRscHandlerProtocol != NULL) {
+ mRscHandlerProtocol->Unregister (PlatformInitStatusCodeListener);
+ mRscHandlerProtocol = NULL;
+ }
+ if (mRscNotifyEvent != NULL) {
+ gBS->CloseEvent (mRscNotifyEvent);
+ mRscNotifyEvent = NULL;
+ }
+ return EFI_SUCCESS;
+}
+
+/**
+ Initialize DXE Platform.
+
+ @param[in] ImageHandle Image handle of this driver.
+ @param[in] SystemTable Global system service table.
+
+ @retval EFI_SUCCESS Initialization complete.
+ @exception EFI_UNSUPPORTED The chipset is unsupported by this driver.
+ @retval EFI_OUT_OF_RESOURCES Do not have enough resources to initialize the driver.
+ @retval EFI_DEVICE_ERROR Device error, driver exits abnormally.
+**/
+EFI_STATUS
+EFIAPI
+PlatformInitDxeEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ PlatformInitRegisterRscHandler ();
+ BoardNotificationInitEntryPoint ();
+
+ return EFI_SUCCESS;
+} \ No newline at end of file
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitDxe/PlatformInitDxe.inf b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitDxe/PlatformInitDxe.inf
new file mode 100644
index 0000000000..e64d62c756
--- /dev/null
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitDxe/PlatformInitDxe.inf
@@ -0,0 +1,60 @@
+### @file
+# Module Information file for the PlatformInit DXE driver.
+#
+# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License which accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+###
+
+[Defines]
+ INF_VERSION = 0x00010017
+ BASE_NAME = PlatformInitDxe
+ FILE_GUID = CA84408A-0929-4F11-BFED-18C7D9576C6B
+ VERSION_STRING = 1.0
+ MODULE_TYPE = DXE_DRIVER
+ ENTRY_POINT = PlatformInitDxeEntryPoint
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ DxeServicesTableLib
+ MemoryAllocationLib
+ PcdLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+ UefiLib
+ UefiRuntimeServicesTableLib
+ BoardInitLib
+ TestPointCheckLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MinPlatformPkg/MinPlatformPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+
+[Sources]
+ PlatformInitDxe.c
+
+[Pcd]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdProgressCodeOsLoaderLoad
+ gEfiMdeModulePkgTokenSpaceGuid.PcdProgressCodeOsLoaderStart
+
+[Protocols]
+ gEfiPciEnumerationCompleteProtocolGuid
+ gEfiDxeSmmReadyToLockProtocolGuid
+ gEfiRscHandlerProtocolGuid
+
+[Guids]
+ gEfiEventExitBootServicesGuid
+ gEfiEndOfDxeEventGroupGuid
+
+[Depex]
+ TRUE
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPostMem.c b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPostMem.c
new file mode 100644
index 0000000000..e8c3485186
--- /dev/null
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPostMem.c
@@ -0,0 +1,228 @@
+/** @file
+ Source code file for Platform Init PEI module
+
+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Library/IoLib.h>
+#include <Library/HobLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/PeiServicesLib.h>
+#include <IndustryStandard/Pci30.h>
+#include <Ppi/EndOfPeiPhase.h>
+#include <Library/MtrrLib.h>
+#include <Guid/SmramMemoryReserve.h>
+
+#include <Guid/FirmwareFileSystem2.h>
+#include <Protocol/FirmwareVolumeBlock.h>
+
+#include <Library/TimerLib.h>
+#include <Library/BoardInitLib.h>
+#include <Library/TestPointCheckLib.h>
+
+EFI_STATUS
+EFIAPI
+PlatformInitEndOfPei (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
+ IN VOID *Ppi
+ );
+
+static EFI_PEI_NOTIFY_DESCRIPTOR mEndOfPeiNotifyList = {
+ (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+ &gEfiEndOfPeiSignalPpiGuid,
+ (EFI_PEIM_NOTIFY_ENTRY_POINT) PlatformInitEndOfPei
+};
+
+/**
+ Update MTRR setting and set write back as default memory attribute.
+
+ @retval EFI_SUCCESS The function completes successfully.
+ @retval Others Some error occurs.
+**/
+EFI_STATUS
+EFIAPI
+SetCacheMtrrAfterEndOfPei (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ MTRR_SETTINGS MtrrSetting;
+ EFI_PEI_HOB_POINTERS Hob;
+ UINT64 MemoryBase;
+ UINT64 MemoryLength;
+ UINT64 Power2Length;
+ EFI_BOOT_MODE BootMode;
+ UINTN Index;
+ UINT64 SmramSize;
+ UINT64 SmramBase;
+ EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *SmramHobDescriptorBlock;
+ Status = PeiServicesGetBootMode (&BootMode);
+ ASSERT_EFI_ERROR (Status);
+
+ if (BootMode == BOOT_ON_S3_RESUME) {
+ return EFI_SUCCESS;
+ }
+ //
+ // Clear the CAR Settings
+ //
+ ZeroMem(&MtrrSetting, sizeof(MTRR_SETTINGS));
+
+ //
+ // Default Cachable attribute will be set to WB to support large memory size/hot plug memory
+ //
+ MtrrSetting.MtrrDefType &= ~((UINT64)(0xFF));
+ MtrrSetting.MtrrDefType |= (UINT64) CacheWriteBack;
+
+ //
+ // Set fixed cache for memory range below 1MB
+ //
+ Status = MtrrSetMemoryAttributeInMtrrSettings (
+ &MtrrSetting,
+ 0x0,
+ 0xA0000,
+ CacheWriteBack
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ Status = MtrrSetMemoryAttributeInMtrrSettings (
+ &MtrrSetting,
+ 0xA0000,
+ 0x20000,
+ CacheUncacheable
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ Status = MtrrSetMemoryAttributeInMtrrSettings (
+ &MtrrSetting,
+ 0xC0000,
+ 0x40000,
+ CacheWriteProtected
+ );
+ ASSERT_EFI_ERROR ( Status);
+
+ //
+ // PI SMM IPL can't set SMRAM to WB because at that time CPU ARCH protocol is not available.
+ // Set cacheability of SMRAM to WB here to improve SMRAM initialization performance.
+ //
+ SmramSize = 0;
+ SmramBase = 0;
+ Status = PeiServicesGetHobList ((VOID **) &Hob.Raw);
+ while (!END_OF_HOB_LIST (Hob)) {
+ if (Hob.Header->HobType == EFI_HOB_TYPE_GUID_EXTENSION) {
+ if (CompareGuid (&Hob.Guid->Name, &gEfiSmmPeiSmramMemoryReserveGuid)) {
+ SmramHobDescriptorBlock = (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *) (Hob.Guid + 1);
+ for (Index = 0; Index < SmramHobDescriptorBlock->NumberOfSmmReservedRegions; Index++) {
+ if (SmramHobDescriptorBlock->Descriptor[Index].PhysicalStart > 0x100000) {
+ SmramSize += SmramHobDescriptorBlock->Descriptor[Index].PhysicalSize;
+ if (SmramBase == 0 || SmramBase > SmramHobDescriptorBlock->Descriptor[Index].CpuStart) {
+ SmramBase = SmramHobDescriptorBlock->Descriptor[Index].CpuStart;
+ }
+ }
+ }
+ break;
+ }
+ }
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ }
+
+ //
+ // Set non system memory as UC
+ //
+ MemoryBase = 0x100000000;
+
+ //
+ // Add IED size to set whole SMRAM as WB to save MTRR count
+ //
+ MemoryLength = MemoryBase - (SmramBase + SmramSize);
+ while (MemoryLength != 0) {
+ Power2Length = GetPowerOfTwo64 (MemoryLength);
+ MemoryBase -= Power2Length;
+ Status = MtrrSetMemoryAttributeInMtrrSettings (
+ &MtrrSetting,
+ MemoryBase,
+ Power2Length,
+ CacheUncacheable
+ );
+ ASSERT_EFI_ERROR (Status);
+ MemoryLength -= Power2Length;
+ }
+
+ //
+ // Update MTRR setting from MTRR buffer
+ //
+ MtrrSetAllMtrrs (&MtrrSetting);
+
+ return Status;
+}
+
+/**
+ This function handles PlatformInit task at the end of PEI
+
+ @param[in] PeiServices Pointer to PEI Services Table.
+ @param[in] NotifyDesc Pointer to the descriptor for the Notification event that
+ caused this function to execute.
+ @param[in] Ppi Pointer to the PPI data associated with this function.
+
+ @retval EFI_SUCCESS The function completes successfully
+ @retval others
+**/
+EFI_STATUS
+EFIAPI
+PlatformInitEndOfPei (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
+ IN VOID *Ppi
+ )
+{
+ EFI_STATUS Status;
+
+ Status = BoardInitAfterSiliconInit ();
+ ASSERT_EFI_ERROR (Status);
+
+ Status = SetCacheMtrrAfterEndOfPei ();
+ ASSERT_EFI_ERROR (Status);
+
+ TestPointEndOfPei ();
+
+ return Status;
+}
+
+
+/**
+ Platform Init PEI module entry point
+
+ @param[in] FileHandle Not used.
+ @param[in] PeiServices General purpose services available to every PEIM.
+
+ @retval EFI_SUCCESS The function completes successfully
+ @retval EFI_OUT_OF_RESOURCES Insufficient resources to create database
+**/
+EFI_STATUS
+EFIAPI
+PlatformInitPostMemEntryPoint (
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+ EFI_STATUS Status;
+
+ Status = BoardInitBeforeSiliconInit ();
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Performing PlatformInitEndOfPei after EndOfPei PPI produced
+ //
+ Status = PeiServicesNotifyPpi (&mEndOfPeiNotifyList);
+
+ return Status;
+}
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPostMem.inf b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPostMem.inf
new file mode 100644
index 0000000000..264a9b23b9
--- /dev/null
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPostMem.inf
@@ -0,0 +1,59 @@
+### @file
+# Component information file for the Platform Init PEI module.
+#
+# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License which accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+###
+
+[Defines]
+ INF_VERSION = 0x00010017
+ BASE_NAME = PlatformInitPostMem
+ FILE_GUID = 59ADD62D-A1C0-44C5-A90F-A1168770468C
+ VERSION_STRING = 1.0
+ MODULE_TYPE = PEIM
+ ENTRY_POINT = PlatformInitPostMemEntryPoint
+
+[LibraryClasses]
+ PeimEntryPoint
+ DebugLib
+ IoLib
+ MemoryAllocationLib
+ BaseMemoryLib
+ HobLib
+ PeiServicesLib
+ MtrrLib
+ BoardInitLib
+ TestPointCheckLib
+
+[Packages]
+ MinPlatformPkg/MinPlatformPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ UefiCpuPkg/UefiCpuPkg.dec
+
+[Sources]
+ PlatformInitPostMem.c
+
+[Pcd]
+
+[Ppis]
+ gEfiEndOfPeiSignalPpiGuid ## CONSUMES
+ gEfiPeiReadOnlyVariable2PpiGuid
+
+[Protocols]
+
+[Guids]
+ gEfiSmmPeiSmramMemoryReserveGuid ## CONSUMES
+
+[Depex]
+ gEfiPeiMemoryDiscoveredPpiGuid
+
+[FixedPcd]
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.c b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.c
new file mode 100644
index 0000000000..10561513fe
--- /dev/null
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.c
@@ -0,0 +1,507 @@
+/** @file
+ Source code file for Platform Init Pre-Memory PEI module
+
+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Base.h>
+#include <IndustryStandard/Pci30.h>
+#include <Library/IoLib.h>
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/PcdLib.h>
+#include <Library/TimerLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/PeiServicesLib.h>
+#include <Library/MtrrLib.h>
+#include <Ppi/ReadOnlyVariable2.h>
+#include <Ppi/MemoryDiscovered.h>
+#include <Ppi/FirmwareVolumeInfo.h>
+#include <Ppi/BootInRecoveryMode.h>
+#include <Ppi/MasterBootMode.h>
+#include <Guid/FirmwareFileSystem2.h>
+#include <Library/PeiServicesTablePointerLib.h>
+#include <Library/BoardInitLib.h>
+#include <Library/TestPointCheckLib.h>
+#include <Guid/MemoryTypeInformation.h>
+
+EFI_STATUS
+EFIAPI
+PlatformInitPreMem (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
+ IN VOID *Ppi
+ );
+
+EFI_STATUS
+EFIAPI
+MemoryDiscoveredPpiNotifyCallback (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
+ IN VOID *Ppi
+ );
+
+static EFI_PEI_NOTIFY_DESCRIPTOR mPreMemNotifyList = {
+ (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+ &gEfiPeiReadOnlyVariable2PpiGuid,
+ (EFI_PEIM_NOTIFY_ENTRY_POINT) PlatformInitPreMem
+};
+
+static EFI_PEI_NOTIFY_DESCRIPTOR mMemDiscoveredNotifyList = {
+ (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+ &gEfiPeiMemoryDiscoveredPpiGuid,
+ (EFI_PEIM_NOTIFY_ENTRY_POINT) MemoryDiscoveredPpiNotifyCallback
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_PPI_DESCRIPTOR mPpiListRecoveryBootMode = {
+ (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+ &gEfiPeiBootInRecoveryModePpiGuid,
+ NULL
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_PPI_DESCRIPTOR mPpiBootMode = {
+ (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+ &gEfiPeiMasterBootModePpiGuid,
+ NULL
+};
+
+///
+/// Memory Reserved should be between 125% to 150% of the Current required memory
+/// otherwise BdsMisc.c would do a reset to make it 125% to avoid s4 resume issues.
+///
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {
+ { EfiACPIReclaimMemory, FixedPcdGet32 (PcdPlatformEfiAcpiReclaimMemorySize) }, // ASL
+ { EfiACPIMemoryNVS, FixedPcdGet32 (PcdPlatformEfiAcpiNvsMemorySize) }, // ACPI NVS (including S3 related)
+ { EfiReservedMemoryType, FixedPcdGet32 (PcdPlatformEfiReservedMemorySize) }, // BIOS Reserved (including S3 related)
+ { EfiRuntimeServicesData, FixedPcdGet32 (PcdPlatformEfiRtDataMemorySize) }, // Runtime Service Data
+ { EfiRuntimeServicesCode, FixedPcdGet32 (PcdPlatformEfiRtCodeMemorySize) }, // Runtime Service Code
+ { EfiMaxMemoryType, 0 }
+};
+
+VOID
+BuildMemoryTypeInformation (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_PEI_READ_ONLY_VARIABLE2_PPI *VariableServices;
+ UINTN DataSize;
+ EFI_MEMORY_TYPE_INFORMATION MemoryData[EfiMaxMemoryType + 1];
+
+ //
+ // Locate system configuration variable
+ //
+ Status = PeiServicesLocatePpi(
+ &gEfiPeiReadOnlyVariable2PpiGuid, // GUID
+ 0, // INSTANCE
+ NULL, // EFI_PEI_PPI_DESCRIPTOR
+ (VOID **) &VariableServices // PPI
+ );
+ ASSERT_EFI_ERROR(Status);
+
+ DataSize = sizeof (MemoryData);
+ Status = VariableServices->GetVariable (
+ VariableServices,
+ EFI_MEMORY_TYPE_INFORMATION_VARIABLE_NAME,
+ &gEfiMemoryTypeInformationGuid,
+ NULL,
+ &DataSize,
+ &MemoryData
+ );
+ if (EFI_ERROR(Status)) {
+ DataSize = sizeof (mDefaultMemoryTypeInformation);
+ CopyMem(MemoryData, mDefaultMemoryTypeInformation, DataSize);
+ }
+
+ ///
+ /// Build the GUID'd HOB for DXE
+ ///
+ BuildGuidDataHob (
+ &gEfiMemoryTypeInformationGuid,
+ MemoryData,
+ DataSize
+ );
+}
+
+/**
+ Set Cache Mtrr.
+**/
+VOID
+SetCacheMtrr (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_PEI_HOB_POINTERS Hob;
+ MTRR_SETTINGS MtrrSetting;
+ UINT64 MemoryBase;
+ UINT64 MemoryLength;
+ UINT64 LowMemoryLength;
+ UINT64 HighMemoryLength;
+ EFI_BOOT_MODE BootMode;
+ EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute;
+ UINT64 CacheMemoryLength;
+
+ ///
+ /// Reset all MTRR setting.
+ ///
+ ZeroMem(&MtrrSetting, sizeof(MTRR_SETTINGS));
+
+ ///
+ /// Cache the Flash area as WP to boost performance
+ ///
+ Status = MtrrSetMemoryAttributeInMtrrSettings (
+ &MtrrSetting,
+ (UINTN) FixedPcdGet32 (PcdFlashAreaBaseAddress),
+ (UINTN) FixedPcdGet32 (PcdFlashAreaSize),
+ CacheWriteProtected
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ ///
+ /// Update MTRR setting from MTRR buffer for Flash Region to be WP to boost performance
+ ///
+ MtrrSetAllMtrrs (&MtrrSetting);
+
+ ///
+ /// Set low to 1 MB. Since 1MB cacheability will always be set
+ /// until override by CSM.
+ /// Initialize high memory to 0.
+ ///
+ LowMemoryLength = 0x100000;
+ HighMemoryLength = 0;
+ ResourceAttribute = (
+ EFI_RESOURCE_ATTRIBUTE_PRESENT |
+ EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
+ EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
+ EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
+ EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
+ EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
+ );
+
+ Status = PeiServicesGetBootMode (&BootMode);
+ ASSERT_EFI_ERROR (Status);
+
+ if (BootMode != BOOT_ON_S3_RESUME) {
+ ResourceAttribute |= EFI_RESOURCE_ATTRIBUTE_TESTED;
+ }
+
+ Status = PeiServicesGetHobList ((VOID **) &Hob.Raw);
+ while (!END_OF_HOB_LIST (Hob)) {
+ if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
+ if ((Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) ||
+ ((Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_MEMORY_RESERVED) &&
+ (Hob.ResourceDescriptor->ResourceAttribute == ResourceAttribute))
+ ) {
+ if (Hob.ResourceDescriptor->PhysicalStart >= 0x100000000ULL) {
+ HighMemoryLength += Hob.ResourceDescriptor->ResourceLength;
+ } else if (Hob.ResourceDescriptor->PhysicalStart >= 0x100000) {
+ LowMemoryLength += Hob.ResourceDescriptor->ResourceLength;
+ }
+ }
+ }
+
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ }
+
+ DEBUG ((DEBUG_INFO, "Memory Length (Below 4GB) = %lx.\n", LowMemoryLength));
+ DEBUG ((DEBUG_INFO, "Memory Length (Above 4GB) = %lx.\n", HighMemoryLength));
+
+ ///
+ /// Assume size of main memory is multiple of 256MB
+ ///
+ MemoryLength = (LowMemoryLength + 0xFFFFFFF) & 0xF0000000;
+ MemoryBase = 0;
+
+ CacheMemoryLength = MemoryLength;
+ ///
+ /// Programming MTRRs to avoid override SPI region with UC when MAX TOLUD Length >= 3.5GB
+ ///
+ if (MemoryLength > 0xDC000000) {
+ CacheMemoryLength = 0xC0000000;
+ Status = MtrrSetMemoryAttributeInMtrrSettings (
+ &MtrrSetting,
+ MemoryBase,
+ CacheMemoryLength,
+ CacheWriteBack
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ MemoryBase = 0xC0000000;
+ CacheMemoryLength = MemoryLength - 0xC0000000;
+ if (MemoryLength > 0xE0000000) {
+ CacheMemoryLength = 0x20000000;
+ Status = MtrrSetMemoryAttributeInMtrrSettings (
+ &MtrrSetting,
+ MemoryBase,
+ CacheMemoryLength,
+ CacheWriteBack
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ MemoryBase = 0xE0000000;
+ CacheMemoryLength = MemoryLength - 0xE0000000;
+ }
+ }
+
+ Status = MtrrSetMemoryAttributeInMtrrSettings (
+ &MtrrSetting,
+ MemoryBase,
+ CacheMemoryLength,
+ CacheWriteBack
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ if (LowMemoryLength != MemoryLength) {
+ MemoryBase = LowMemoryLength;
+ MemoryLength -= LowMemoryLength;
+ Status = MtrrSetMemoryAttributeInMtrrSettings (
+ &MtrrSetting,
+ MemoryBase,
+ MemoryLength,
+ CacheUncacheable
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
+
+ ///
+ /// VGA-MMIO - 0xA0000 to 0xC0000 to be UC
+ ///
+ Status = MtrrSetMemoryAttributeInMtrrSettings (
+ &MtrrSetting,
+ 0xA0000,
+ 0x20000,
+ CacheUncacheable
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ ///
+ /// Update MTRR setting from MTRR buffer
+ ///
+ MtrrSetAllMtrrs (&MtrrSetting);
+
+ return ;
+}
+
+VOID
+ReportCpuHob (
+ VOID
+ )
+{
+ UINT8 PhysicalAddressBits;
+ UINT32 RegEax;
+
+ AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
+ if (RegEax >= 0x80000008) {
+ AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
+ PhysicalAddressBits = (UINT8) RegEax;
+ } else {
+ PhysicalAddressBits = 36;
+ }
+
+ ///
+ /// Create a CPU hand-off information
+ ///
+ BuildCpuHob (PhysicalAddressBits, 16);
+}
+
+VOID
+ReportFv (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_BOOT_MODE BootMode;
+
+ Status = PeiServicesGetBootMode (&BootMode);
+ ASSERT_EFI_ERROR (Status);
+
+ ///
+ /// Build HOB for DXE
+ ///
+ if (BootMode == BOOT_IN_RECOVERY_MODE) {
+ ///
+ /// Prepare the recovery service
+ ///
+ } else {
+
+ PeiServicesInstallFvInfo2Ppi (
+ &(((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) FixedPcdGet32 (PcdFlashFvMainBase))->FileSystemGuid),
+ (VOID *) (UINTN) FixedPcdGet32 (PcdFlashFvMainBase),
+ FixedPcdGet32 (PcdFlashFvMainSize),
+ NULL,
+ NULL,
+ 0
+ );
+ }
+
+ //
+ // Report resource HOB for flash FV
+ //
+ BuildResourceDescriptorHob (
+ EFI_RESOURCE_MEMORY_MAPPED_IO,
+ (EFI_RESOURCE_ATTRIBUTE_PRESENT |
+ EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
+ EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE),
+ (UINTN) FixedPcdGet32 (PcdFlashAreaBaseAddress),
+ (UINTN) FixedPcdGet32 (PcdFlashAreaSize)
+ );
+ BuildMemoryAllocationHob (
+ (UINTN) FixedPcdGet32 (PcdFlashAreaBaseAddress),
+ (UINTN) FixedPcdGet32 (PcdFlashAreaSize),
+ EfiMemoryMappedIO
+ );
+
+ BuildFvHob (
+ (UINTN) FixedPcdGet32 (PcdFlashAreaBaseAddress),
+ (UINTN) FixedPcdGet32 (PcdFlashAreaSize)
+ );
+}
+
+/**
+ Install Firmware Volume Hob's once there is main memory
+
+ @param[in] PeiServices General purpose services available to every PEIM.
+ @param[in] NotifyDescriptor Notify that this module published.
+ @param[in] Ppi PPI that was installed.
+
+ @retval EFI_SUCCESS The function completed successfully.
+**/
+EFI_STATUS
+EFIAPI
+MemoryDiscoveredPpiNotifyCallback (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
+ IN VOID *Ppi
+ )
+{
+ EFI_STATUS Status;
+ EFI_BOOT_MODE BootMode;
+
+ Status = BoardInitAfterMemoryInit ();
+ ASSERT_EFI_ERROR (Status);
+
+ Status = PeiServicesGetBootMode (&BootMode);
+ ASSERT_EFI_ERROR (Status);
+
+ SetCacheMtrr ();
+
+ ReportCpuHob ();
+
+ ///
+ /// If S3 resume, then we are done
+ ///
+ if (BootMode == BOOT_ON_S3_RESUME) {
+ return EFI_SUCCESS;
+ }
+
+ ReportFv ();
+
+ TestPointMemoryDiscovered ();
+
+ if (PcdGetBool (PcdStopAfterMemInit)) {
+ CpuDeadLoop ();
+ }
+
+ return Status;
+}
+
+
+/**
+ This function handles PlatformInit task after PeiReadOnlyVariable2 PPI produced
+
+ @param[in] PeiServices Pointer to PEI Services Table.
+ @param[in] NotifyDesc Pointer to the descriptor for the Notification event that
+ caused this function to execute.
+ @param[in] Ppi Pointer to the PPI data associated with this function.
+
+ @retval EFI_SUCCESS The function completes successfully
+ @retval others
+**/
+EFI_STATUS
+EFIAPI
+PlatformInitPreMem (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
+ IN VOID *Ppi
+ )
+{
+ EFI_STATUS Status;
+ EFI_BOOT_MODE BootMode;
+
+ //
+ // Start board detection
+ //
+ BoardDetect ();
+
+ BoardDebugInit ();
+
+ TestPointDebugInitDone ();
+
+ if (PcdGetBool (PcdStopAfterDebugInit)) {
+ CpuDeadLoop ();
+ }
+
+ BootMode = BoardBootModeDetect ();
+ Status = PeiServicesSetBootMode (BootMode);
+ ASSERT_EFI_ERROR (Status);
+ if (BootMode == BOOT_IN_RECOVERY_MODE) {
+ Status = PeiServicesInstallPpi (&mPpiListRecoveryBootMode);
+ }
+ ///
+ /// Signal possible dependent modules that there has been a
+ /// final boot mode determination, it is used to build BIST
+ /// Hob for Dxe use.
+ ///
+ Status = PeiServicesInstallPpi (&mPpiBootMode);
+ ASSERT_EFI_ERROR (Status);
+
+ BuildMemoryTypeInformation ();
+
+ Status = BoardInitBeforeMemoryInit ();
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+
+
+/**
+ Platform Init before memory PEI module entry point
+
+ @param[in] FileHandle Not used.
+ @param[in] PeiServices General purpose services available to every PEIM.
+
+ @retval EFI_SUCCESS The function completes successfully
+ @retval EFI_OUT_OF_RESOURCES Insufficient resources to create database
+**/
+EFI_STATUS
+EFIAPI
+PlatformInitPreMemEntryPoint (
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+ EFI_STATUS Status;
+
+ ///
+ /// Performing PlatformInitPreMem after PeiReadOnlyVariable2 PPI produced
+ ///
+ Status = PeiServicesNotifyPpi (&mPreMemNotifyList);
+
+ ///
+ /// After code reorangized, memorycallback will run because the PPI is already
+ /// installed when code run to here, it is supposed that the InstallEfiMemory is
+ /// done before.
+ ///
+ Status = PeiServicesNotifyPpi (&mMemDiscoveredNotifyList);
+
+ return Status;
+}
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf
new file mode 100644
index 0000000000..82c503814b
--- /dev/null
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf
@@ -0,0 +1,71 @@
+### @file
+# Component information file for the Platform Init Pre-Memory PEI module.
+#
+# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License which accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+###
+
+[Defines]
+ INF_VERSION = 0x00010017
+ BASE_NAME = PlatformInitPreMem
+ FILE_GUID = EEEE611D-F78F-4FB9-B868-55907F169280
+ VERSION_STRING = 1.0
+ MODULE_TYPE = PEIM
+ ENTRY_POINT = PlatformInitPreMemEntryPoint
+
+[LibraryClasses]
+ PeimEntryPoint
+ DebugLib
+ IoLib
+ MemoryAllocationLib
+ BaseMemoryLib
+ HobLib
+ PeiServicesLib
+ MtrrLib
+ TimerLib
+ BoardInitLib
+ TestPointCheckLib
+
+[Packages]
+ MinPlatformPkg/MinPlatformPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ UefiCpuPkg/UefiCpuPkg.dec
+
+[Pcd]
+ gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdStopAfterDebugInit
+ gPlatformModuleTokenSpaceGuid.PcdStopAfterMemInit
+
+[FixedPcd]
+ gPlatformModuleTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdPlatformEfiReservedMemorySize ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize ## CONSUMES
+
+[Sources]
+ PlatformInitPreMem.c
+
+[Ppis]
+ gEfiPeiMemoryDiscoveredPpiGuid
+ gEfiPeiMasterBootModePpiGuid ## PRODUCES
+ gEfiPeiBootInRecoveryModePpiGuid ## PRODUCES
+ gEfiPeiReadOnlyVariable2PpiGuid
+
+[Guids]
+ gEfiMemoryTypeInformationGuid
+
+[Depex]
+ TRUE
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitSmm/PlatformInitSmm.c b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitSmm/PlatformInitSmm.c
new file mode 100644
index 0000000000..c4d3f52436
--- /dev/null
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitSmm/PlatformInitSmm.c
@@ -0,0 +1,168 @@
+/** @file
+ This driver will register two callbacks to call fsp's notifies.
+
+ Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiSmm.h>
+
+#include <Protocol/SmmReadyToLock.h>
+#include <Protocol/SmmEndOfDxe.h>
+#include <Protocol/SmmReadyToBoot.h>
+#include <Protocol/SmmExitBootServices.h>
+
+#include <Library/UefiDriverEntryPoint.h>
+#include <Library/SmmServicesTableLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/BoardInitLib.h>
+#include <Library/TestPointCheckLib.h>
+#include <Library/PerformanceLib.h>
+#include <Library/HobLib.h>
+
+/**
+ SMM End Of Dxe event notification handler.
+
+ @param[in] Protocol Points to the protocol's unique identifier.
+ @param[in] Interface Points to the interface instance.
+ @param[in] Handle The handle on which the interface was installed.
+
+ @retval EFI_SUCCESS Notification handler runs successfully.
+**/
+EFI_STATUS
+EFIAPI
+SmmEndOfDxeEventNotify (
+ IN CONST EFI_GUID *Protocol,
+ IN VOID *Interface,
+ IN EFI_HANDLE Handle
+ )
+{
+ TestPointSmmEndOfDxe ();
+ return EFI_SUCCESS;
+}
+
+/**
+ SMM Ready To Lock event notification handler.
+
+ @param[in] Protocol Points to the protocol's unique identifier.
+ @param[in] Interface Points to the interface instance.
+ @param[in] Handle The handle on which the interface was installed.
+
+ @retval EFI_SUCCESS Notification handler runs successfully.
+**/
+EFI_STATUS
+EFIAPI
+SmmReadyToLockEventNotify (
+ IN CONST EFI_GUID *Protocol,
+ IN VOID *Interface,
+ IN EFI_HANDLE Handle
+ )
+{
+ TestPointSmmReadyToLock ();
+ return EFI_SUCCESS;
+}
+
+/**
+ SMM Ready To Boot event notification handler.
+
+ @param[in] Protocol Points to the protocol's unique identifier.
+ @param[in] Interface Points to the interface instance.
+ @param[in] Handle The handle on which the interface was installed.
+
+ @retval EFI_SUCCESS Notification handler runs successfully.
+**/
+EFI_STATUS
+EFIAPI
+SmmReadyToBootEventNotify (
+ IN CONST EFI_GUID *Protocol,
+ IN VOID *Interface,
+ IN EFI_HANDLE Handle
+ )
+{
+ TestPointSmmReadyToBoot ();
+ return EFI_SUCCESS;
+}
+
+/**
+ SMM Exit Boot Services event notification handler.
+
+ @param[in] Protocol Points to the protocol's unique identifier.
+ @param[in] Interface Points to the interface instance.
+ @param[in] Handle The handle on which the interface was installed.
+
+ @retval EFI_SUCCESS Notification handler runs successfully.
+**/
+EFI_STATUS
+EFIAPI
+SmmExitBootServicesEventNotify (
+ IN CONST EFI_GUID *Protocol,
+ IN VOID *Interface,
+ IN EFI_HANDLE Handle
+ )
+{
+ TestPointSmmExitBootServices ();
+ return EFI_SUCCESS;
+}
+
+/**
+ Initialize SMM Platform.
+
+ @param[in] ImageHandle Image handle of this driver.
+ @param[in] SystemTable Global system service table.
+
+ @retval EFI_SUCCESS Initialization complete.
+ @exception EFI_UNSUPPORTED The chipset is unsupported by this driver.
+ @retval EFI_OUT_OF_RESOURCES Do not have enough resources to initialize the driver.
+ @retval EFI_DEVICE_ERROR Device error, driver exits abnormally.
+**/
+EFI_STATUS
+EFIAPI
+PlatformInitSmmEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ VOID *SmmEndOfDxeRegistration;
+ VOID *SmmReadyToLockRegistration;
+ VOID *SmmReadyToBootRegistration;
+ VOID *SmmExitBootServicesRegistration;
+
+ Status = gSmst->SmmRegisterProtocolNotify (
+ &gEfiSmmEndOfDxeProtocolGuid,
+ SmmEndOfDxeEventNotify,
+ &SmmEndOfDxeRegistration
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ Status = gSmst->SmmRegisterProtocolNotify (
+ &gEfiSmmReadyToLockProtocolGuid,
+ SmmReadyToLockEventNotify,
+ &SmmReadyToLockRegistration
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ Status = gSmst->SmmRegisterProtocolNotify (
+ &gEdkiiSmmReadyToBootProtocolGuid,
+ SmmReadyToBootEventNotify,
+ &SmmReadyToBootRegistration
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ Status = gSmst->SmmRegisterProtocolNotify (
+ &gEdkiiSmmExitBootServicesProtocolGuid,
+ SmmExitBootServicesEventNotify,
+ &SmmExitBootServicesRegistration
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return EFI_SUCCESS;
+} \ No newline at end of file
diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
new file mode 100644
index 0000000000..d845a63467
--- /dev/null
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
@@ -0,0 +1,52 @@
+### @file
+# Module Information file for the PlatformInit DXE driver.
+#
+# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License which accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+###
+
+[Defines]
+ INF_VERSION = 0x00010017
+ BASE_NAME = PlatformInitSmm
+ FILE_GUID = EE447DFD-7B3A-4F39-80FC-ED02BB20F6A0
+ VERSION_STRING = 1.0
+ MODULE_TYPE = DXE_SMM_DRIVER
+ PI_SPECIFICATION_VERSION = 1.10
+ ENTRY_POINT = PlatformInitSmmEntryPoint
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ DxeServicesTableLib
+ MemoryAllocationLib
+ PcdLib
+ SmmServicesTableLib
+ UefiDriverEntryPoint
+ BoardInitLib
+ TestPointCheckLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MinPlatformPkg/MinPlatformPkg.dec
+
+[Sources]
+ PlatformInitSmm.c
+
+[Protocols]
+ gEfiSmmReadyToLockProtocolGuid
+ gEfiSmmEndOfDxeProtocolGuid
+ gEdkiiSmmReadyToBootProtocolGuid
+ gEdkiiSmmExitBootServicesProtocolGuid
+
+[Depex]
+ TRUE