diff options
Diffstat (limited to 'Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib')
7 files changed, 427 insertions, 0 deletions
diff --git a/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/DxeBoardAcpiTableLib.c b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/DxeBoardAcpiTableLib.c new file mode 100644 index 0000000000..c1926d4924 --- /dev/null +++ b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/DxeBoardAcpiTableLib.c @@ -0,0 +1,41 @@ +/** @file
+
+Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Base.h>
+#include <Uefi.h>
+#include <PiDxe.h>
+#include <Library/BaseLib.h>
+#include <Library/IoLib.h>
+#include <Library/BoardAcpiTableLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DebugLib.h>
+
+EFI_STATUS
+EFIAPI
+MtOlympusBoardUpdateAcpiTable (
+ IN OUT EFI_ACPI_COMMON_HEADER *Table,
+ IN OUT EFI_ACPI_TABLE_VERSION *Version
+ );
+
+EFI_STATUS
+EFIAPI
+BoardUpdateAcpiTable (
+ IN OUT EFI_ACPI_COMMON_HEADER *Table,
+ IN OUT EFI_ACPI_TABLE_VERSION *Version
+ )
+{
+ MtOlympusBoardUpdateAcpiTable (Table, Version);
+
+ return EFI_SUCCESS;
+}
+
diff --git a/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf new file mode 100644 index 0000000000..031e6576bf --- /dev/null +++ b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf @@ -0,0 +1,47 @@ +### @file
+#
+# Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License which accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+###
+
+[Defines]
+ INF_VERSION = 0x00010017
+ BASE_NAME = DxeBoardAcpiTableLib
+ FILE_GUID = 6562E0AE-90D8-4D41-8C97-81286B4BE7D2
+ VERSION_STRING = 1.0
+ MODULE_TYPE = BASE
+ LIBRARY_CLASS = BoardAcpiTableLib
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+[LibraryClasses]
+ BaseLib
+ IoLib
+ PciLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MinPlatformPkg/MinPlatformPkg.dec
+ PurleyOpenBoardPkg/PlatPkg.dec
+ LewisburgPkg/PchRcPkg.dec
+
+[Pcd]
+ gOemSkuTokenSpaceGuid.PcdAcpiGnvsAddress
+
+[Sources]
+ DxeMtOlympusAcpiTableLib.c
+ DxeBoardAcpiTableLib.c
+
diff --git a/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/DxeMtOlympusAcpiTableLib.c b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/DxeMtOlympusAcpiTableLib.c new file mode 100644 index 0000000000..310740e6fb --- /dev/null +++ b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/DxeMtOlympusAcpiTableLib.c @@ -0,0 +1,58 @@ +/** @file
+
+Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Base.h>
+#include <Uefi.h>
+#include <PiDxe.h>
+#include <Library/BaseLib.h>
+#include <Library/IoLib.h>
+#include <Library/BoardAcpiTableLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DebugLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Acpi/GlobalNvsAreaDef.h>
+
+GLOBAL_REMOVE_IF_UNREFERENCED BIOS_ACPI_PARAM *mGlobalNvsArea;
+
+VOID
+MtOlympusUpdateGlobalNvs (
+ VOID
+ )
+{
+
+ //
+ // Allocate and initialize the NVS area for SMM and ASL communication.
+ //
+ mGlobalNvsArea = (VOID *)(UINTN)PcdGet64 (PcdAcpiGnvsAddress);
+
+ //
+ // Update global NVS area for ASL and SMM init code to use
+ //
+
+
+}
+
+EFI_STATUS
+EFIAPI
+MtOlympusBoardUpdateAcpiTable (
+ IN OUT EFI_ACPI_COMMON_HEADER *Table,
+ IN OUT EFI_ACPI_TABLE_VERSION *Version
+ )
+{
+ if (Table->Signature == EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE) {
+ MtOlympusUpdateGlobalNvs ();
+ }
+
+ return EFI_SUCCESS;
+}
+
diff --git a/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.c b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.c new file mode 100644 index 0000000000..f8b6aab8f9 --- /dev/null +++ b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.c @@ -0,0 +1,67 @@ +/** @file
+
+Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Base.h>
+#include <Uefi.h>
+#include <PiDxe.h>
+#include <Library/BaseLib.h>
+#include <Library/IoLib.h>
+#include <Library/BoardAcpiEnableLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DebugLib.h>
+
+EFI_STATUS
+EFIAPI
+MtOlympusBoardEnableAcpi (
+ IN BOOLEAN EnableSci
+ );
+
+EFI_STATUS
+EFIAPI
+MtOlympusBoardDisableAcpi (
+ IN BOOLEAN DisableSci
+ );
+
+EFI_STATUS
+EFIAPI
+SiliconEnableAcpi (
+ IN BOOLEAN EnableSci
+ );
+
+EFI_STATUS
+EFIAPI
+SiliconDisableAcpi (
+ IN BOOLEAN DisableSci
+ );
+
+EFI_STATUS
+EFIAPI
+BoardEnableAcpi (
+ IN BOOLEAN EnableSci
+ )
+{
+ SiliconEnableAcpi (EnableSci);
+ return MtOlympusBoardEnableAcpi (EnableSci);
+}
+
+EFI_STATUS
+EFIAPI
+BoardDisableAcpi (
+ IN BOOLEAN DisableSci
+ )
+{
+ SiliconDisableAcpi (DisableSci);
+ return MtOlympusBoardDisableAcpi (DisableSci);
+}
+
+
diff --git a/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.inf b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.inf new file mode 100644 index 0000000000..22c7fbe335 --- /dev/null +++ b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.inf @@ -0,0 +1,47 @@ +### @file
+#
+# Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License which accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+###
+
+[Defines]
+ INF_VERSION = 0x00010017
+ BASE_NAME = SmmBoardAcpiEnableLib
+ FILE_GUID = 549E69AE-D3B3-485B-9C17-AF16E20A58AD
+ VERSION_STRING = 1.0
+ MODULE_TYPE = BASE
+ LIBRARY_CLASS = BoardAcpiEnableLib
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+[LibraryClasses]
+ BaseLib
+ IoLib
+ PciLib
+ MmPciLib
+ PchCycleDecodingLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MinPlatformPkg/MinPlatformPkg.dec
+ PurleyOpenBoardPkg/PlatPkg.dec
+ LewisburgPkg/PchRcPkg.dec
+
+[Sources]
+ SmmMtOlympusAcpiEnableLib.c
+ SmmSiliconAcpiEnableLib.c
+ SmmBoardAcpiEnableLib.c
+
diff --git a/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/SmmMtOlympusAcpiEnableLib.c b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/SmmMtOlympusAcpiEnableLib.c new file mode 100644 index 0000000000..19b1fd7bb7 --- /dev/null +++ b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/SmmMtOlympusAcpiEnableLib.c @@ -0,0 +1,42 @@ +/** @file
+
+Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Base.h>
+#include <Uefi.h>
+#include <PiDxe.h>
+#include <Library/BaseLib.h>
+#include <Library/IoLib.h>
+#include <Library/BoardAcpiTableLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DebugLib.h>
+
+EFI_STATUS
+EFIAPI
+MtOlympusBoardEnableAcpi (
+ IN BOOLEAN EnableSci
+ )
+{
+ // enable additional board register
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+MtOlympusBoardDisableAcpi (
+ IN BOOLEAN DisableSci
+ )
+{
+ // enable additional board register
+ return EFI_SUCCESS;
+}
+
diff --git a/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/SmmSiliconAcpiEnableLib.c b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/SmmSiliconAcpiEnableLib.c new file mode 100644 index 0000000000..65aa7b067a --- /dev/null +++ b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/SmmSiliconAcpiEnableLib.c @@ -0,0 +1,125 @@ +/** @file
+
+Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Base.h>
+#include <Uefi.h>
+#include <PiDxe.h>
+#include <Library/BaseLib.h>
+#include <Library/IoLib.h>
+#include <Library/BoardAcpiEnableLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DebugLib.h>
+#include <PchAccess.h>
+#include <Library/PchCycleDecodingLib.h>
+
+/**
+ Clear Port 80h
+
+ SMI handler to enable ACPI mode
+
+ Dispatched on reads from APM port with value EFI_ACPI_ENABLE_SW_SMI
+
+ Disables the SW SMI Timer.
+ ACPI events are disabled and ACPI event status is cleared.
+ SCI mode is then enabled.
+
+ Clear SLP SMI status
+ Enable SLP SMI
+
+ Disable SW SMI Timer
+
+ Clear all ACPI event status and disable all ACPI events
+
+ Disable PM sources except power button
+ Clear status bits
+
+ Disable GPE0 sources
+ Clear status bits
+
+ Disable GPE1 sources
+ Clear status bits
+
+ Guarantee day-of-month alarm is invalid (ACPI 1.0 section 4.7.2.4)
+
+ Enable SCI
+**/
+EFI_STATUS
+EFIAPI
+SiliconEnableAcpi (
+ IN BOOLEAN EnableSci
+ )
+{
+ UINT32 SmiEn;
+ UINT16 Pm1En;
+ UINT16 Pm1Cnt;
+ UINT16 PchPmBase;
+
+ //
+ // Init Power Management I/O Base aka ACPI Base
+ //
+ PchAcpiBaseGet (&PchPmBase);
+
+ SmiEn = IoRead32 (PchPmBase + R_PCH_SMI_EN);
+
+ //
+ // Disable SW SMI Timer and legacy USB
+ //
+ SmiEn &= ~(B_PCH_SMI_EN_SWSMI_TMR | B_PCH_SMI_EN_LEGACY_USB | B_PCH_SMI_EN_LEGACY_USB2);
+
+ //
+ // And enable SMI on write to B_PCH_ACPI_PM1_CNT_SLP_EN when SLP_TYP is written
+ //
+ SmiEn |= B_PCH_SMI_EN_ON_SLP_EN;
+ IoWrite32 (PchPmBase + R_PCH_SMI_EN, SmiEn);
+
+ //
+ // Disable PM sources except power button
+ //
+ Pm1En = B_PCH_ACPI_PM1_EN_PWRBTN;
+ IoWrite16 (PchPmBase + R_PCH_ACPI_PM1_EN, Pm1En);
+
+ //
+ // Enable SCI
+ //
+ Pm1Cnt = IoRead16 (PchPmBase + R_PCH_ACPI_PM1_CNT);
+ Pm1Cnt |= B_PCH_ACPI_PM1_CNT_SCI_EN;
+ IoWrite16 (PchPmBase + R_PCH_ACPI_PM1_CNT, Pm1Cnt);
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+SiliconDisableAcpi (
+ IN BOOLEAN DisableSci
+ )
+{
+ UINT16 Pm1Cnt;
+ UINT16 PchPmBase;
+
+ //
+ // Init Power Management I/O Base aka ACPI Base
+ //
+ PchAcpiBaseGet (&PchPmBase);
+
+ Pm1Cnt = IoRead16 (PchPmBase + R_PCH_ACPI_PM1_CNT);
+
+ //
+ // Disable SCI
+ //
+ Pm1Cnt &= ~B_PCH_ACPI_PM1_CNT_SCI_EN;
+
+ IoWrite16 (PchPmBase + R_PCH_ACPI_PM1_CNT, Pm1Cnt);
+
+ return EFI_SUCCESS;
+}
|