diff options
Diffstat (limited to 'Platform')
3 files changed, 5 insertions, 42 deletions
diff --git a/Platform/BroxtonPlatformPkg/Common/Library/PeiFspPolicyInitLib/PeiFspScPolicyInitLib.c b/Platform/BroxtonPlatformPkg/Common/Library/PeiFspPolicyInitLib/PeiFspScPolicyInitLib.c index 47ec706006..640900688d 100644 --- a/Platform/BroxtonPlatformPkg/Common/Library/PeiFspPolicyInitLib/PeiFspScPolicyInitLib.c +++ b/Platform/BroxtonPlatformPkg/Common/Library/PeiFspPolicyInitLib/PeiFspScPolicyInitLib.c @@ -1,7 +1,7 @@ /** @file
Implementation of Fsp SC Policy Initialization.
- Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -601,7 +601,7 @@ PeiFspScPolicyInit ( // Flash Protection Range Register initialization
//
for (Index = 0; Index < SC_FLASH_PROTECTED_RANGES; Index++) {
- FspsUpd->FspsConfig.WriteProtectionEnable[Index] = TRUE;
+ FspsUpd->FspsConfig.WriteProtectionEnable[Index] = SystemConfiguration->ScBiosLock == TRUE ? TRUE : FALSE;
FspsUpd->FspsConfig.ReadProtectionEnable[Index] = FALSE;
}
diff --git a/Platform/BroxtonPlatformPkg/Common/Library/PeiPolicyUpdateLib/PeiScPolicyUpdate.c b/Platform/BroxtonPlatformPkg/Common/Library/PeiPolicyUpdateLib/PeiScPolicyUpdate.c index 6d9fc52de5..c98a8df657 100644 --- a/Platform/BroxtonPlatformPkg/Common/Library/PeiPolicyUpdateLib/PeiScPolicyUpdate.c +++ b/Platform/BroxtonPlatformPkg/Common/Library/PeiPolicyUpdateLib/PeiScPolicyUpdate.c @@ -1,7 +1,7 @@ /** @file
This file is SampleCode of the library for Intel PCH PEI Policy initialization.
- Copyright (c) 2004 - 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2004 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -277,13 +277,11 @@ UpdatePeiScPolicy ( UINT16 BoardId;
UINTN VariableSize;
SYSTEM_CONFIGURATION SystemConfiguration;
- UINT8 Index;
UINT8 PortIndex;
UINT32 SpiHsfsReg;
UINT32 SpiFdodReg;
UINT8 DevIndex;
UINT8 HdaIndex;
- BOOLEAN FlashProtectionEnabled;
SC_GENERAL_CONFIG *GeneralConfig;
SC_SATA_CONFIG *SataConfig;
SC_PCIE_CONFIG *PcieConfig;
@@ -729,41 +727,6 @@ UpdatePeiScPolicy ( }
PmConfig->PowerButterDebounceMode = SystemConfiguration.PowerButterDebounceMode;
- if ((GetBxtSeries() == BxtP) && (IsSpiBoot ())) {
- //
- // Configure Flash Protection Range Registers
- //
- FlashProtectionEnabled = SystemConfiguration.FprrEnable == TRUE ? TRUE : FALSE;
-
- //
- // Enabling Flash Protection Range Registers
- // Enable FPRR policy and set up ranges on non-Capsule Update flow with Flash Wear-Out Protection enabled
- // PrintFlashProtectionConfig() dumps FPRR information during ScPrintPolicyPpi()
- // FPRR bit is enabled by default as per Platform policy, except that when system is in recovery mode or FDO is enabled. In this case this will be disabled as part of Firmware Update / Recovery update
- //
- if (FlashProtectionEnabled && (FdoEnabledGuidHob == NULL)) {
- //
- // Flash Protection Range Register initialization
- //
- for (Index = 0; Index < SC_FLASH_PROTECTED_RANGES; Index++) {
- FlashProtectionConfig->ProtectRange[Index].WriteProtectionEnable = TRUE;
- FlashProtectionConfig->ProtectRange[Index].ReadProtectionEnable = FALSE;
- }
-
- DEBUG ((EFI_D_INFO, "IbbOffset = %x , IbbSize = %x\n", FixedPcdGet32 (PcdFlashIbbRegionMappedBase), FixedPcdGet32 (PcdFlashIbbRegionSize)));
- DEBUG ((EFI_D_INFO, "ObbOffset = %x , ObbSize = %x\n", FixedPcdGet32 (PcdFlashObbRegionMappedBase), FixedPcdGet32 (PcdFlashObbRegionSize)));
-
- //
- // Assign FPRR ranges
- //
- FlashProtectionConfig->ProtectRange[0].ProtectedRangeBase = (UINT16) ((FixedPcdGet32 (PcdFlashIbbRegionMappedBase) - FixedPcdGet32 (PcdFlashAreaBaseAddress)) >> 12);
- FlashProtectionConfig->ProtectRange[0].ProtectedRangeLimit = (UINT16) ((FixedPcdGet32 (PcdFlashIbbRegionMappedBase) - FixedPcdGet32 (PcdFlashAreaBaseAddress) + FixedPcdGet32 (PcdFlashIbbRegionSize) - 1) >> 12);
- FlashProtectionConfig->ProtectRange[1].ProtectedRangeBase = (UINT16) ((FixedPcdGet32 (PcdFlashObbRegionMappedBase) - FixedPcdGet32 (PcdFlashAreaBaseAddress)) >> 12);
- FlashProtectionConfig->ProtectRange[1].ProtectedRangeLimit = (UINT16) ((FixedPcdGet32 (PcdFlashObbRegionMappedBase) - FixedPcdGet32 (PcdFlashAreaBaseAddress) + FixedPcdGet32 (PcdFlashObbRegionSize) - 1) >> 12);
- } else {
- DEBUG ((DEBUG_INFO, " BIOS FPRR is not done -FDO ASSERT Status "));
- }
- }
DciConfig->DciEn = SystemConfiguration.DciEn;
DciConfig->DciAutoDetect = SystemConfiguration.DciAutoDetect;
diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/SouthClusterConfig.vfi b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/SouthClusterConfig.vfi index 411006b384..f2a09c236f 100644 --- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/SouthClusterConfig.vfi +++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/SouthClusterConfig.vfi @@ -145,8 +145,8 @@ form formid = MISC_OPTIONS_FORM_ID, oneof varid = Setup.ScBiosLock,
prompt = STRING_TOKEN(STR_PCH_BLE_PROMPT),
help = STRING_TOKEN(STR_PCH_BLE_HELP),
- option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED;
- option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED;
endoneof;
oneof varid = Setup.RtcLock,
prompt = STRING_TOKEN(STR_PCH_RTC_LOCK_PROMPT),
|