diff options
Diffstat (limited to 'Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library')
13 files changed, 1937 insertions, 0 deletions
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSaPolicyLib/DxeSaPolicyLib.c b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSaPolicyLib/DxeSaPolicyLib.c new file mode 100644 index 0000000000..0313a07274 --- /dev/null +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSaPolicyLib/DxeSaPolicyLib.c @@ -0,0 +1,250 @@ +/** @file
+ This file provides services for Dxe SA policy library.
+
+ Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "DxeSaPolicyLibrary.h"
+
+#define SA_DXE_MISC_CONFIG_GUID { 0xc7715fbc, 0xe2ab, 0x4a33, {0x84, 0x0f, 0x5d, 0xcd, 0x01, 0x98, 0xe5, 0x52}}
+#define IGD_PANEL_CONFIG_GUID { 0x5fd88b4c, 0xb658, 0x4650, {0xb3, 0xce, 0xa5, 0x9b, 0xb9, 0x91, 0xbf, 0xd4}}
+
+GLOBAL_REMOVE_IF_UNREFERENCED CONFIG_BLOCK_HEADER mBxtSaDxeIpBlocks[] = {
+ // Block GUID Block Size, Revision
+ { SA_DXE_MISC_CONFIG_GUID, sizeof (SA_DXE_MISC_CONFIG), SA_DXE_MISC_CONFIG_REVISION, { 0, 0, 0 } },
+ { IGD_PANEL_CONFIG_GUID, sizeof (IGD_PANEL_CONFIG), IGD_PANEL_CONFIG_REVISION, { 0, 0, 0 } }
+};
+
+//
+// Function call to Load defaults for Individial IP Blocks
+//
+EFI_STATUS
+EFIAPI
+LoadIgdPanelDefault (
+ IN VOID *ConfigBlockPointer
+ )
+{
+ IGD_PANEL_CONFIG *IgdPanelConfig = NULL;
+
+ //
+ // Initialize the IGD Panel configuration
+ //
+ IgdPanelConfig = ConfigBlockPointer;
+ IgdPanelConfig->PFITStatus = 0x00;
+#if (ENBDT_PF_ENABLE == 1)
+ IgdPanelConfig->PanelSelect = 0x00;
+#endif
+
+ return EFI_SUCCESS;
+}
+
+
+EFI_STATUS
+EFIAPI
+LoadSaDxeMiscDefault (
+ IN VOID *ConfigBlockPointer
+ )
+{
+ SA_DXE_MISC_CONFIG *SaDxeMiscConfig = NULL;
+
+ SaDxeMiscConfig = ConfigBlockPointer;
+
+ DEBUG ((DEBUG_INFO, "SaDxeMiscConfig->Header.Guid = %g\n", SaDxeMiscConfig->Header.Guid));
+ DEBUG ((DEBUG_INFO, "SaDxeMiscConfig->Header.Size = 0x%x\n", SaDxeMiscConfig->Header.Size));
+
+ return EFI_SUCCESS;
+}
+
+
+/**
+ Initialize default settings for each SA DXE Config block.
+
+ @param[in] ConfigBlockPointer The buffer pointer that will be initialized as specific config block.
+ @param[in] BlockId Request to initialize defaults of specified config block by given Block ID.
+
+ @retval EFI_SUCCESS The given buffer has contained the defaults of requested config block.
+ @retval EFI_NOT_FOUND Block ID is not defined so no default Config block will be initialized.
+
+**/
+EFI_STATUS
+EFIAPI
+LoadSaDxeConfigBlockDefault (
+ IN VOID *ConfigBlockPointer,
+ IN EFI_GUID BlockGuid
+ )
+{
+ if (CompareGuid (&BlockGuid, &gIgdPanelConfigGuid)) {
+ LoadIgdPanelDefault (ConfigBlockPointer);
+ } else {
+ if (CompareGuid (&BlockGuid, &gSaDxeMiscConfigGuid)) {
+ LoadSaDxeMiscDefault (ConfigBlockPointer);
+ } else {
+ return EFI_NOT_FOUND;
+ }
+ }
+
+ return EFI_SUCCESS;
+}
+
+
+/**
+ Creates the Config Blocks for SA DXE Policy.
+ It allocates and zero out buffer, and fills in the Intel default settings.
+
+ @param[in, out] SiSaPolicy The pointer to get SI/SA Policy Protocol.
+
+ @retval EFI_SUCCESS The policy default is initialized.
+ @retval EFI_OUT_OF_RESOURCES Insufficient resources to create buffer.
+
+**/
+EFI_STATUS
+EFIAPI
+CreateSaDxeConfigBlocks(
+ IN OUT SA_POLICY_PROTOCOL **SaPolicy
+ )
+{
+ UINT32 TotalBlockSize;
+ UINT16 TotalBlockCount;
+ UINT16 BlockCount;
+ VOID *ConfigBlockPointer;
+ EFI_STATUS Status;
+ SA_POLICY_PROTOCOL *SaDxeInitPolicy;
+ UINT32 ConfigBlockHdrSize;
+ UINT32 RequiredSize;
+
+ SaDxeInitPolicy = NULL;
+ TotalBlockSize = 0;
+
+ TotalBlockCount = sizeof (mBxtSaDxeIpBlocks) / sizeof (CONFIG_BLOCK_HEADER);
+ DEBUG ((DEBUG_INFO, "TotalBlockCount = 0x%x\n", TotalBlockCount));
+
+ for (BlockCount = 0; BlockCount < TotalBlockCount; BlockCount++) {
+ TotalBlockSize += (UINT32) mBxtSaDxeIpBlocks[BlockCount].Size;
+ DEBUG ((DEBUG_INFO, "TotalBlockSize after adding Block[0x%x]= 0x%x\n", BlockCount, TotalBlockSize));
+ }
+ DEBUG ((DEBUG_INFO, "TotalBlockSize Final = 0x%x\n", TotalBlockSize));
+
+ ConfigBlockHdrSize = GetSizeOfConfigBlockTableHeaders ((UINT16) TotalBlockCount);
+
+ RequiredSize = ConfigBlockHdrSize + TotalBlockSize;
+
+ Status = CreateConfigBlockTable ((VOID *) &SaDxeInitPolicy, TotalBlockCount, RequiredSize);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Initialize Policy Revision
+ //
+ SaDxeInitPolicy->TableHeader.Header.Revision = SA_POLICY_PROTOCOL_REVISION_1;
+
+ //
+ // Initialize ConfigBlockPointer to NULL
+ //
+ ConfigBlockPointer = NULL;
+
+ //
+ // Loop to identify each config block from mBxtSaIpBlocks[] Table and add each of them
+ //
+ for (BlockCount = 0; BlockCount < TotalBlockCount; BlockCount++) {
+ ConfigBlockPointer = (VOID *) &mBxtSaDxeIpBlocks[BlockCount];
+ Status = AddConfigBlock ((VOID *) SaDxeInitPolicy, (VOID *) &ConfigBlockPointer);
+ ASSERT_EFI_ERROR (Status);
+ LoadSaDxeConfigBlockDefault ((VOID *) ConfigBlockPointer, mBxtSaDxeIpBlocks[BlockCount].Guid);
+ }
+
+ //
+ // Assignment for returning SaInitPolicy config block base address
+ //
+ *SaPolicy = SaDxeInitPolicy;
+
+ return EFI_SUCCESS;
+}
+
+
+/**
+ Install protocol for SA Policy.
+ While installed, RC assumes the Policy is ready and finalized. So please update and override
+ any setting before calling this function.
+
+ @param[in] DxeSaPolicy The pointer to SA Policy Protocol instance
+
+ @retval EFI_SUCCESS The policy is installed.
+ @retval Others Internal error when install protocol.
+
+**/
+EFI_STATUS
+EFIAPI
+SaInstallPolicyProtocol (
+ IN SA_POLICY_PROTOCOL *DxeSaPolicy
+ )
+{
+ EFI_STATUS Status;
+ EFI_HANDLE Handle;
+
+ //
+ // Print SA DXE Policy
+ //
+ SaPrintPolicyProtocol (DxeSaPolicy);
+
+ //
+ // Install protocol to to allow access to this Policy.
+ //
+ Handle = NULL;
+ Status = gBS->InstallProtocolInterface (
+ &Handle,
+ &gSaPolicyProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ DxeSaPolicy
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+
+
+/**
+ This function prints the SA DXE phase policy.
+
+ @param[in] SaPolicy The pointer to SA Policy Protocol instance.
+
+**/
+VOID
+SaPrintPolicyProtocol (
+ IN SA_POLICY_PROTOCOL *SaPolicy
+ )
+{
+ EFI_STATUS Status;
+ SA_DXE_MISC_CONFIG *SaDxeMiscConfig = NULL;
+ IGD_PANEL_CONFIG *IgdPanelConfig = NULL;
+
+ Status = GetConfigBlock ((CONFIG_BLOCK_TABLE_HEADER *) SaPolicy, &gIgdPanelConfigGuid, (VOID *) &IgdPanelConfig);
+ ASSERT_EFI_ERROR (Status);
+
+ Status = GetConfigBlock ((CONFIG_BLOCK_TABLE_HEADER *) SaPolicy, &gSaDxeMiscConfigGuid, (VOID *) &SaDxeMiscConfig);
+ ASSERT_EFI_ERROR (Status);
+
+ DEBUG ((DEBUG_INFO, "\n------------------------ SA Platform Policy (DXE) dump BEGIN -----------------\n"));
+ DEBUG ((DEBUG_INFO, " Revision : %x\n", SaPolicy->TableHeader.Header.Revision));
+
+ DEBUG ((DEBUG_INFO, "------------------------ IGD_PANEL_CONFIGURATION -----------------\n"));
+ DEBUG ((DEBUG_INFO, " Panel Scaling : %x\n", IgdPanelConfig->PFITStatus));
+#if (ENBDT_PF_ENABLE == 1)
+ DEBUG ((DEBUG_INFO, " Panel Selection : %x\n", IgdPanelConfig->PanelSelect));
+#endif
+ DEBUG ((DEBUG_INFO, "------------------------ SA_MISC_CONFIGURATION -----------------\n"));
+ DEBUG ((DEBUG_INFO, " S0ix Support : %x\n", SaDxeMiscConfig->S0ixSupported));
+ DEBUG ((DEBUG_INFO, " Audio Type Support : %x\n", SaDxeMiscConfig->AudioTypeSupport));
+
+ DEBUG ((DEBUG_INFO, "\n------------------------ SA Platform Policy (DXE) dump END -----------------\n"));
+
+ return;
+}
+
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSaPolicyLib/DxeSaPolicyLib.inf b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSaPolicyLib/DxeSaPolicyLib.inf new file mode 100644 index 0000000000..64abde7e03 --- /dev/null +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSaPolicyLib/DxeSaPolicyLib.inf @@ -0,0 +1,44 @@ +## @file
+# Dxe SA policy library.
+#
+# Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010017
+ BASE_NAME = DxeSaPolicyLib
+ FILE_GUID = B402A3A4-4B82-410E-B79C-5914880A05E7
+ VERSION_STRING = 1.0
+ MODULE_TYPE = BASE
+ LIBRARY_CLASS = DxeSaPolicyLib
+
+[Sources]
+ DxeSaPolicyLib.c
+ DxeSaPolicyLibrary.h
+
+[Packages]
+ MdePkg/MdePkg.dec
+ BroxtonSiPkg/BroxtonSiPkg.dec
+
+[LibraryClasses]
+ BaseMemoryLib
+ UefiRuntimeServicesTableLib
+ UefiBootServicesTableLib
+ PciLib
+ DebugLib
+ PostCodeLib
+ ConfigBlockLib
+
+[Protocols]
+ gSaPolicyProtocolGuid ## PRODUCES
+ gIgdPanelConfigGuid
+ gSaDxeMiscConfigGuid
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSaPolicyLib/DxeSaPolicyLibrary.h b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSaPolicyLib/DxeSaPolicyLibrary.h new file mode 100644 index 0000000000..6b54ce2d63 --- /dev/null +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSaPolicyLib/DxeSaPolicyLibrary.h @@ -0,0 +1,30 @@ +/** @file
+ Header file for the Dxe SA policy library.
+
+ Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _DXE_SA_POLICY_LIBRARY_H_
+#define _DXE_SA_POLICY_LIBRARY_H_
+
+#include <Uefi.h>
+#include <Library/DebugLib.h>
+#include <Library/UefiLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/DxeSaPolicyLib.h>
+#include <Protocol/SaPolicy.h>
+#include <Library/ConfigBlockLib.h>
+
+#endif // _DXE_SA_POLICY_LIBRARY_H_
+
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/DxeSmbiosMemoryLib.c b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/DxeSmbiosMemoryLib.c new file mode 100644 index 0000000000..41330db082 --- /dev/null +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/DxeSmbiosMemoryLib.c @@ -0,0 +1,139 @@ +/** @file
+ This driver will determine memory configuration information from the chipset
+ and memory and create SMBIOS memory structures appropriately.
+
+ Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "SmbiosMemory.h"
+
+/**
+ This library will determine memory configuration information from the chipset
+ and memory and report the memory configuration info to the DataHub.
+
+ @param[in] ImageHandle Handle for the image of this driver.
+ @param[in] SystemTable Pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS If the data is successfully reported.
+ @retval EFI_NOT_FOUND If the HOB list could not be located.
+
+**/
+EFI_STATUS
+EFIAPI
+SmbiosMemory (
+ )
+{
+ EFI_STATUS Status;
+
+ Status = InstallSmbiosType16 ();
+ ASSERT_EFI_ERROR (Status);
+
+ Status = InstallSmbiosType17 ();
+ ASSERT_EFI_ERROR (Status);
+
+ Status = InstallSmbiosType19 ();
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+
+
+/**
+ Add an SMBIOS table entry using EFI_SMBIOS_PROTOCOL.
+ Create the full table record using the formatted section plus each non-null string, plus the terminating (double) null.
+
+ @param[in] Entry The data for the fixed portion of the SMBIOS entry.
+ The format of the data is determined by EFI_SMBIOS_TABLE_HEADER.
+ Type. The size of the formatted area is defined by
+ EFI_SMBIOS_TABLE_HEADER. Length and either followed by a
+ double-null (0x0000) or a set of null terminated strings and a null.
+ @param[in] TableStrings Set of string pointers to append onto the full record.
+ If TableStrings is null, no strings are appended. Null strings
+ are skipped.
+ @param[in] NumberOfStrings Number of TableStrings to append, null strings are skipped.
+ @param[out] SmbiosHandle A unique handle will be assigned to the SMBIOS record.
+
+ @retval EFI_SUCCESS Table was added.
+ @retval EFI_OUT_OF_RESOURCES Table was not added due to lack of system resources.
+
+**/
+EFI_STATUS
+AddSmbiosEntry (
+ IN EFI_SMBIOS_TABLE_HEADER *Entry,
+ IN CHAR8 **TableStrings,
+ IN UINT8 NumberOfStrings,
+ OUT EFI_SMBIOS_HANDLE *SmbiosHandle
+ )
+{
+ EFI_STATUS Status;
+ EFI_SMBIOS_TABLE_HEADER *Record;
+ CHAR8 *StringPtr;
+ UINTN Size;
+ UINTN i;
+
+ //
+ // Calculate the total size of the full record
+ //
+ Size = Entry->Length;
+
+ //
+ // Add the size of each non-null string
+ //
+ if (TableStrings != NULL) {
+ for (i = 0; i < NumberOfStrings; i++) {
+ if (TableStrings[i] != NULL) {
+ Size += AsciiStrSize (TableStrings[i]);
+ }
+ }
+ }
+
+ //
+ // Add the size of the terminating double null
+ // If there were any strings added, just add the second null
+ //
+ if (Size == Entry->Length) {
+ Size += 2;
+ } else {
+ Size += 1;
+ }
+
+ //
+ // Initialize the full record
+ //
+ Record = (EFI_SMBIOS_TABLE_HEADER *) AllocateZeroPool (Size);
+ if (Record == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ CopyMem (Record, Entry, Entry->Length);
+
+ //
+ // Copy the strings to the end of the record
+ //
+ StringPtr = ((CHAR8 *) Record) + Entry->Length;
+ Size = Size - Entry->Length;
+ if (TableStrings != NULL) {
+ for (i = 0; i < NumberOfStrings; i++) {
+ if (TableStrings[i] != NULL) {
+ AsciiStrCpyS (StringPtr, Size, TableStrings[i]);
+ StringPtr += AsciiStrSize (TableStrings[i]);
+ Size = Size - AsciiStrSize (TableStrings[i]);
+ }
+ }
+ }
+
+ *SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
+ Status = mSmbios->Add (mSmbios, NULL, SmbiosHandle, Record);
+
+ FreePool (Record);
+ return Status;
+}
+
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/DxeSmbiosMemoryLib.inf b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/DxeSmbiosMemoryLib.inf new file mode 100644 index 0000000000..de35f56b10 --- /dev/null +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/DxeSmbiosMemoryLib.inf @@ -0,0 +1,58 @@ +## @file
+# SmbiosMemory Driver module.
+#
+# Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = DxeSmbiosMemoryLib
+ FILE_GUID = 66BDCD3F-8520-4958-AF30-617E7384DDE2
+ VERSION_STRING = 1.0
+ MODULE_TYPE = DXE_DRIVER
+ LIBRARY_CLASS = SmbiosMemoryLib
+
+[Sources]
+ SmbiosMemory.h
+ DxeSmbiosMemoryLib.c
+ SmbiosType16.c
+ SmbiosType17.c
+ SmbiosType19.c
+ SmbiosType17Strings.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ BroxtonSiPkg/BroxtonSiPkg.dec
+
+[LibraryClasses]
+ UefiDriverEntryPoint
+ BaseLib
+ DebugLib
+ PrintLib
+ BaseMemoryLib
+ MemoryAllocationLib
+ IoLib
+ HiiLib
+
+[Guids]
+ gEfiMemorySubClassGuid ## UNDEFINED
+
+[Protocols]
+ gEfiDataHubProtocolGuid ## CONSUMES
+ gEfiHiiDatabaseProtocolGuid ## CONSUMES
+ gEfiHiiStringProtocolGuid ## CONSUMES
+ gMemInfoProtocolGuid
+
+[Depex]
+ gEfiDataHubProtocolGuid AND
+ gEfiHiiDatabaseProtocolGuid AND
+ gMemInfoProtocolGuid
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/SmbiosMemory.h b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/SmbiosMemory.h new file mode 100644 index 0000000000..b62cd67e6e --- /dev/null +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/SmbiosMemory.h @@ -0,0 +1,237 @@ +/** @file
+ Header file for the SMBIOS Memory library.
+ This driver will determine memory configuration information from the chipset
+ and memory and create SMBIOS memory structures appropriately.
+
+ Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _SMBIOS_MEMORY_H_
+#define _SMBIOS_MEMORY_H_
+
+#include <Uefi/UefiBaseType.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/UefiDriverEntryPoint.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/PrintLib.h>
+#include <Library/HobLib.h>
+#include <Protocol/Smbios.h>
+#include <IndustryStandard/SmBus.h>
+#include <SaAccess.h>
+#include <IndustryStandard/SmBios.h>
+
+//
+// Driver Consumed Protocol Prototypes
+//
+#include <Protocol/MemInfo.h>
+
+//
+// Non-static SMBIOS table data to be filled later with a dynamically generated value
+//
+#define TO_BE_FILLED 0
+#define TO_BE_FILLED_STRING " " //< Initial value should not be NULL
+
+//
+// String references in SMBIOS tables. This eliminates the need for pointers.
+//
+#define NO_STRING_AVAILABLE 0
+#define STRING_1 1
+#define STRING_2 2
+#define STRING_3 3
+#define STRING_4 4
+#define STRING_5 5
+#define STRING_6 6
+#define STRING_7 7
+
+//
+// SMBIOS Table values with special meaning
+//
+#define SMBIOS_TYPE16_USE_EXTENDED_MAX_CAPACITY 0x80000000
+
+#define SMBIOS_TYPE17_UNKNOWN_SIZE 0xFFFF
+#define SMBIOS_TYPE17_USE_EXTENDED_SIZE 0x7FFF
+#define SMBIOS_TYPE17_KB_BIT_MASK 0x8000
+#define SMBIOS_TYPE17_NUMBER_OF_STRINGS 6
+
+#define SMBIOS_TYPE19_USE_EXTENDED_ADDRESSES 0xFFFFFFFF
+
+//
+// Memory module type definition in DDR3 SPD Data
+//
+#define DDR_MTYPE_SPD_OFFSET 3 ///< Module type, offset 3, bits (3:0)
+#define DDR_MTYPE_SPD_MASK 0x0F ///< Module Type mask
+#define DDR_MTYPE_RDIMM 0x01 ///< Registered DIMM Memory
+#define DDR_MTYPE_UDIMM 0x02 ///< Unbuffered DIMM Memory
+#define DDR_MTYPE_SODIMM 0x03 ///< Small Outline DIMM Memory
+#define DDR_MTYPE_MICRO_DIMM 0x04 ///< Micro-DIMM Memory
+#define DDR_MTYPE_MINI_RDIMM 0x05 ///< Mini Registered DIMM Memory
+#define DDR_MTYPE_MINI_UDIMM 0x06 ///< Mini Unbuffered DIMM Memory
+
+//
+// Memory device type definition in DDR3 SPD Data
+//
+#define DDR_DTYPE_SPD_OFFSET 2 ///< Device type, offset 2, bits (7:0)
+#define DDR_DTYPE_DDR3 11 ///< DDR3 memory type
+#define DDR_DTYPE_DDR4 12 ///< DDR4 memory type
+#define DDR_DTYPE_LPDDR3 0xF1 ///< LPDDR3 memory type
+
+//
+// Maximum rank memory size supported by the memory controller: 8GB (in terms of KB) for DDR4 and 4 GB for other types
+//
+#define MAX_RANK_CAPACITY (4 * 1024 * 1024)
+#define MAX_RANK_CAPACITY_DDR4 (8 * 1024 * 1024)
+
+//
+// DDR3 and DDR4 SPD Register Bytes
+//
+#define DDR4_SPD_BUFFER_SIZE 384
+#define DDR4_SPD_MANUFACTURER_ID_LSB 320
+#define DDR4_SPD_MANUFACTURER_ID_MSB 321
+#define DDR4_SPD_PART_NO_START_BYTE 329
+#define DDR4_SPD_PART_NO_END_BYTE 348
+#define DDR4_SPD_SERIAL_NO_START_BYTE 325
+#define DDR4_SPD_SERIAL_NO_END_BYTE 328
+#define DDR4_SPD_MEMORY_BUS_WIDTH_BYTE 13
+
+#define DDR3_SPD_BUFFER_SIZE 256
+#define DDR3_SPD_MANUFACTURER_ID_LSB 117
+#define DDR3_SPD_MANUFACTURER_ID_MSB 118
+#define DDR3_SPD_PART_NO_START_BYTE 128
+#define DDR3_SPD_PART_NO_END_BYTE 145
+#define DDR3_SPD_SERIAL_NO_START_BYTE 122
+#define DDR3_SPD_SERIAL_NO_END_BYTE 125
+#define DDR3_SPD_MEMORY_BUS_WIDTH_BYTE 8
+
+#define FREQ_800 0x00
+#define FREQ_1066 0x01
+#define FREQ_1333 0x02
+#define FREQ_1600 0x03
+#define FREQ_1866 0x04
+#define FREQ_2133 0x05
+#define FREQ_2666 0x07
+#define FREQ_3200 0x08
+
+enum {
+ DDRType_DDR3 = 0,
+ DDRType_DDR3L = 1,
+ DDRType_DDR3U = 2,
+ DDRType_DDR3All = 3,
+ DDRType_LPDDR2 = 4,
+ DDRType_LPDDR3 = 5,
+ DDRType_DDR4 = 6
+};
+
+#ifndef MEMORY_ASSET_TAG
+#define MEMORY_ASSET_TAG "9876543210"
+#endif
+//
+// Memory Module Manufacture ID List Structure
+//
+typedef struct {
+ UINT8 Index;
+ UINT8 ManufactureId;
+ CHAR8 *ManufactureName;
+} MEMORY_MODULE_MANUFACTURE_LIST;
+
+#pragma pack(1)
+typedef struct {
+ CHAR8 *DeviceLocator;
+ CHAR8 *BankLocator;
+ CHAR8 *Manufacturer;
+ CHAR8 *SerialNumber;
+ CHAR8 *AssetTag;
+ CHAR8 *PartNumber;
+} SMBIOS_TYPE17_STRING_ARRAY;
+#pragma pack()
+
+//
+// Module-wide global variables
+//
+MEM_INFO_PROTOCOL *mMemInfoHob;
+extern EFI_SMBIOS_PROTOCOL *mSmbios;
+EFI_SMBIOS_HANDLE mSmbiosType16Handle;
+
+extern CHAR8 *DimmToDevLocator[];
+extern CHAR8 *DimmToBankLocator[];
+extern MEMORY_MODULE_MANUFACTURE_LIST MemoryModuleManufactureList[];
+
+//
+// Prototypes
+//
+/**
+ Add an SMBIOS table entry using EFI_SMBIOS_PROTOCOL.
+ Create the full table record using the formatted section plus each non-null string, plus the terminating (double) null.
+
+ @param[in] Entry The data for the fixed portion of the SMBIOS entry.
+ The format of the data is determined by EFI_SMBIOS_TABLE_HEADER.
+ Type. The size of the formatted area is defined by
+ EFI_SMBIOS_TABLE_HEADER. Length and either followed by a
+ double-null (0x0000) or a set of null terminated strings and a null.
+ @param[in] TableStrings Set of string pointers to append onto the full record.
+ If TableStrings is null, no strings are appended. Null strings
+ are skipped.
+ @param[in] NumberOfStrings Number of TableStrings to append, null strings are skipped.
+ @param[in] SmbiosProtocol Instance of Smbios Protocol
+ @param[out] SmbiosHandle A unique handle will be assigned to the SMBIOS record.
+
+ @retval EFI_SUCCESS Table was added.
+ @retval EFI_OUT_OF_RESOURCES Table was not added due to lack of system resources.
+
+**/
+EFI_STATUS
+AddSmbiosEntry (
+ IN EFI_SMBIOS_TABLE_HEADER *Entry,
+ IN CHAR8 **TableStrings,
+ IN UINT8 NumberOfStrings,
+ OUT EFI_SMBIOS_HANDLE *SmbiosHandle
+ );
+
+/**
+ This function installs SMBIOS Table Type 16 (Physical Memory Array).
+
+ @retval EFI_SUCCESS If the data is successfully reported.
+ @retval EFI_OUT_OF_RESOURCES If not able to get resources.
+
+**/
+EFI_STATUS
+InstallSmbiosType16 (
+ );
+
+/**
+ This function installs SMBIOS Table Type 17 (Memory Device).
+ This function installs one table per memory device slot, whether populated or not.
+
+ @retval EFI_SUCCESS If the data is successfully reported.
+ @retval EFI_OUT_OF_RESOURCES If not able to get resources.
+ @retval EFI_INVALID_PARAMETER If a required parameter in a subfunction is NULL.
+
+**/
+EFI_STATUS
+InstallSmbiosType17 (
+ );
+
+/**
+ This function installs SMBIOS Table Type 19 (Physical Memory Array).
+
+ @retval EFI_SUCCESS If the data is successfully reported.
+ @retval EFI_OUT_OF_RESOURCES If not able to get resources.
+
+**/
+EFI_STATUS
+InstallSmbiosType19 (
+ );
+
+#endif
+
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/SmbiosType16.c b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/SmbiosType16.c new file mode 100644 index 0000000000..2124543b16 --- /dev/null +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/SmbiosType16.c @@ -0,0 +1,112 @@ +/** @file
+ This library will determine memory configuration information from the chipset
+ and memory and create SMBIOS memory structures appropriately.
+
+ Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "SmbiosMemory.h"
+
+//
+// Physical Memory Array (Type 16) data
+//
+GLOBAL_REMOVE_IF_UNREFERENCED SMBIOS_TABLE_TYPE16 SmbiosTableType16Data = {
+ { EFI_SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY, sizeof (SMBIOS_TABLE_TYPE16), 0 },
+ MemoryArrayLocationSystemBoard, ///< Location
+ MemoryArrayUseSystemMemory, ///< Use
+ TO_BE_FILLED, ///< MemoryErrorCorrection
+ TO_BE_FILLED, ///< MaximumCapacity
+ 0xFFFE, ///< MemoryErrorInformationHandle
+ TO_BE_FILLED, ///< NumberOfMemoryDevices
+ 0, ///< ExtendedMaximumCapacity
+};
+
+
+/**
+ This function installs SMBIOS Table Type 16 (Physical Memory Array).
+
+ @param[in] SmbiosProtocol Instance of Smbios Protocol.
+
+ @retval EFI_SUCCESS If the data is successfully reported.
+ @retval EFI_OUT_OF_RESOURCES If not able to get resources.
+
+**/
+EFI_STATUS
+InstallSmbiosType16 (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ UINT8 ChannelASlotMap;
+ UINT8 ChannelBSlotMap;
+ UINT8 BitIndex;
+ UINT16 MaxSockets;
+ UINT8 ChannelASlotNum;
+ UINT8 ChannelBSlotNum;
+
+ //
+ // Get Memory size parameters for each rank from the chipset registers
+ //
+ Status = gBS->LocateProtocol (&gMemInfoProtocolGuid, NULL, (VOID **) &mMemInfoHob);
+
+ //
+ // Configure the data for TYPE 16 SMBIOS Structure
+ //
+ //
+ // Create physical array and associated data for all mainboard memory
+ //
+ SmbiosTableType16Data.MemoryErrorCorrection = MemoryErrorCorrectionNone;
+
+ //
+ // Get the Memory DIMM info from policy protocols
+ //
+ ChannelASlotMap = 0x01;
+ ChannelBSlotMap = 0x01;
+ ChannelASlotNum = 0;
+ ChannelBSlotNum = 0;
+
+ for (BitIndex = 0; BitIndex < 8; BitIndex++) {
+ if ((ChannelASlotMap >> BitIndex) & BIT0) {
+ ChannelASlotNum++;
+ }
+
+ if ((ChannelBSlotMap >> BitIndex) & BIT0) {
+ ChannelBSlotNum++;
+ }
+ }
+ MaxSockets = ChannelASlotNum + ChannelBSlotNum;
+ if (mMemInfoHob->MemInfoData.ddrType == 0) {
+ if ((MAX_RANK_CAPACITY_DDR4 * SA_MC_MAX_SIDES * MaxSockets) < SMBIOS_TYPE16_USE_EXTENDED_MAX_CAPACITY) {
+ SmbiosTableType16Data.MaximumCapacity = MAX_RANK_CAPACITY_DDR4 * SA_MC_MAX_SIDES * MaxSockets;
+ } else {
+ SmbiosTableType16Data.MaximumCapacity = SMBIOS_TYPE16_USE_EXTENDED_MAX_CAPACITY;
+ SmbiosTableType16Data.ExtendedMaximumCapacity = ((UINT64) MAX_RANK_CAPACITY_DDR4) * SA_MC_MAX_SIDES * MaxSockets * 1024; // Convert from KB to Byte
+ }
+ } else {
+ if ((MAX_RANK_CAPACITY * SA_MC_MAX_SIDES * MaxSockets) < SMBIOS_TYPE16_USE_EXTENDED_MAX_CAPACITY) {
+ SmbiosTableType16Data.MaximumCapacity = MAX_RANK_CAPACITY * SA_MC_MAX_SIDES * MaxSockets;
+ } else {
+ SmbiosTableType16Data.MaximumCapacity = SMBIOS_TYPE16_USE_EXTENDED_MAX_CAPACITY;
+ SmbiosTableType16Data.ExtendedMaximumCapacity = ((UINT64) MAX_RANK_CAPACITY) * SA_MC_MAX_SIDES * MaxSockets * 1024; // Convert from KB to Byte
+ }
+ }
+ SmbiosTableType16Data.NumberOfMemoryDevices = MaxSockets;
+
+ //
+ // Install SMBIOS Table Type 16
+ //
+ Status = AddSmbiosEntry ((EFI_SMBIOS_TABLE_HEADER *) &SmbiosTableType16Data, NULL, 0, &mSmbiosType16Handle);
+ DEBUG ((DEBUG_INFO, "\nInstall SMBIOS Table Type 16"));
+
+ return Status;
+}
+
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/SmbiosType17.c b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/SmbiosType17.c new file mode 100644 index 0000000000..4c73c55593 --- /dev/null +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/SmbiosType17.c @@ -0,0 +1,384 @@ +/** @file
+ This library will determine memory configuration information from the chipset
+ and memory and create SMBIOS memory structures appropriately.
+
+ Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "SmbiosMemory.h"
+
+//
+// Memory Device (Type 17) data
+//
+GLOBAL_REMOVE_IF_UNREFERENCED SMBIOS_TABLE_TYPE17 SmbiosTableType17Data = {
+ { EFI_SMBIOS_TYPE_MEMORY_DEVICE, sizeof (SMBIOS_TABLE_TYPE17), 0 },
+ TO_BE_FILLED, ///< MemoryArrayHandle
+ 0xFFFE, ///< MemoryErrorInformationHandle
+ TO_BE_FILLED, ///< TotalWidth
+ TO_BE_FILLED, ///< DataWidth
+ TO_BE_FILLED, ///< Size
+ TO_BE_FILLED, ///< FormFactor
+ 0, ///< DeviceSet
+ STRING_1, ///< DeviceLocator
+ STRING_2, ///< BankLocator
+ TO_BE_FILLED, ///< MemoryType
+ { ///< TypeDetail
+ 0, ///< Reserved :1;
+ 0, ///< Other :1;
+ 0, ///< Unknown :1;
+ 0, ///< FastPaged :1;
+ 0, ///< StaticColumn :1;
+ 0, ///< PseudoStatic :1;
+ TO_BE_FILLED, ///< Rambus :1;
+ TO_BE_FILLED, ///< Synchronous :1;
+ 0, ///< Cmos :1;
+ 0, ///< Edo :1;
+ 0, ///< WindowDram :1;
+ 0, ///< CacheDram :1;
+ 0, ///< Nonvolatile :1;
+ 0, ///< Registered :1;
+ 0, ///< Unbuffered :1;
+ 0, ///< Reserved1 :1;
+ },
+ TO_BE_FILLED, ///< Speed
+ TO_BE_FILLED, ///< Manufacturer
+ TO_BE_FILLED, ///< SerialNumber
+ TO_BE_FILLED, ///< AssetTag
+ TO_BE_FILLED, ///< PartNumber
+ TO_BE_FILLED, ///< Attributes
+ TO_BE_FILLED, ///< ExtendedSize
+ TO_BE_FILLED, ///< ConfiguredMemoryClockSpeed
+ TO_BE_FILLED, ///< MinimumVoltage
+ TO_BE_FILLED, ///< MaximumVoltage
+ TO_BE_FILLED, ///< ConfiguredVoltage
+};
+GLOBAL_REMOVE_IF_UNREFERENCED SMBIOS_TYPE17_STRING_ARRAY SmbiosTableType17Strings = {
+ TO_BE_FILLED_STRING, ///< DeviceLocator
+ TO_BE_FILLED_STRING, ///< BankLocator
+ TO_BE_FILLED_STRING, ///< Manufacturer
+ TO_BE_FILLED_STRING, ///< SerialNumber
+#ifdef MEMORY_ASSET_TAG ///< AssetTag
+ MEMORY_ASSET_TAG,
+#else
+ "0123456789",
+#endif
+ TO_BE_FILLED_STRING ///< PartNumber
+};
+
+
+//
+// Even SPD Addresses only as we read Words
+//
+const UINT8
+ SpdAddress[] = { 2, 8, 116, 118, 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 142, 144 };
+
+
+/**
+ This function installs SMBIOS Table Type 17 (Memory Device).
+ This function installs one table per memory device slot, whether populated or not.
+
+ @param[in] SmbiosProtocol Instance of Smbios Protocol.
+
+ @retval EFI_SUCCESS If the data is successfully reported.
+ @retval EFI_OUT_OF_RESOURCES If not able to get resources.
+ @retval EFI_INVALID_PARAMETER If a required parameter in a subfunction is NULL.
+
+**/
+EFI_STATUS
+InstallSmbiosType17 (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ UINT16 Index;
+ UINT32 DimmMemorySizeInMB;
+ UINT8 Dimm;
+ UINT8 *SmbusBuffer;
+ UINTN SmbusBufferSize;
+ UINTN SmbusOffset;
+ CHAR8 *StringBuffer;
+ CHAR8 *StringBufferStart;
+ UINTN StringBufferSize;
+ CHAR8 StringBuffer2[4];
+ UINT8 IndexCounter;
+ UINTN IdListIndex;
+ BOOLEAN SlotPresent;
+ UINT16 MemoryTotalWidth;
+ UINT16 MemoryDataWidth;
+ UINT8 i;
+ BOOLEAN FoundManufacturer;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+ UINTN StrBufferLen;
+
+ Status = EFI_SUCCESS;
+
+ //
+ // StringBuffer should only use around 50 to 60 characters max.
+ // Therefore, allocate around double that, as a saftey margin
+ //
+ StringBufferSize = (sizeof (CHAR8)) * 100;
+ StringBufferStart = AllocateZeroPool (StringBufferSize);
+ if (StringBufferStart == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ SmbusBuffer = NULL;
+ SmbusBufferSize = 0x100; //< SPD data section is exactly 256 bytes.
+ SmbusBuffer = AllocatePool (SmbusBufferSize);
+ if (SmbusBuffer == NULL) {
+ FreePool (StringBufferStart);
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ //
+ // Get Memory size parameters for each rank from the chipset registers
+ //
+ Status = gBS->LocateProtocol (&gMemInfoProtocolGuid, NULL, (VOID **) &mMemInfoHob);
+
+ //
+ // Each instance of table type 17 has the same MemoryArrayHandle
+ //
+ SmbiosTableType17Data.MemoryArrayHandle = mSmbiosType16Handle;
+
+ for (Dimm = 0; Dimm < SA_MC_MAX_SOCKETS; Dimm++) {
+ SlotPresent = FALSE;
+ if (mMemInfoHob->MemInfoData.DimmPresent[Dimm]) {
+ SlotPresent = TRUE;
+ }
+ //
+ // Don't create Type 17 tables for sockets that don't exist
+ //
+ if (!SlotPresent) {
+ continue;
+ }
+ //
+ // Generate Memory Device info (Type 17)
+ //
+ ZeroMem (SmbusBuffer, SmbusBufferSize);
+
+ //
+ // Only read the SPD data if the DIMM is populated in the slot.
+ //
+ if (SlotPresent) {
+ for (i = 0; i < sizeof SpdAddress; i++) {
+ SmbusOffset = SpdAddress[i];
+ *(UINT16 *) (SmbusBuffer + SmbusOffset) = *(UINT16 *) (mMemInfoHob->MemInfoData.DimmsSpdData[Dimm] + SmbusOffset);
+ }
+ }
+
+ //
+ // Use SPD data to generate Device Type info
+ //
+ SmbiosTableType17Strings.DeviceLocator = DimmToDevLocator[Dimm];
+ SmbiosTableType17Strings.BankLocator = DimmToBankLocator[Dimm];
+
+ if (SlotPresent) {
+ //
+ // Reset StringBuffer
+ //
+ StringBuffer = StringBufferStart;
+
+ //
+ // Show name for known manufacturer or ID for unknown manufacturer
+ //
+ FoundManufacturer = FALSE;
+
+ //
+ // Calculate index counter
+ // Clearing Bit7 as it is the Parity Bit for Byte 117
+ //
+ IndexCounter = SmbusBuffer[117] & (~0x80);
+
+ //
+ // Convert memory manufacturer ID to string
+ //
+ for (IdListIndex = 0; MemoryModuleManufactureList[IdListIndex].Index != 0xff; IdListIndex++) {
+ if (MemoryModuleManufactureList[IdListIndex].Index == IndexCounter &&
+ MemoryModuleManufactureList[IdListIndex].ManufactureId == SmbusBuffer[118]
+ ) {
+ SmbiosTableType17Strings.Manufacturer = MemoryModuleManufactureList[IdListIndex].ManufactureName;
+ FoundManufacturer = TRUE;
+ break;
+ }
+ }
+ //
+ // Use original data if no conversion information in conversion table
+ //
+ StrBufferLen = StringBufferSize / sizeof (CHAR8);
+
+ if (!(FoundManufacturer)) {
+ AsciiStrCpyS (StringBuffer, StrBufferLen, "");
+ for (Index = 117; Index < 119; Index++) {
+ AsciiValueToString (StringBuffer2, PREFIX_ZERO, SmbusBuffer[Index], 2);
+ AsciiStrCatS (StringBuffer, StrBufferLen, StringBuffer2);
+ }
+ SmbiosTableType17Strings.Manufacturer = StringBuffer;
+ StringBuffer += AsciiStrSize (StringBuffer);
+ }
+
+ AsciiStrCpyS (StringBuffer, StrBufferLen, "");
+ for (Index = 122; Index < 126; Index++) {
+ AsciiValueToString (StringBuffer2, PREFIX_ZERO, SmbusBuffer[Index], 2);
+ AsciiStrCatS (StringBuffer, StrBufferLen, StringBuffer2);
+ }
+ SmbiosTableType17Strings.SerialNumber = StringBuffer;
+ StringBuffer += AsciiStrSize (StringBuffer);
+
+ AsciiStrCpyS (StringBuffer, StrBufferLen, "");
+ for (Index = 128; Index < 146; Index++) {
+ AsciiSPrint (StringBuffer2, 4, "%c", SmbusBuffer[Index]);
+ AsciiStrCatS (StringBuffer, StrBufferLen, StringBuffer2);
+ }
+ SmbiosTableType17Strings.PartNumber = StringBuffer;
+
+ ASSERT ((StringBuffer + AsciiStrSize (StringBuffer)) < (StringBufferStart + StringBufferSize));
+
+ SmbiosTableType17Data.Manufacturer = STRING_3;
+ SmbiosTableType17Data.SerialNumber = STRING_4;
+ SmbiosTableType17Data.AssetTag = STRING_5;
+ SmbiosTableType17Data.PartNumber = STRING_6;
+
+ MemoryDataWidth = 8 * (1 << mMemInfoHob->MemInfoData.BusWidth);
+ MemoryTotalWidth = MemoryDataWidth;
+ SmbiosTableType17Data.TotalWidth = MemoryTotalWidth;
+ SmbiosTableType17Data.DataWidth = MemoryDataWidth;
+
+ DimmMemorySizeInMB = mMemInfoHob->MemInfoData.dimmSize[Dimm];
+
+ if (DimmMemorySizeInMB < SMBIOS_TYPE17_USE_EXTENDED_SIZE) {
+ SmbiosTableType17Data.Size = (UINT16) DimmMemorySizeInMB;
+ SmbiosTableType17Data.ExtendedSize = 0;
+ } else {
+ SmbiosTableType17Data.Size = SMBIOS_TYPE17_USE_EXTENDED_SIZE;
+ SmbiosTableType17Data.ExtendedSize = DimmMemorySizeInMB;
+ }
+
+ switch (SmbusBuffer[DDR_MTYPE_SPD_OFFSET] & DDR_MTYPE_SPD_MASK) {
+ case DDR_MTYPE_SODIMM:
+ SmbiosTableType17Data.FormFactor = MemoryFormFactorSodimm;
+ break;
+
+ case DDR_MTYPE_RDIMM:
+ case DDR_MTYPE_MINI_RDIMM:
+ SmbiosTableType17Data.FormFactor = MemoryFormFactorRimm;
+ break;
+
+ case DDR_MTYPE_UDIMM:
+ case DDR_MTYPE_MICRO_DIMM:
+ case DDR_MTYPE_MINI_UDIMM:
+ default:
+ SmbiosTableType17Data.FormFactor = MemoryFormFactorDimm;
+ }
+
+ //
+ // Memory Type
+ //
+ switch (mMemInfoHob->MemInfoData.ddrType) {
+ case DDRType_DDR3:
+ case DDRType_DDR3L:
+ case DDRType_DDR3U:
+ case DDRType_LPDDR3:
+ SmbiosTableType17Data.MemoryType = MemoryTypeDdr3;
+ break;
+ default:
+ SmbiosTableType17Data.MemoryType = 0x1E;
+ break;
+ }
+
+ if (SmbiosTableType17Data.FormFactor == MemoryFormFactorRimm) {
+ SmbiosTableType17Data.TypeDetail.Rambus = 1;
+ } else {
+ SmbiosTableType17Data.TypeDetail.Rambus = 0;
+ }
+ SmbiosTableType17Data.TypeDetail.Synchronous = 1;
+
+ //
+ // Memory Freq
+ //
+ switch (mMemInfoHob->MemInfoData.ddrFreq){
+ case FREQ_800:
+ SmbiosTableType17Data.Speed = 800;
+ break;
+ case FREQ_1066:
+ SmbiosTableType17Data.Speed = 1066;
+ break;
+ case FREQ_1333:
+ SmbiosTableType17Data.Speed = 1333;
+ break;
+ case FREQ_1600:
+ SmbiosTableType17Data.Speed = 1600;
+ break;
+ case FREQ_1866:
+ SmbiosTableType17Data.Speed = 1866;
+ break;
+ case FREQ_2133:
+ SmbiosTableType17Data.Speed = 2133;
+ break;
+ case FREQ_2666:
+ SmbiosTableType17Data.Speed = 2666;
+ break;
+ case FREQ_3200:
+ SmbiosTableType17Data.Speed = 3200;
+ break;
+ default:
+ SmbiosTableType17Data.Speed = 0;
+ break;
+ }
+ SmbiosTableType17Data.ConfiguredMemoryClockSpeed = SmbiosTableType17Data.Speed;
+ } else {
+ //
+ // Memory is not Populated in this slot.
+ //
+ SmbiosTableType17Strings.DeviceLocator = DimmToDevLocator[Dimm];
+ SmbiosTableType17Strings.BankLocator = DimmToBankLocator[Dimm];
+
+ SmbiosTableType17Strings.Manufacturer = NULL;
+ SmbiosTableType17Strings.SerialNumber = NULL;
+ SmbiosTableType17Strings.PartNumber = NULL;
+
+ SmbiosTableType17Data.Manufacturer = NO_STRING_AVAILABLE;
+ SmbiosTableType17Data.SerialNumber = NO_STRING_AVAILABLE;
+ SmbiosTableType17Data.AssetTag = STRING_3;
+ SmbiosTableType17Data.PartNumber = NO_STRING_AVAILABLE;
+
+ SmbiosTableType17Data.TotalWidth = 0;
+ SmbiosTableType17Data.DataWidth = 0;
+ SmbiosTableType17Data.Size = 0;
+ SmbiosTableType17Data.FormFactor = MemoryFormFactorDimm;
+ SmbiosTableType17Data.MemoryType = MemoryTypeUnknown;
+ SmbiosTableType17Data.TypeDetail.Rambus = 0;
+ SmbiosTableType17Data.TypeDetail.Synchronous = 0;
+ SmbiosTableType17Data.Speed = 0;
+ SmbiosTableType17Data.Attributes = 0;
+ SmbiosTableType17Data.ExtendedSize = 0;
+ }
+
+ //
+ // Generate Memory Device info (Type 17)
+ //
+ Status = AddSmbiosEntry (
+ (EFI_SMBIOS_TABLE_HEADER *) &SmbiosTableType17Data,
+ (CHAR8 **) &SmbiosTableType17Strings,
+ SMBIOS_TYPE17_NUMBER_OF_STRINGS,
+ &SmbiosHandle);
+ if (EFI_ERROR (Status)) {
+ goto CleanAndExit;
+ }
+ }
+CleanAndExit:
+ FreePool (SmbusBuffer);
+ FreePool (StringBufferStart);
+ DEBUG ((DEBUG_INFO, "\nInstall SMBIOS Table Type 17"));
+
+ return Status;
+}
+
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/SmbiosType17Strings.c b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/SmbiosType17Strings.c new file mode 100644 index 0000000000..4665febab0 --- /dev/null +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/SmbiosType17Strings.c @@ -0,0 +1,42 @@ +/** @file
+ This library will determine memory configuration information from the chipset
+ and memory and create SMBIOS memory structures appropriately.
+
+ Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "SmbiosMemory.h"
+
+GLOBAL_REMOVE_IF_UNREFERENCED CHAR8 *DimmToDevLocator[] = {
+ "ChannelA-DIMM0",
+ "ChannelA-DIMM1",
+ "ChannelB-DIMM0",
+ "ChannelB-DIMM1"
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED CHAR8 *DimmToBankLocator[] = {
+ "BANK 0",
+ "BANK 1",
+ "BANK 2",
+ "BANK 3"
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED MEMORY_MODULE_MANUFACTURE_LIST MemoryModuleManufactureList[] = {
+ {0, 0x2c, "Micron"},
+ {0, 0xad, "SK Hynix"},
+ {0, 0xce, "Samsung"},
+ {1, 0x4f, "Transcend"},
+ {1, 0x98, "Kingston"},
+ {2, 0xfe, "Elpida"},
+ {0xff, 0xff, 0}
+};
+
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/SmbiosType19.c b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/SmbiosType19.c new file mode 100644 index 0000000000..521fa793da --- /dev/null +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/SmbiosType19.c @@ -0,0 +1,92 @@ +/** @file
+ This library will determine memory configuration information from the chipset
+ and memory and create SMBIOS memory structures appropriately.
+
+ Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "SmbiosMemory.h"
+
+//
+// Memory Array Mapped Address (Type 19) data
+//
+GLOBAL_REMOVE_IF_UNREFERENCED SMBIOS_TABLE_TYPE19 SmbiosTableType19Data = {
+ { EFI_SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS, sizeof (SMBIOS_TABLE_TYPE19), 0 },
+ 0, ///< StartingAddress
+ TO_BE_FILLED, ///< EndingAddress
+ TO_BE_FILLED, ///< MemoryArrayHandle
+ TO_BE_FILLED, ///< PartitionWidth
+ 0, ///< ExtendedStartingAddress
+ 0, ///< ExtendedEndingAddress
+};
+
+
+/**
+ This function installs SMBIOS Table Type 19 (Physical Memory Array).
+
+ @retval EFI_SUCCESS If the data is successfully reported.
+ @retval EFI_OUT_OF_RESOURCES If not able to get resources.
+
+**/
+EFI_STATUS
+InstallSmbiosType19 (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ UINT64 TotalMemorySizeInKB;
+ UINT8 Dimm;
+ BOOLEAN SlotPresent;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+
+ TotalMemorySizeInKB = 0;
+
+ //
+ // Get Memory size parameters for each rank from the chipset registers
+ //
+ Status = gBS->LocateProtocol (&gMemInfoProtocolGuid, NULL, (VOID **) &mMemInfoHob);
+
+ //
+ // Calculate the TotalMemorySizeInKB by adding the size of all populated sockets
+ //
+ for (Dimm = 0; Dimm < MAX_SOCKETS; Dimm++) {
+ //
+ // Use channel slot map to check whether the Socket is supported in this SKU, some SKU only has 2 Sockets totally
+ //
+ SlotPresent = FALSE;
+ if (mMemInfoHob->MemInfoData.DimmPresent[Dimm]) {
+ SlotPresent = TRUE;
+ }
+ if (SlotPresent) {
+ TotalMemorySizeInKB += LShiftU64 (mMemInfoHob->MemInfoData.dimmSize[Dimm], 10);
+ }
+ }
+
+ if (TotalMemorySizeInKB > SMBIOS_TYPE19_USE_EXTENDED_ADDRESSES) {
+ SmbiosTableType19Data.StartingAddress = SMBIOS_TYPE19_USE_EXTENDED_ADDRESSES;
+ SmbiosTableType19Data.EndingAddress = SMBIOS_TYPE19_USE_EXTENDED_ADDRESSES;
+ SmbiosTableType19Data.ExtendedEndingAddress = TotalMemorySizeInKB - 1;
+ } else {
+ SmbiosTableType19Data.EndingAddress = (UINT32) (TotalMemorySizeInKB - 1);
+ }
+ SmbiosTableType19Data.MemoryArrayHandle = mSmbiosType16Handle;
+ SmbiosTableType19Data.PartitionWidth = MAX_SOCKETS;
+
+ //
+ // Generate Memory Array Mapped Address info (TYPE 19)
+ //
+ Status = AddSmbiosEntry ((EFI_SMBIOS_TABLE_HEADER *) &SmbiosTableType19Data, NULL, 0, &SmbiosHandle);
+ DEBUG ((DEBUG_INFO, "\nInstall SMBIOS Table Type 19"));
+
+ return Status;
+}
+
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/PeiSaPolicyLib/PeiSaPolicyLib.c b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/PeiSaPolicyLib/PeiSaPolicyLib.c new file mode 100644 index 0000000000..2b92562c0c --- /dev/null +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/PeiSaPolicyLib/PeiSaPolicyLib.c @@ -0,0 +1,432 @@ +/** @file
+ This file provides services for Pei SA policy default initialization.
+
+ Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "PeiSaPolicyLibrary.h"
+
+//
+// @todo: Remove the duplicate definition of the GUIDs and make it a location function.
+// Because mBxtSaIpBlocks' initializer must be a constant, we need to define those GUID for it.
+//
+#define SA_MISC_CONFIG_GUID { 0xc5c9145f, 0x61fb, 0x4abe, { 0x88, 0x0a, 0xf2, 0x56, 0x89, 0x9f, 0x40, 0xb0}}
+#define GRAPHICS_CONFIG_GUID { 0x0319c56b, 0xc43a, 0x42f1, { 0x80, 0xbe, 0xca, 0x5b, 0xd1, 0xd5, 0xc9, 0x28}}
+#define MEMORY_CONFIG_GUID { 0x26cf084c, 0xc9db, 0x41bb, { 0x92, 0xc6, 0xd1, 0x97, 0xb8, 0xa1, 0xe4, 0xbf}}
+#define IPU_CONFIG_GUID { 0x67eeefd0, 0x9e42, 0x48c8, { 0xbd, 0xab, 0xfd, 0x0d, 0x23, 0x69, 0x88, 0x0b}}
+#define SA_PRE_MEM_CONFIG_GUID { 0x7200eef0, 0xbe7f, 0x4061, { 0x93, 0xe3, 0x3c, 0xd0, 0x36, 0x7c, 0xe1, 0x51}}
+#if (ENBDT_PF_ENABLE == 1)
+#define HYBRID_GRAPHICS_CONFIG_GUID { 0x0b7e694d, 0xb909, 0x4097, { 0x9c, 0x03, 0x5e, 0x72, 0x84, 0x89, 0xf7, 0x09}}
+#endif
+
+GLOBAL_REMOVE_IF_UNREFERENCED CONFIG_BLOCK_HEADER mBxtSaIpBlocks[] = {
+ // Block GUID Block Size, Revision
+ {SA_MISC_CONFIG_GUID, sizeof (SA_MISC_CONFIG), SA_MISC_CONFIG_REVISION, {0, 0, 0}},
+ {GRAPHICS_CONFIG_GUID, sizeof (GRAPHICS_CONFIG), GRAPHICS_CONFIG_REVISION, {0, 0, 0}},
+ {IPU_CONFIG_GUID, sizeof (IPU_CONFIG), IPU_CONFIG_REVISION, {0, 0, 0}},
+#if (ENBDT_PF_ENABLE == 1)
+ {HYBRID_GRAPHICS_CONFIG_GUID, sizeof (HYBRID_GRAPHICS_CONFIG), HYBRID_GRAPHICS_CONFIG_REVISION, {0, 0, 0}},
+#endif
+ {MEMORY_CONFIG_GUID, sizeof (MEMORY_CONFIGURATION), MEMORY_CONFIG_REVISION, {0, 0, 0}}
+};
+GLOBAL_REMOVE_IF_UNREFERENCED CONFIG_BLOCK_HEADER mBxtSaIpPreMemBlocks[] = {
+ // Block GUID Block Size, Revision
+ {SA_PRE_MEM_CONFIG_GUID, sizeof (SA_PRE_MEM_CONFIG), SA_PRE_MEM_CONFIG_REVISION, { 0, 0, 0}}
+};
+
+//
+// Function call to Load defaults for Individial IP Blocks
+//
+EFI_STATUS
+EFIAPI
+LoadSaMiscDefault (
+ IN VOID *ConfigBlockPointer
+ )
+{
+ SA_MISC_CONFIG *MiscConfig;
+
+ MiscConfig = ConfigBlockPointer;
+
+ DEBUG ((DEBUG_INFO, "MiscConfig->Header.Guid = %g\n", MiscConfig->Header.Guid));
+ DEBUG ((DEBUG_INFO, "MiscConfig->Header.Size = 0x%x\n", MiscConfig->Header.Size));
+
+ return EFI_SUCCESS;
+}
+
+
+EFI_STATUS
+EFIAPI
+LoadIpuDefault (
+ IN VOID *ConfigBlockPointer
+ )
+{
+ IPU_CONFIG *IpuPolicy;
+
+ IpuPolicy = ConfigBlockPointer;
+ DEBUG ((DEBUG_INFO, "IpuPolicy->Header.Guid = %g\n", IpuPolicy->Header.Guid));
+ DEBUG ((DEBUG_INFO, "IpuPolicy->Header.Size = 0x%x\n", IpuPolicy->Header.Size));
+
+ IpuPolicy->SaIpuEnable = 1;
+ IpuPolicy->IpuMmAdr = 0xCF000000;
+
+ return EFI_SUCCESS;
+}
+
+
+EFI_STATUS
+EFIAPI
+LoadGraphicsDefault (
+ IN VOID *ConfigBlockPointer
+ )
+{
+ GRAPHICS_CONFIG *GtConfig;
+
+ GtConfig = ConfigBlockPointer;
+
+ //
+ // Initialize the Graphics configuration
+ //
+ GtConfig->GmAdr = 0xA0000000;
+ GtConfig->GttMmAdr = 0xBF000000;
+ GtConfig->EnableRenderStandby = 1;
+ GtConfig->PavpEnable = 1;
+ GtConfig->PmSupport = 1;
+ GtConfig->PavpPr3 = 1;
+ GtConfig->PeiGraphicsPeimInit = 0;
+ //
+ // Initialize the CdClock to 675 Mhz
+ //
+ GtConfig->CdClock = 3;
+
+ return EFI_SUCCESS;
+}
+
+
+#if (ENBDT_PF_ENABLE == 1)
+EFI_STATUS
+EFIAPI
+LoadHybridGraphicsDefault (
+ IN VOID *ConfigBlockPointer
+ )
+{
+ HYBRID_GRAPHICS_CONFIG *HgConfig;
+
+ HgConfig = ConfigBlockPointer;
+
+ //
+ // Initialize the Hybrid Graphics configuration
+ //
+ HgConfig->HgEnabled = 0x0;
+ HgConfig->HgDelayAfterPwrEn = 300;
+ HgConfig->HgDelayAfterHoldReset = 100;
+
+ return EFI_SUCCESS;
+}
+#endif
+
+
+EFI_STATUS
+EFIAPI
+LoadSaPreMemDefault (
+ IN VOID *ConfigBlockPointer
+ )
+{
+ SA_PRE_MEM_CONFIG *SaPreMemConfig;
+
+ SaPreMemConfig = ConfigBlockPointer;
+
+ //
+ // Initialize the Graphics configuration
+ //
+ SaPreMemConfig->GttSize = 3;
+ SaPreMemConfig->IgdDvmt50PreAlloc = 2;
+ SaPreMemConfig->InternalGraphics = 1;
+ SaPreMemConfig->PrimaryDisplay = 0;
+ SaPreMemConfig->ApertureSize = 2;
+
+ return EFI_SUCCESS;
+}
+
+
+/**
+ Initialize default settings for each SA Config block.
+
+ @param[in] ConfigBlockPointer The buffer pointer that will be initialized as specific config block.
+ @param[in] BlockId Request to initialize defaults of specified config block by given Block ID.
+
+ @retval EFI_SUCCESS The given buffer has contained the defaults of requested config block.
+ @retval EFI_NOT_FOUND Block ID is not defined so no default Config block will be initialized.
+
+**/
+EFI_STATUS
+EFIAPI
+LoadConfigBlockDefault (
+ IN VOID *ConfigBlockPointer,
+ IN EFI_GUID BlockGuid
+ )
+{
+ if (CompareGuid (&BlockGuid, &gSaMiscConfigGuid)) {
+ LoadSaMiscDefault (ConfigBlockPointer);
+ } else {
+ if (CompareGuid (&BlockGuid, &gGraphicsConfigGuid)) {
+ LoadGraphicsDefault (ConfigBlockPointer);
+ } else {
+ if (CompareGuid (&BlockGuid, &gIpuConfigGuid)) {
+ LoadIpuDefault (ConfigBlockPointer);
+ } else {
+ if (CompareGuid (&BlockGuid, &gSaPreMemConfigGuid)) {
+ LoadSaPreMemDefault (ConfigBlockPointer);
+ }
+#if (ENBDT_PF_ENABLE == 1)
+ else {
+ if (CompareGuid (&BlockGuid, &gHybridGraphicsConfigGuid)) {
+ LoadHybridGraphicsDefault (ConfigBlockPointer);
+ }
+#endif
+ else {
+ return EFI_NOT_FOUND;
+ }
+
+
+#if (ENBDT_PF_ENABLE == 1)
+ }
+#endif
+ }
+ }
+ }
+
+ return EFI_SUCCESS;
+}
+
+
+/**
+ Creates the Pre-Mem Config Blocks for SA Policy.
+ It allocates and zero out buffer, and fills in the Intel default settings.
+
+ @param[in, out] SiSaPolicyPpi The pointer to get SI/SA Policy PPI instance.
+
+ @retval EFI_SUCCESS The policy default is initialized.
+ @retval EFI_OUT_OF_RESOURCES Insufficient resources to create buffer.
+
+**/
+EFI_STATUS
+EFIAPI
+SaCreatePreMemConfigBlocks(
+ IN OUT SI_SA_POLICY_PPI **SiSaPolicyPpi
+ )
+{
+ UINT32 TotalBlockSize;
+ UINT16 TotalBlockCount;
+ UINT16 BlockCount;
+ VOID *ConfigBlockPointer;
+ EFI_STATUS Status;
+ SI_SA_POLICY_PPI *SaInitPolicy;
+ UINT32 ConfigBlockHdrSize;
+ UINT32 RequiredSize;
+
+ SaInitPolicy = NULL;
+ TotalBlockCount = sizeof (mBxtSaIpPreMemBlocks) / sizeof (CONFIG_BLOCK_HEADER);
+ DEBUG ((DEBUG_INFO, "TotalBlockCount = 0x%x\n", TotalBlockCount));
+
+ TotalBlockSize = 0;
+
+ for (BlockCount = 0; BlockCount < TotalBlockCount; BlockCount++) {
+ TotalBlockSize += (UINT32) mBxtSaIpPreMemBlocks[BlockCount].Size;
+ DEBUG ((DEBUG_INFO, "TotalBlockSize after adding Block[0x%x]= 0x%x\n", BlockCount, TotalBlockSize));
+ }
+ DEBUG ((DEBUG_INFO, "TotalBlockSize Final = 0x%x\n", TotalBlockSize));
+
+ ConfigBlockHdrSize = GetSizeOfConfigBlockTableHeaders ((UINT16) TotalBlockCount);
+
+ RequiredSize = ConfigBlockHdrSize + TotalBlockSize;
+
+ Status = CreateConfigBlockTable ((VOID *) &SaInitPolicy, TotalBlockCount, RequiredSize);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Initialize Policy Revision
+ //
+ SaInitPolicy->TableHeader.Header.Revision = SA_POLICY_PPI_REVISION;
+ //
+ // Initialize ConfigBlockPointer to NULL
+ //
+ ConfigBlockPointer = NULL;
+ //
+ // Loop to identify each config block from mBxtSaIpPreMemBlocks[] Table and add each of them
+ //
+ for (BlockCount = 0; BlockCount < TotalBlockCount; BlockCount++) {
+ ConfigBlockPointer = (VOID *) &mBxtSaIpPreMemBlocks[BlockCount];
+ Status = AddConfigBlock ((VOID *) SaInitPolicy, (VOID *) &ConfigBlockPointer);
+ ASSERT_EFI_ERROR (Status);
+ LoadConfigBlockDefault ((VOID *) ConfigBlockPointer, mBxtSaIpPreMemBlocks[BlockCount].Guid);
+ }
+ //
+ // Assignment for returning SaInitPolicy config block base address
+ //
+ *SiSaPolicyPpi = SaInitPolicy;
+
+ return EFI_SUCCESS;
+}
+
+
+/**
+ Creates the Config Blocks for SA Policy.
+ It allocates and zero out buffer, and fills in the Intel default settings.
+
+ @param[in, out] SiSaPolicyPpi The pointer to get SI/SA Policy PPI instance.
+
+ @retval EFI_SUCCESS The policy default is initialized.
+ @retval EFI_OUT_OF_RESOURCES Insufficient resources to create buffer.
+
+**/
+EFI_STATUS
+EFIAPI
+CreateConfigBlocks (
+ IN OUT SI_SA_POLICY_PPI **SiSaPolicyPpi
+ )
+{
+ UINT32 TotalBlockSize;
+ UINT16 TotalBlockCount;
+ UINT16 BlockCount;
+ VOID *ConfigBlockPointer;
+ EFI_STATUS Status;
+ SI_SA_POLICY_PPI *SaInitPolicy;
+ UINT32 ConfigBlockHdrSize;
+ UINT32 RequiredSize;
+
+ SaInitPolicy = NULL;
+ TotalBlockCount = sizeof (mBxtSaIpBlocks) / sizeof (CONFIG_BLOCK_HEADER);
+ DEBUG ((DEBUG_INFO, "TotalBlockCount = 0x%x\n", TotalBlockCount));
+
+ TotalBlockSize = 0;
+
+ for (BlockCount = 0 ; BlockCount < TotalBlockCount; BlockCount++) {
+ TotalBlockSize += (UINT32 )mBxtSaIpBlocks[BlockCount].Size;
+ DEBUG ((DEBUG_INFO, "TotalBlockSize after adding Block[0x%x]= 0x%x\n", BlockCount, TotalBlockSize));
+ }
+ DEBUG ((DEBUG_INFO, "TotalBlockSize Final = 0x%x\n", TotalBlockSize));
+
+ ConfigBlockHdrSize = GetSizeOfConfigBlockTableHeaders ((UINT16) TotalBlockCount);
+
+ RequiredSize = ConfigBlockHdrSize + TotalBlockSize;
+
+ Status = CreateConfigBlockTable ((VOID *) &SaInitPolicy, TotalBlockCount, RequiredSize);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Initialize Policy Revision
+ //
+ SaInitPolicy->TableHeader.Header.Revision = SA_POLICY_PPI_REVISION;
+ //
+ // Initialize ConfigBlockPointer to NULL
+ //
+ ConfigBlockPointer = NULL;
+ //
+ // Loop to identify each config block from mBxtSaIpBlocks[] Table and add each of them
+ //
+ for (BlockCount = 0 ; BlockCount < TotalBlockCount; BlockCount++) {
+ ConfigBlockPointer = (VOID *) &mBxtSaIpBlocks[BlockCount];
+ Status = AddConfigBlock ((VOID *) SaInitPolicy, (VOID *) &ConfigBlockPointer);
+ ASSERT_EFI_ERROR (Status);
+ LoadConfigBlockDefault ((VOID *) ConfigBlockPointer, mBxtSaIpBlocks[BlockCount].Guid);
+ }
+ //
+ // Assignment for returning SaInitPolicy config block base address
+ //
+ *SiSaPolicyPpi = SaInitPolicy;
+
+ return EFI_SUCCESS;
+}
+
+
+/**
+ Install PPI SiSaPolicyPpi.
+ While installed, RC assumes the Policy is ready and finalized. So please update and override
+ any setting before calling this function.
+
+ @param[in] SiSaPolicyPpi Pointer of policy structure.
+
+ @retval EFI_SUCCESS The policy is installed.
+ @retval EFI_OUT_OF_RESOURCES Insufficient resources to create buffer.
+
+**/
+EFI_STATUS
+EFIAPI
+SiSaInstallPolicyPpi (
+ IN SI_SA_POLICY_PPI *SiSaPolicyPpi
+ )
+{
+ EFI_STATUS Status;
+ EFI_PEI_PPI_DESCRIPTOR *SiSaInstallPolicyPpiDesc;
+
+ SiSaInstallPolicyPpiDesc = (EFI_PEI_PPI_DESCRIPTOR *) AllocateZeroPool (sizeof (EFI_PEI_PPI_DESCRIPTOR));
+ ASSERT (SiSaInstallPolicyPpiDesc != NULL);
+ if (SiSaInstallPolicyPpiDesc == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ //
+ // Initialize the PPI
+ //
+ SiSaInstallPolicyPpiDesc->Flags = EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
+ SiSaInstallPolicyPpiDesc->Guid = &gSiSaPolicyPpiGuid;
+ SiSaInstallPolicyPpiDesc->Ppi = SiSaPolicyPpi;
+
+ //
+ // Install PEI SA Policy PPI
+ //
+ Status = PeiServicesInstallPpi (SiSaInstallPolicyPpiDesc);
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+
+
+/**
+ SaInstallPreMemPolicyPpi installs Sa Pre Mem PolicyPpi.
+ While installed, RC assumes the Policy is ready and finalized. So please update and override
+ any setting before calling this function.
+
+ @param[in] SaPreMemPolicyPpi The pointer to SA PREMEM Policy PPI instance.
+
+ @retval EFI_SUCCESS The policy is installed.
+ @retval EFI_OUT_OF_RESOURCES Insufficient resources to create buffer.
+
+**/
+EFI_STATUS
+EFIAPI
+SaInstallPreMemPolicyPpi (
+ IN SI_SA_POLICY_PPI *SaPolicyPpi
+ )
+{
+ EFI_STATUS Status;
+ EFI_PEI_PPI_DESCRIPTOR *SaPreMemPolicyPpiDesc;
+
+ SaPreMemPolicyPpiDesc = (EFI_PEI_PPI_DESCRIPTOR *) AllocateZeroPool (sizeof (EFI_PEI_PPI_DESCRIPTOR));
+ if (SaPreMemPolicyPpiDesc == NULL) {
+ ASSERT (FALSE);
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ SaPreMemPolicyPpiDesc->Flags = EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
+ SaPreMemPolicyPpiDesc->Guid = &gSiSaPreMemPolicyPpiGuid;
+ SaPreMemPolicyPpiDesc->Ppi = SaPolicyPpi;
+
+ //
+ // Install PREMEM Policy PPI
+ //
+ Status = PeiServicesInstallPpi (SaPreMemPolicyPpiDesc);
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/PeiSaPolicyLib/PeiSaPolicyLib.inf b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/PeiSaPolicyLib/PeiSaPolicyLib.inf new file mode 100644 index 0000000000..54a4d90c0a --- /dev/null +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/PeiSaPolicyLib/PeiSaPolicyLib.inf @@ -0,0 +1,47 @@ +## @file
+# Pei SA policy library.
+#
+# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010017
+ BASE_NAME = PeiSaPolicyLib
+ FILE_GUID = B612937D-2674-4e5f-9EAB-3B94CCF31C9E
+ VERSION_STRING = 1.0
+ MODULE_TYPE = PEIM
+ LIBRARY_CLASS = PeiSaPolicyLib
+
+[Sources]
+ PeiSaPolicyLib.c
+ PeiSaPolicyLibrary.h
+
+[Packages]
+ MdePkg/MdePkg.dec
+ BroxtonSiPkg/BroxtonSiPkg.dec
+
+[LibraryClasses]
+ DebugLib
+ PeiServicesLib
+ MemoryAllocationLib
+ ConfigBlockLib
+ BaseMemoryLib
+
+[Ppis]
+ gSiSaPolicyPpiGuid ## PRODUCES
+ gSiSaPreMemPolicyPpiGuid ## PRODUCES
+ gSaMiscConfigGuid ## PRODUCES
+ gGraphicsConfigGuid ## PRODUCES
+ gMemoryConfigGuid ## PRODUCES
+ gIpuConfigGuid ## PRODUCES
+ gHybridGraphicsConfigGuid ## PRODUCES
+ gSaPreMemConfigGuid
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/PeiSaPolicyLib/PeiSaPolicyLibrary.h b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/PeiSaPolicyLib/PeiSaPolicyLibrary.h new file mode 100644 index 0000000000..26a6e67968 --- /dev/null +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/PeiSaPolicyLib/PeiSaPolicyLibrary.h @@ -0,0 +1,70 @@ +/** @file
+ Header file for the Pei SA policy library.
+
+ Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _PEI_SA_POLICY_LIBRARY_H_
+#define _PEI_SA_POLICY_LIBRARY_H_
+
+#include <Library/DebugLib.h>
+#include <Library/BaseLib.h>
+#include <Library/PeiServicesLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/ConfigBlockLib.h>
+#include <Ppi/SaPolicy.h>
+#include <Library/PeiSaPolicyLib.h>
+
+#define SaIoRead8 IoRead8
+#define SaIoRead16 IoRead16
+#define SaIoRead32 IoRead32
+#define SaIoWrite8 IoWrite8
+#define SaIoWrite16 IoWrite16
+#define SaIoWrite32 IoWrite32
+#define SaCopyMem CopyMem
+#define SaSetMem SetMem
+#define SaLShiftU64 LShiftU64
+#define SaRShiftU64 RShiftU64
+#define SaMultU64x32 MultU64x32
+
+#define RTC_INDEX_REGISTER (0x70)
+#define RTC_TARGET_REGISTER (0x71)
+#define R_PCH_RTC_INDEX_ALT (0x74)
+#define R_PCH_RTC_TARGET_ALT (0x75)
+#define R_PCH_RTC_EXT_INDEX_ALT (0x76)
+#define R_PCH_RTC_EXT_TARGET_ALT (0x77)
+
+#define RTC_INDEX_MASK (0x7F)
+#define RTC_BANK_SIZE (0x80)
+
+#define RTC_SECONDS (0x00)
+#define RTC_MINUTES (0x02)
+#define RTC_HOURS (0x04)
+#define RTC_DAY_OF_MONTH (0x07)
+#define RTC_MONTH (0x08)
+#define RTC_YEAR (0x09)
+#define CMOS_REGA (0x0A)
+#define CMOS_REGB (0x0B)
+#define CMOS_REGC (0x0C)
+#define CMOS_REGD (0x0D)
+
+#define RTC_UPDATE_IN_PROGRESS (0x80)
+#define RTC_HOLD (0x80)
+#define RTC_MODE_24HOUR (0x02)
+#define RTC_CLOCK_DIVIDER (0x20)
+#define RTC_RATE_SELECT (0x06)
+
+#define BCD2BINARY(A) (((((A) >> 4) & 0xF) * 10) + ((A) & 0xF))
+#define CENTURY_OFFSET (2000)
+
+#endif // _PEI_SA_POLICY_LIBRARY_H_
+
|