1 files changed, 2 insertions, 3 deletions
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/MemoryInit/BXT/Include/MrcEfiDefinitions.h b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/MemoryInit/BXT/Include/MrcEfiDefinitions.h
index 1bf9d0ffec..b19d6a05c6 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/MemoryInit/BXT/Include/MrcEfiDefinitions.h
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/MemoryInit/BXT/Include/MrcEfiDefinitions.h
@@ -1,5 +1,5 @@
 /** @file
-  Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
+  -  Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
 
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
@@ -64,12 +64,10 @@ typedef struct {
   UINT8                 RmtMode;
   UINT8                 RmtCheckRun;
   UINT16                RmtMarginCheckScaleHighThreshold;
-  UINT8                 Reserved1;
   UINT32                MsgLevelMask;
   UINT8                 SpdAddress[DRAM_POLICY_NUMBER_SPD_ADDRESSES];
   UINT8                 ChSwizzle[DRAM_POLICY_NUMBER_CHANNELS][DRAM_POLICY_NUMBER_BITS];
   DRP_DRAM_POLICY       ChDrp[DRAM_POLICY_NUMBER_CHANNELS];
-  UINT8                 Reserved2;
   UINT8                 DebugMsgLevel;
   UINT8                 reserved[13];
 } DRAM_POLICY_PPI;
@@ -81,6 +79,7 @@ typedef struct {
 typedef enum {
   Bxt          = 0x00,
   Bxt1,
+  BxtX,
   BxtP,
   BxtSeriesMax = 0xFF
 } BXT_SERIES;