diff options
Diffstat (limited to 'UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.S')
-rw-r--r-- | UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.S | 81 |
1 files changed, 43 insertions, 38 deletions
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.S b/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.S index c4a2f6fb83..4c74957f04 100644 --- a/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.S +++ b/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.S @@ -1,19 +1,19 @@ -#------------------------------------------------------------------------------ -#* -#* Copyright 2009, Intel Corporation -#* All rights reserved. This program and the accompanying materials -#* are licensed and made available under the terms and conditions of the BSD License -#* which accompanies this distribution. The full text of the license may be found at -#* http://opensource.org/licenses/bsd-license.php -#* -#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -#* -#* -#------------------------------------------------------------------------------ - - - +#------------------------------------------------------------------------------
+#*
+#* Copyright 2009, Intel Corporation
+#* All rights reserved. This program and the accompanying materials
+#* are licensed and made available under the terms and conditions of the BSD License
+#* which accompanies this distribution. The full text of the license may be found at
+#* http://opensource.org/licenses/bsd-license.php
+#*
+#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#*
+#*
+#------------------------------------------------------------------------------
+
+
+
#
# Float control word initial value:
# all exceptions masked, double-precision, round-to-nearest
@@ -23,18 +23,21 @@ ASM_PFX(mFpuControlWord): .word 0x027F # Multimedia-extensions control word:
# all exceptions masked, round-to-nearest, flush to zero for masked underflow
#
-ASM_PFX(mMmxControlWord): .long 0x01F80 - -# +ASM_PFX(mMmxControlWord): .long 0x01F80
+
+#
# Initializes floating point units for requirement of UEFI specification.
#
# This function initializes floating-point control word to 0x027F (all exceptions
# masked,double-precision, round-to-nearest) and multimedia-extensions control word
# (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
-# for masked underflow). -# -ASM_GLOBAL ASM_PFX(InitializeFloatingPointUnits) -ASM_PFX(InitializeFloatingPointUnits): +# for masked underflow).
+#
+ASM_GLOBAL ASM_PFX(InitializeFloatingPointUnits)
+ASM_PFX(InitializeFloatingPointUnits):
+
+ pushl %ebx
+
#
# Initialize floating point units
#
@@ -49,22 +52,24 @@ ASM_PFX(InitializeFloatingPointUnits): cpuid
btl $25, %edx
jnc Done
- - # - # Set OSFXSR bit 9 in CR4 - # - movl %cr4, %eax - or $200, %eax - movl %eax, %cr4 - +
+ #
+ # Set OSFXSR bit 9 in CR4
+ #
+ movl %cr4, %eax
+ or $200, %eax
+ movl %eax, %cr4
+
#
# The processor should support SSE instruction and we can use
# ldmxcsr instruction
#
- ldmxcsr ASM_PFX(mMmxControlWord) - -Done: - ret - -#END - + ldmxcsr ASM_PFX(mMmxControlWord)
+
+Done:
+ popl %ebx
+
+ ret
+
+#END
+
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