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-rw-r--r--UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.S6
-rw-r--r--UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S2
2 files changed, 3 insertions, 5 deletions
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.S b/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.S
index 4c74957f04..1d7bd21b6e 100644
--- a/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.S
+++ b/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.S
@@ -1,6 +1,6 @@
#------------------------------------------------------------------------------
#*
-#* Copyright 2009, Intel Corporation
+#* Copyright 2009 - 2010, Intel Corporation
#* All rights reserved. This program and the accompanying materials
#* are licensed and made available under the terms and conditions of the BSD License
#* which accompanies this distribution. The full text of the license may be found at
@@ -12,8 +12,6 @@
#*
#------------------------------------------------------------------------------
-
-
#
# Float control word initial value:
# all exceptions masked, double-precision, round-to-nearest
@@ -57,7 +55,7 @@ ASM_PFX(InitializeFloatingPointUnits):
# Set OSFXSR bit 9 in CR4
#
movl %cr4, %eax
- or $200, %eax
+ or $0x200, %eax
movl %eax, %cr4
#
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S
index bf8d1c13e4..db41587290 100644
--- a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S
+++ b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S
@@ -41,7 +41,7 @@ ASM_PFX(InitializeFloatingPointUnits):
# Set OSFXSR bit 9 in CR4
#
movq %cr4, %rax
- or $200, %rax
+ or $0x200, %rax
movq %rax, %cr4
#