1 files changed, 25 insertions, 3 deletions
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.asm b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.asm
index 3ff01b2a0c..12bbec0690 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.asm
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.asm
@@ -1,5 +1,5 @@
 ;------------------------------------------------------------------------------ ;
-; Copyright (c) 2012 - 2013, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>
 ; This program and the accompanying materials
 ; are licensed and made available under the terms and conditions of the BSD License
 ; which accompanies this distribution.  The full text of the license may be found at
@@ -250,10 +250,22 @@ ErrorCodeAndVectorOnStack:
     push    eax
 
 ;; UINT32  Cr0, Cr1, Cr2, Cr3, Cr4;
+    mov     eax, 1
+    push    ebx         ; temporarily save value of ebx on stack 
+    cpuid               ; use CPUID to determine if FXSAVE/FXRESTOR and DE 
+                        ; are supported
+    pop     ebx         ; retore value of ebx that was overwritten by CPUID 
     mov     eax, cr4
-    or      eax, 208h
+    push    eax         ; push cr4 firstly
+    test    edx, BIT24  ; Test for FXSAVE/FXRESTOR support
+    jz      @F
+    or      eax, BIT9   ; Set CR4.OSFXSR
+@@:    
+    test    edx, BIT2   ; Test for Debugging Extensions support
+    jz      @F
+    or      eax, BIT3   ; Set CR4.DE
+@@:    
     mov     cr4, eax
-    push    eax
     mov     eax, cr3
     push    eax
     mov     eax, cr2
@@ -280,7 +292,11 @@ ErrorCodeAndVectorOnStack:
 ;; FX_SAVE_STATE_IA32 FxSaveState;
     sub     esp, 512
     mov     edi, esp
+    test    edx, BIT24  ; Test for FXSAVE/FXRESTOR support.
+                        ; edx still contains result from CPUID above
+    jz      @F
     db      0fh, 0aeh, 07h ;fxsave [edi]
+@@:    
 
 ;; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear
     cld
@@ -307,7 +323,13 @@ ErrorCodeAndVectorOnStack:
 
 ;; FX_SAVE_STATE_IA32 FxSaveState;
     mov     esi, esp
+    mov     eax, 1
+    cpuid               ; use CPUID to determine if FXSAVE/FXRESTOR
+                        ; are supported
+    test    edx, BIT24  ; Test for FXSAVE/FXRESTOR support
+    jz      @F
     db      0fh, 0aeh, 0eh ; fxrstor [esi]
+@@:    
     add     esp, 512
 
 ;; UINT32  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;