1 files changed, 1 insertions, 1 deletions
diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
index 1cba34cd59..9f08f5d188 100644
--- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
+++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
@@ -151,7 +151,7 @@ SendIpi (
     // For x2APIC, A single MSR write to the Interrupt Command Register is required for dispatching an 
     // interrupt in x2APIC mode.
     //
-    MsrValue = (((UINT64)ApicId) << 32) | IcrLow;
+    MsrValue = LShiftU64 ((UINT64) ApicId, 32) | IcrLow;
     AsmWriteMsr64 (X2APIC_MSR_ICR_ADDRESS, MsrValue);
   }
 }