diff options
Diffstat (limited to 'UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c')
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c index 5b11e5eb48..9cee784156 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c @@ -1,7 +1,7 @@ /** @file
Page Fault (#PF) handler for X64 processors
-Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -17,7 +17,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #define PAGE_TABLE_PAGES 8
#define ACC_MAX_BIT BIT3
LIST_ENTRY mPagePool = INITIALIZE_LIST_HEAD_VARIABLE (mPagePool);
-SPIN_LOCK mPFLock;
BOOLEAN m1GPageTableSupport = FALSE;
/**
@@ -107,7 +106,7 @@ SmmInitPageTable ( //
// Initialize spin lock
//
- InitializeSpinLock (&mPFLock);
+ InitializeSpinLock (mPFLock);
m1GPageTableSupport = Is1GPageSupport ();
//
@@ -651,7 +650,7 @@ SmiPFHandler ( ASSERT (InterruptType == EXCEPT_IA32_PAGE_FAULT);
- AcquireSpinLock (&mPFLock);
+ AcquireSpinLock (mPFLock);
PFAddress = AsmReadCr2 ();
@@ -688,5 +687,5 @@ SmiPFHandler ( SmiDefaultPFHandler ();
}
- ReleaseSpinLock (&mPFLock);
+ ReleaseSpinLock (mPFLock);
}
|