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-rw-r--r--UnixPkg/Library/UnixBaseLib/X64/EnableCache.S39
1 files changed, 39 insertions, 0 deletions
diff --git a/UnixPkg/Library/UnixBaseLib/X64/EnableCache.S b/UnixPkg/Library/UnixBaseLib/X64/EnableCache.S
new file mode 100644
index 0000000000..9d739603c9
--- /dev/null
+++ b/UnixPkg/Library/UnixBaseLib/X64/EnableCache.S
@@ -0,0 +1,39 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# EnableCache.S
+#
+# Abstract:
+#
+# Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
+# the NW bit of CR0 to 0
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmEnableCache (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(AsmEnableCache)
+ASM_PFX(AsmEnableCache):
+ wbinvd
+ movq %cr0, %rax
+ btrq $30, %rax
+ btrq $29, %rax
+ movq %rax, %cr0
+ ret