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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
Reviewed-by: Shifei Lu <shifeix.a.lu@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Fix GCC build errors in script files.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by:zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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System will hang up when run reconnect -r with SD Card insert.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
CC: Mang Guo <mang.guo@intel.com>
CC: Shifei Lu <shifeix.a.lu@intel.com>
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BOARD_ID bits and GPIO pins mapping:
BOARD_ID0 GPIO_224(J45)
BOARD_ID1 GPIO_213(M47)
BOARD_ID2 GPIO_223(H48)
BOARD_ID3 GP_CAMERASB10(R34)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
CC: Mang Guo <mang.guo@intel.com>
CC: Shifei Lu <shifeix.a.lu@intel.com>
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Upgrade core to UDK2017
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Debug BIOS will assert if change setup and save.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Change code to set R_SMI_EN earlier in S3 boot path to make sure all SMI were detected.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Change BIOS version to 0.63
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
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GPIO configuration for Low Speed Expander and System Feature Expander pins.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Add VBT for MIPI LFP; Change HDMI drive strength to 400mV 0dB.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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When restoring MSR for S3 setting, SmmStartupThisAp will return error if CPU index is BSP. This issue caused S3 resume failed sometimes. This patch is mainly fix this issue.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Add additional SATA initialization code.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Change variable attribute to fix variable couldn't be set issue.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Fix "AcpiGlobalVariable" couldn't be get issue. S3 memory info was saved in this variable.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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RAM SIZE in frontpage is not correct. Pass correct DRAM density parameter to FSP to fix this issue.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Change BIOS version to 0.62
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: Wei David <david.wei@intel.com>
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Fix Graphic driver not connect issue when boot to OS if fastboot enable.
Set network default disable.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: david.wei@intel.com
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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1. Unload UNDI if fastboot enable. 2. Optimized the FV decompressing process
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
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MCR parameter restored in the second time of boot, so the boot time is less than the first time of boot.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
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Cleanup code about locking SPI Flash; Change the default value of BIOS Lock setup option to FALSE.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: David Wei <david.wei@intel.com>
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Add SPI and FirmwareUpdate modules into build meta-data files.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: David Wei <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
Reviewed-by: David Wei <david.wei@intel.com>
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Add FirmwareUpdate application for Minnnowboard 3, which is for updating 8MB SPI NOR flash.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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These code cause HDMI cable of some vendor couldn't work.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: lushifex <shifeix.a.lu@intel.com>
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