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2016-07-25ShellPkg/IsVolatileEnv: Handle memory allocation failureRuiyu Ni
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com> (cherry picked from commit 31e5b912b99e0fb39e81f70bc24a4be589191abb)
2016-07-25ShellPkg/Shell.c: Handle memory allocation failureRuiyu Ni
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com> (cherry picked from commit b2c036a7f016bc8808c5eb8eb3dd5399a96664b9)
2016-07-25ShellPkg: Fix issue about Ifconfig6 -r command.Zhang Lubo
Follow the Shell Spec, when the interface name is Specified, we need to refresh the Ipv6 configuration. Cc: Hegde Nagaraj P <nagaraj-p.hegde@hpe.com> Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Wu Jiaxin <jiaxin.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Zhang Lubo <lubo.zhang@intel.com> Reviewed-by: Hegde Nagaraj P <nagaraj-p.hegde@hpe.com> Reviewed-by: Sriram Subramanian <sriram-s@hpe.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-By: Wu Jiaxin <jiaxin.wu@intel.com> (cherry picked from commit e2f5c491d8749c88cbf56168a3493d70ff19a382)
2016-07-22SecurityPkg: AuthVariableLib: Revert UserPhysicalPresent feature from ↵Zhang, Chao B
AuthVariableLib Physical Presence state reporting is constrained by physical presence caching in variable driver. For example, reporting must be prior to Physical Presence caching. Physical Presence state becomes constant rather than instant after caching. Therefore, PlatformSecureLib is responsible for reporting Physical Presence state in expected way. This reverts commit 90fa53213ec458b5c4f8851c09aeb3de977531e5. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Yao Jiewen <jiewen.yao@intel.com> (cherry picked from commit 76bfc7e3ea136412808ad4cf54471c651bdec464)
2016-07-21UefiCpuPkg/PiSmmCpuDxeSmm: SMM_CPU_DATA_BLOCK is not clearedJeff Fan
The commit 8b9311 changed the zeroing of mSmmMpSyncData of type SMM_DISPATCHER_MP_SYNC_DATA by the following patch. - ZeroMem (mSmmMpSyncData, mSmmMpSyncDataSize); + mSmmMpSyncData->SwitchBsp = FALSE; mSmmMpSyncDataSize not only includes SMM_DISPATCHER_MP_SYNC_DATA, but also includes the SMM_CPU_DATA_BLOCK array and one BOOLEAN variable array as shown here: mSmmMpSyncDataSize = sizeof (SMM_DISPATCHER_MP_SYNC_DATA) + (sizeof (SMM_CPU_DATA_BLOCK) + sizeof (BOOLEAN)) * gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus; This patch restores the original ZeroMem() to clear all CPU Sync data. The commit 8b9311 may cause unexpected behavior. v2: Mentioned CandidateBsp array in comments to make it more accurate. Cc: Laszlo Ersek <lersek@redhat.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> (cherry picked from commit e78a2a49ee6b0c0d7c6997c87ace31d7761cf636)
2016-07-21UefiCpuPkg/PiSmmCpuDxeSmm: Remove duplicate aligned buffer on S3 pathJeff Fan
InitializeMpSyncData() invokes InitializeSmmCpuSemaphores() to allocate an aligned buffer for all locks and semaphores. However, this function is invoked on S3 resume path again to reset mSmmMpSyncData. It causes an additional aligned buffer to be allocated. This update moves InitializeSmmCpuSemaphores() into InitializeMpServiceData() that is only invoked on normal boot. InitializeMpSyncData() is updated to reset the locks/semaphore in mSmmMpSyncData. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com> (cherry picked from commit 8b9311b79557311e137d0ffdc7934fea3966b0d7)
2016-07-20IntelFsp2WrapperPkg SecFspWrapperPlatformSecLibSample:Update code to pass buildLiming Gao
1. Update its library class to PlatformSecLib 2. Update source code to refer to the matched header file Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> (cherry picked from commit f86b9293ecbe0344074817b1a2f6876fa2a629e2)
2016-07-19IntelFsp2Pkg BaseFspPlatformLib: Remove Boot Loader tempram MigrationSatya Yarlagadda
In FSP2.0, Boot loader should migrate its temp ram before calling the tempramexit API to tear down the tempram. so, we don't need the function to migrate the BL TempRam in the IntelFsp2Pkg. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> (cherry picked from commit 35126af96ce8dcb184aba5caf87f476bf20790dc)
2016-07-19IntelFsp2WrapperPkg: Remove unused header files from Fspm and Fsps WrapperPeimLiming Gao
PlatformSecLib.h is not used and removed. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> (cherry picked from commit 04147690b59bba6900e175c7d06e3fe48570ab73)
2016-07-18MdeModulePkg/PciHostBridgeDxe: Fix VS tool chain build failureRuiyu Ni
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Shumin Qiu <shumin.qiu@intel.com> (cherry picked from commit 26bd6437ca574c6285d4c47d147f96630fa5f837)
2016-07-18MdeModulePkg/PciHostBridgeDxe: Add CpuArch protocol dependencyRuiyu Ni
The driver entry point calls gDS->SetMemorySpaceAttributes(). This interface may return EFI_NOT_AVAILABLE_YET when CPU Arch protocol is not available. So we need to list CpuArch protocol in its INF dependency section. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> (cherry picked from commit 0b58c4894dad03100c17ce5b1124c624f002700f)
2016-07-18MdeModulePkg/PciHostBridgeDxe: Honor ResourceAssignedRuiyu Ni
Change PciHostBridgeDxe driver to not install the PciHostBridgeResourceAllocation protocol and let PciRootBridgeIo.Configuration() return the correct PCI resource assignment information when the ResourceAssigned is TRUE. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> (cherry picked from commit 401f8cd110f7eec7684d948df29e00b44b1468d9)
2016-07-18MdeModulePkg/PciHostBridgeLib: Add ResourceAssigned fieldRuiyu Ni
Some platform doesn't require PciBus driver to assign resource to PCI devices which causes PciRootBridgeIo.Configuration() cannot return correct resource information to caller. When resource assignment by PciBus is not mandatory, only light version of PCI bus enumeration is performed, which only collects the device resource consumption and publishes the PciIo instance. The corresponding logic is in PciEnumeratorLight() in PciBus driver. But PciEnumeratorLight() still depends on PciRootBridgeIo.Configuration() returns the starting bus number in order to search down to find all PCI devices under the root bridge. When ResourceAssigned in PCI_ROOT_BRIDGE returned by PciHostBridgeGetRootBridges() is TRUE, PciHostBridge driver treats the Bus/Io/Mem/MemAbove4G/PMem/PMemAbove4G as the resource that are *actually assigned* to the root bridge, instead of the resource that *can be assigned* to the root bridge. So that PciRootBridgeIo.Configuration() can return the correct information. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> (cherry picked from commit c5be19f378216a07c7783e07973d976407885e75)
2016-07-18MdeModulePkg/PciHostBridgeDxe: Fix a Base/Limit comparing bugRuiyu Ni
When the aperture base equals to aperture limit, the old code treats the aperture as non-existent. It's not correct because it indicates a range starting with base and the length is 1. The new code corrects the comparing bug. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> (cherry picked from commit f9607bef04a9abb698f9f8b4518b7955dc326521)
2016-07-18MdeModulePkg/PciHostBridgeDxe: Don't miss prefetchable MMIO apertureRuiyu Ni
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> (cherry picked from commit 814f4306d8f72c56512765de4de36bce774ce62a)
2016-07-18MdeModulePkg/PciBus: Should reserve enough bus number for HPCRuiyu Ni
When there is no bridge before the HPC (hot plug controller), the issue cannot be seen. But when there are bridges before the HPC, the PciBus will only use the value (= <CurrentBusNumber> + <ReservedBusNumber>) as the sub-ordinary bus number for HPC. The correct sub-ordinary bus number should be: <CurrentBusNumber> + <OccupiedBusNumber>(by earlier bridges) + <ReservedBusNumber>. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> (cherry picked from commit f6830005bb1a2fc225c89cdb1367b5058e939acc)
2016-07-15IntelSiliconPkg/IgdOpRegion: Add definition for Intel IGDJiewen Yao
OpRegion. Add IGD OpRegion definition from Intel Integrated Graphics Device OpRegion Specification. at https://01.org/sites/default/files/documentation/acpi_igd_opregion_spec_0.pdf Previous submission seems appears to be cut off. I do not know why. Add missing part here. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> (cherry picked from commit 9fb16e2143009c3158ab4be11adc3380bdab44ff)
2016-07-15IntelSiliconPkg/IgdOpRegion: Add definition for Intel IGD OpRegion.Jiewen Yao
Add IGD OpRegion definition from Intel Integrated Graphics Device OpRegion Specification. at https://01.org/sites/default/files/documentation/acpi_igd_opregion_spec_0.pdf Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> (cherry picked from commit 7e74fd570dd9f262c51994b4d256ced7ef41735d)
2016-07-15IntelSiliconPkg: Add initial version.Jiewen Yao
This package will include open source common Intel silicon related modules. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> (cherry picked from commit 9429e8a07da184ed4c5051c7ad7647677b0740aa)
2016-07-15UefiCpuPkg/MtrrLib: Fixed bug if length is less than Fixed-MTRR rangeJeff Fan
Currently, if the memory length to be programmed is less than the remaining size of one Fixed-MTRR supported, RETURN_UNSUPPORTED returned. This is not correct. This is one regression at 07e889209034ba94bfac9e765b8a50ef344daef2 when we updated ProgramFixedMtrr() to remove the loop of calculating Fixed-MTRR Mask. This fix will calculate Right offset in Fixed-MTRR beside left offset. It supports small length (less than remaining size supported by Fixed-MTRR) to be programmed. Cc: Eric Dong <eric.dong@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> (cherry picked from commit eecad34987c56317f69d4eee9d9c1df0c825a79e)
2016-07-15UefiCpuPkg/MtrrLib: Remove the loop of calculating Fixed-MTRR MaskJeff Fan
Introduce the 32bit mask seeds to calculate Fixed-MTRR or&and mask values. It could avoid the loop operation and 64bit shift operations. Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> (cherry picked from commit 07e889209034ba94bfac9e765b8a50ef344daef2)
2016-07-15UefiCpuPkg/MtrrLib: Remove the loop of calculating byte offset in MSRJeff Fan
Calculate byte offset in MSR directly and removing the loop. Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> (cherry picked from commit aaa1e579a5109a868863c8a3c7a51580f83b4c38)
2016-07-15UefiCpuPkg/MtrrLib: Reduce the loop time to get fixed-MTRR MSR indexJeff Fan
Add input fixed-MTRR MSR index to be start MSR index to avoid finding fixed-MTRR MSR index from 0 at each time. Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> (cherry picked from commit 0f354122328755c7a1cb0f68a37748f166d412ae)
2016-07-15SecurityPkg DxeTpmMeasureBootLib: Add comments in TcgMeasurePeImage()Liming Gao
The input PeImage in TcgMeasurePeImage() has been checked. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com> (cherry picked from commit e39d0569a67f2cac31ad79f8d16f059c27ed82e2)
2016-07-15SecurityPkg DxeImageVerificationLib: Add comments in HashPeImage()Liming Gao
The input PeImage in HashPeImage() has been checked. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com> (cherry picked from commit 89fb5aef411587661c9a1c00645d46adf76b2fb2)
2016-07-15SecurityPkg Tcg2Dxe: Add check for the PE/COFF imageLiming Gao
Use BasePeCoffLib PeCoffLoaderGetImageInfo() to check the PE/COFF image. In V2, add specific ImageRead() to make sure the PE/COFF image content read is within the image buffer. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com> (cherry picked from commit 5a8eae9560ddf8422ed1b43aff8612931e472eb6)
2016-07-15SecurityPkg TrEEDxe: Add check for the PE/COFF image.Liming Gao
Use BasePeCoffLib PeCoffLoaderGetImageInfo() to check the PE/COFF image. In V2, add specific ImageRead() to make sure the PE/COFF image content read is within the image buffer. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com> (cherry picked from commit cad19cd3f2ac26de35c545acd29f98c5f4f82f7c)
2016-07-15SecurityPkg SecureBootConfigDxe: Add check for the external PE/COFF image.Liming Gao
Use BasePeCoffLib PeCoffLoaderGetImageInfo() to check the PE/COFF image. In V2, add specific ImageRead() to make sure the PE/COFF image content read is within the image buffer. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com> (cherry picked from commit 5e9dfc67821b75ab606d8565f0bc1133bbc2a92c)
2016-07-15MdePkg/BaseSynchronizationLib: spin lock alignment is 32 at leastJeff Fan
Some processor may return small cache line size, we should return 32 bytes at least for spin lock alignment. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> (cherry picked from commit 52f5bd2669916c54845eda8829b2f129b6088896)
2016-07-15MdePkg/BaseSynchronizationLib: Add spin lock alignment for IA32/x64Jeff Fan
From Intel(R) 64 and IA-32 Architectures Software Developer's Manual, one lock or semaphore is suggested to be present within a cache line. If the processors are based on Intel NetBurst microarchitecture, two cache lines are suggested. This could minimize the bus traffic required to service locks. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> (cherry picked from commit 5f0a17d83a6443931068d428600824276ca2bd37)
2016-07-15MdePkg/BaseSynchronizationLib: Do not check timeout if lock releasedJeff Fan
Current AcquireSpinLock() will check if timeout happens when PcdSpinLockTimeout is not zero, even though the spin lock is already released. It may do unnecessary operation to read timer's counter. This update is trying to acquire spin lock firstly. If it could be acquired successfully, needn't to check timeout at all. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> (cherry picked from commit 0f18e1eda2a807283484adfbf5eaae6a92b1ffa7)
2016-07-14BaseTools: External link to BaseTools Win binary r167(main trunk r21607)Hao Wu
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com>
2016-07-14IntelFspWrapperPkg: PeiFspHobProcessLibSample: remove set but unused variablesLaszlo Ersek
Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> (cherry picked from commit 7b3d87aca2278a270bcd9588bf8902b397434c4f)
2016-07-14SourceLevelDebugPkg: DebugAgentCommon: remove set but unused variablesLaszlo Ersek
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Hao Wu <hao.a.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> (cherry picked from commit c30d65e080c244b1a131a7dea1251353cc1edbbd)
2016-07-14SourceLevelDebugPkg: DebugCommunicationLibUsb: remove set but unused variablesLaszlo Ersek
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Hao Wu <hao.a.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> (cherry picked from commit 491ae245596604098333bc14a1e0e28aafe995e5)
2016-07-14NetworkPkg: IpSecDxe: remove set but unused variablesLaszlo Ersek
Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> (cherry picked from commit aa5fc205ddf1cc5339196b411cc4afa196f3411d)
2016-07-14IntelFrameworkModulePkg: BiosVideo: remove set but unused variableLaszlo Ersek
Cc: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> (cherry picked from commit 1e8561d18118f12e97c4441e9a0d7e8e0b9c5dde)
2016-07-14IntelFrameworkModulePkg: LegacyBootMaintUiLib: remove set but unused variablesLaszlo Ersek
Cc: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> (cherry picked from commit 98c12c0ec9f625d003b599e366dfed38eb73c2c1)
2016-07-14IntelFrameworkModulePkg: DxeCapsuleLib: remove set but unused variablesLaszlo Ersek
Cc: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> (cherry picked from commit cf8a6e5cf837604bbd998d0829c493fcbf82fbe7)
2016-07-14MdeModulePkg BootMaint: remove set but unused variablesHao Wu
(Integrate commit 8192be265ee142d4a71cc9024a2ce0060a3d686d from master branch) Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2016-07-14MdeModulePkg DeviceMngr: remove set but unused variablesHao Wu
(Integrate commit 3b93b8070d450eb15679c3454c8329a6a31d8081 from master branch) Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2016-07-14MdeModulePkg: BootManagerMenuApp: remove set but unused variablesLaszlo Ersek
Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> (cherry picked from commit c1df8b889d4a9d8316d707e3ba8728f2628d5788)
2016-07-14MdeModulePkg: UfsPassThruDxe: remove set but unused variablesLaszlo Ersek
Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> (cherry picked from commit 59ddab7e6e7397736f89355ccbaa2e1817992fec)
2016-07-14MdeModulePkg/PciHostBridgeDxe: remove unused but set variablesArd Biesheuvel
Remove variables that are declared, assigned but never referenced. This fixes a warning emitted by GCC when -Wunused-but-set-variable is in effect. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> (cherry picked from commit 3a9dcf9f28ef6cd62c7eaade706adbe435262fa8)
2016-07-14UefiCpuPkg/CpuMpPei: Remove PmodeOffset and LmodeOffsetJeff Fan
Remove Pmode(Entry)Offset/Lmode(Entry)Offset and use unified Mode(Entry)Offset to clean up the definition of MP_ASSEMBLY_ADDRESS_MAP and MP_CPU_EXCHANGE_INFO. Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Giri Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> (cherry picked from commit 01beffa7e9bb47adfeeb9868058311a478698b72)
2016-07-14UefiCpuPkg/CpuMpPei: Remove un-used variables and functionsJeff Fan
Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Giri Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> (cherry picked from commit 6d98a371593cbeee89001182a50f144f074893e2)
2016-07-14UefiCpuPkg/CpuMpPei: Do not load new GDT tableJeff Fan
Do not load the new GDT table and just to use the exiting BSP's GDT table set up by SEC phase. Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Giri Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> (cherry picked from commit 9c3d2f9a2985d97961b07ddc493b6e406ace8814)
2016-07-14UefiCpuPkg/CpuMpPei/X64: Use CodeSegment and DataSegment fieldsJeff Fan
Using CodeSegment and DataSegment fields in ExchangeInfo instead of the hardcode MACROs for x64 arch. Switch AP from real mode to long mode directly, so needn't the CS/DS of protected mode. Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Giri Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> (cherry picked from commit d1471c011277829cf04a3078fa1931c104c22afa)
2016-07-14UefiCpuPkg/CpuMpPei/X64: Remove hard code CPU BIST valueJeff Fan
Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Giri Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> (cherry picked from commit 249ed12ea0c4bb0a9eefee6f48cecc330ff6af6a)
2016-07-14UefiCpuPkg/CpuMpPei/Ia32: Use CodeSegment and DataSegment fieldsJeff Fan
Using CodeSegment and DataSegment fields in ExchangeInfo instead of the hardcode MACROs. Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Giri Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> (cherry picked from commit aad5ee4899c43665a19ec8934e51dc6a34186389)
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-09 00:43:06 +0000