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2015-06-03ShellPkg: Add pipe support for parse commandTapan Shah
parse reads data from StdIn when pipe is used and does not require –sfo output stored in a file. (e.g.: fs0:\> ls *.nsh –sfo | parse FileInfo 2) Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Tapan Shah <tapandshah@hp.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17555 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-03ArmVirtPkg: increase memory preallocations to reduce region countArd Biesheuvel
This updates the sizes of the preallocated regions so that the number of distinct regions that exists is minimal at the time we exit boot services. For a typical run of the ArmVirtQemu platform, we get the following utilization numbers: Reserved : 4 Pages (16,384 Bytes) LoaderCode: 210 Pages (860,160 Bytes) LoaderData: 0 Pages (0 Bytes) BS_Code : 355 Pages (1,454,080 Bytes) BS_Data : 6,807 Pages (27,881,472 Bytes) RT_Code : 112 Pages (458,752 Bytes) RT_Data : 288 Pages (1,179,648 Bytes) ACPI_Recl : 32 Pages (131,072 Bytes) ACPI_NVS : 0 Pages (0 Bytes) MMIO : 16,385 Pages (67,112,960 Bytes) MMIO_Port : 0 Pages (0 Bytes) PalCode : 0 Pages (0 Bytes) Available : 123,264 Pages (504,889,344 Bytes) -------------- Total Memory: 511 MB (536,854,528 Bytes) Strangely enough, the allocation count of 20,000 pages for BS_Data does not result in those regions being merged. For BS_Code, RT_Code and RT_Data, the increased preallocation results in the following reduction in the number of regions. 0x000040000000-0x00004000ffff [Loader Data | | | | | |WB|WT|WC|UC] - 0x000040010000-0x0000b66bbfff [Conventional Memory| | | | | |WB|WT|WC|UC] - 0x0000b66bc000-0x0000b66d0fff [Loader Data | | | | | |WB|WT|WC|UC] - 0x0000b66d1000-0x0000b6f6bfff [Loader Code | | | | | |WB|WT|WC|UC] - 0x0000b6f6c000-0x0000b6f6ffff [Reserved | | | | | |WB|WT|WC|UC]* - 0x0000b6f70000-0x0000b6f8ffff [Runtime Code |RUN| | | | |WB|WT|WC|UC]* - 0x0000b6f90000-0x0000b6faffff [ACPI Reclaim Memory| | | | | |WB|WT|WC|UC]* - 0x0000b6fb0000-0x0000b6fcffff [Runtime Code |RUN| | | | |WB|WT|WC|UC]* - 0x0000b6fd0000-0x0000b701ffff [Runtime Data |RUN| | | | |WB|WT|WC|UC]* - 0x0000b7020000-0x0000b702ffff [Runtime Code |RUN| | | | |WB|WT|WC|UC]* - 0x0000b7030000-0x0000b70cffff [Runtime Data |RUN| | | | |WB|WT|WC|UC]* - 0x0000b70d0000-0x0000b70dffff [Runtime Code |RUN| | | | |WB|WT|WC|UC]* + 0x000040010000-0x0000b680bfff [Conventional Memory| | | | | |WB|WT|WC|UC] + 0x0000b680c000-0x0000b6820fff [Loader Data | | | | | |WB|WT|WC|UC] + 0x0000b6821000-0x0000b70bbfff [Loader Code | | | | | |WB|WT|WC|UC] + 0x0000b70bc000-0x0000b70bffff [Reserved | | | | | |WB|WT|WC|UC]* + 0x0000b70c0000-0x0000b70dffff [ACPI Reclaim Memory| | | | | |WB|WT|WC|UC]* 0x0000b70e0000-0x0000b9f87fff [Conventional Memory| | | | | |WB|WT|WC|UC] 0x0000b9f88000-0x0000bb921fff [Boot Data | | | | | |WB|WT|WC|UC] 0x0000bb922000-0x0000bb9bffff [Conventional Memory| | | | | |WB|WT|WC|UC] 0x0000bb9c0000-0x0000bbbb0fff [Boot Data | | | | | |WB|WT|WC|UC] 0x0000bbbb1000-0x0000bbbeffff [Conventional Memory| | | | | |WB|WT|WC|UC] 0x0000bbbf0000-0x0000bbf1ffff [Boot Data | | | | | |WB|WT|WC|UC] - 0x0000bbf20000-0x0000bedfffff [Conventional Memory| | | | | |WB|WT|WC|UC] - 0x0000bee00000-0x0000bf71ffff [Loader Data | | | | | |WB|WT|WC|UC] - 0x0000bf720000-0x0000bf7ccfff [Conventional Memory| | | | | |WB|WT|WC|UC] - 0x0000bf7cd000-0x0000bf92ffff [Boot Code | | | | | |WB|WT|WC|UC] - 0x0000bf930000-0x0000bf93ffff [Runtime Code |RUN| | | | |WB|WT|WC|UC]* - 0x0000bf940000-0x0000bf95ffff [Conventional Memory| | | | | |WB|WT|WC|UC] - 0x0000bf960000-0x0000bf97ffff [Runtime Data |RUN| | | | |WB|WT|WC|UC]* + 0x0000bbf20000-0x0000bebfffff [Conventional Memory| | | | | |WB|WT|WC|UC] + 0x0000bec00000-0x0000bf51ffff [Loader Data | | | | | |WB|WT|WC|UC] + 0x0000bf520000-0x0000bf65cfff [Conventional Memory| | | | | |WB|WT|WC|UC] + 0x0000bf65d000-0x0000bf7bffff [Boot Code | | | | | |WB|WT|WC|UC] + 0x0000bf7c0000-0x0000bf84ffff [Runtime Code |RUN| | | | |WB|WT|WC|UC]* + 0x0000bf850000-0x0000bf86ffff [Conventional Memory| | | | | |WB|WT|WC|UC] + 0x0000bf870000-0x0000bf97ffff [Runtime Data |RUN| | | | |WB|WT|WC|UC]* 0x0000bf980000-0x0000bf997fff [Conventional Memory| | | | | |WB|WT|WC|UC] 0x0000bf998000-0x0000bf99afff [Boot Data | | | | | |WB|WT|WC|UC] 0x0000bf99b000-0x0000bf9aefff [Conventional Memory| | | | | |WB|WT|WC|UC] Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17554 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-03IntelFspPkg: correct comments and rename a labelGuo Dong
Corrects a word typo and a comment error. Rename a label to match its function name. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Yao Jiewen <Jiewen.Yao@intel.com> Reviewed-by: Haojian Zhuang <haojian.zhuang@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17553 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-03MdeModulePkg/AtaAtapiPassThru: ensure PRDT of IDE is in 64K boundaryFeng Tian
Follow IDE BUS Master spec to ensure the PRDT table not cross 64k boundary in memory. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17552 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-03CorebootModulePkg/CbSupportPei: Relace tabs with whitespacesMaurice Ma
Replace tabs with whitespaces and remove the trailing whitespaces at the end of lines to conform to the coding style. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17551 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-03CorebootModulePkg/CbSupportPei: Mask off all legacy 8259 interrupt sourcesMaurice Ma
The current coreboot UEFI payload has an assumption that all interrupt sources should be masked off before transferring control to the payload. However, it is not the case on some platforms, such as QEMU. It will cause boot failure due to unexpected pending interrupt in the payload. To resolve it all legacy 8259 interrupt sources need to be masked piror to the DXE phase. The fix was tested on QEMU virtual platform. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17550 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-02IntelFspPkg/GenCfgOpt tool add embed structure.Ma, Maurice
The EMBED command allows you to put one or more UPD data into a specify data structure. You can utilize it as a group of UPD for example. You must specify a start and an end for the specify data structure. Example: !HDR EMBED:{MY_DATA_STRUCT:MyDataStructure:START} gTokenSpaceGuid.Upd1 | 0x0020 | 0x01 | 0x00 gTokenSpaceGuid.Upd2 | 0x0021 | 0x01 | 0x00 !HDR EMBED:{MY_DATA_STRUCT:MyDataStructure:END} gTokenSpaceGuid.UpdN | 0x0022 | 0x01 | 0x00 Result: typedef struct { /** Offset 0x0020 **/ UINT8 Upd1; /** Offset 0x0021 **/ UINT8 Upd2; /** Offset 0x0022 **/ UINT8 UpdN; } MY_DATA_STRUCT; typedef struct _UPD_DATA_REGION { … /** Offset 0x0020 **/ MY_DATA_STRUCT MyDataStruct; … } UPD_DATA_REGION; Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Ma, Maurice" <maurice.ma@intel.com> Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com> Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com> Reviewed-by: "Yao, Jiewen" <Jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17549 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-02MdeModulepkg DxeSmmPerformanceLib: Dump all PEI/DXE/SMM performance data.Star Zeng
For boot performance dump, as current behavior. It depends on which PerformanceLib instance the DP application linked to. For example, if DxePerfrmanceLib(MdeModulePkg\Library\DxePerformanceLib) got linked, it will try to dump PEI and DXE performance data; and if DxeSmmPerfrmanceLib(MdeModulePkg\Library\DxeSmmPerformanceLib) got linked, then SMM performance data are expected. It has burden and confusion to developers about the DP application need to be linked to different PerformanceLib instance in *.dsc and rebuilt for the performance data dump. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17548 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-02MdeModulePkg: Provide EfiBootManagerRegisterBootDescriptionHandlerRuiyu Ni
This API can be used for platform to customize the boot description other than using core provided boot description. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17547 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-02Add Sample I2C Library for Baytrail I2C Controller.David Wei
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: David Wei <david.wei@intel.com> Reviewed-by: Tim He <time.he@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17546 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-01BaseTools/Conf: Don't support upper case nasm extensionsJordan Justen
For *.asm and *.s, there have been cases of *.Asm and *.S files, but since the nasm extensions are new, we don't need to support the upper case extensions. In other words, remove .Nasm and .NASM. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17544 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-01MdeModulePkg DxeCore: Add debug message to assist TPL related issues.Star Zeng
The debug message is to print the current TPL and requested TPL value. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17543 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-31MdeModulePkg: Move ACPI default PCDs to support PCD dynamic.Star Zeng
Move ACPI default PCDs gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision from [PcdsFixedAtBuild, PcdsPatchableInModule] to [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx] to cover some platforms want to update them at boot time. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17542 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-29Maintainers.txt: Added Leif Lindholm as a co-maintainerOlivier Martin
Leif becomes a co-maintainer for the ARM Packages. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17541 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-29EmbeddedPkg/AcpiLib: Introduced LocateAndInstallAcpiFromFvConditional()Olivier Martin
This new helper function allows to install ACPI Table on condition. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <Olivier.Martin@arm.com> Reviewed-by: Ronald Cron <Ronald.Cron@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17540 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-29ArmPkg/BdsLib: Fixed TFTP when there are directories in the nameOlivier Martin
The TFTP Device Path might contain a list of File Path device path nodes. ConvertDevicePathToText() allows to concatenate these File Path nodes. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <Olivier.Martin@arm.com> Reviewed-by: Ronald Cron <Ronald.Cron@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17539 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-29Maintainers.txt: Assigned new maintainers for ArmVirtPkgOlivier Martin
Added Laszlo Ersek and Ard Biesheuvel as maintainers for ArmVirtPkg. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17538 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-29Renamed ArmPlatformPkg/ArmVirtualizationPkg into ArmVirtPkgOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17537 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-29MdeModulePkg/UfsPciHcDxe: Fix EBC build errorFeng Tian
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17536 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-29MdeModulePkg/DxeCore: Fixed build error.Star Zeng
ARM toolchain raises the build error: "enumerated type mixed with another type". To fix the issue, typecase can be used like below. - return EfiMaxMemoryType + 1; + return (EFI_MEMORY_TYPE)(EfiMaxMemoryType + 1); But to eliminate the confusion, update the return type of GetProfileMemoryIndex() from EFI_MEMORY_TYPE to UINTN. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17535 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-28ShellPkg: Update help output for correct alphabetical Jaben Carsey
This updates help output to put dynamic commands in correct alphabetical location mixed into the other commands. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Qiu Shumin <shumin.qiu@intel.com> Reviewed-by: Tapan Shah <tapandshah@hp.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17534 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-28MdeModulePkg/Ufs: Refine EDKII_UFS_HOST_CONTROLLER_PROTOCOL interfaceFeng Tian
The EDKII_UFS_HOST_CONTROLLER_PROTOCOL is refined to provide interfaces accessing UFS host controller MMIO register. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17533 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-28MdeModulePkg/PciBusDxe: Remove unused variable assignmentOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17532 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-28Add HII string definition for DTS.Shifei Lu
Add string ” DTS” and help info string” Enabled/Disable Digital Thermal Sensor”. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Shifei Lu <shifeix.a.lu@intel.com> Reviewed-by: David Wei <david.wei@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17531 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-28MdeModulePkg/HiiDatabaseDxe: Fixed build error.Olivier Martin
ARM toolchain raises the error: "statement is unreachable" Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <Olivier.Martin@arm.com> Reviewed-by: Eric Dong <eric.dong@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17529 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-27ArmPlatformPkg/ArmJunoDxe: Fixed PCI Root bridge device pathOlivier Martin
The PCI Root bridge is defined by PciRoot(0x0)/Pci(0x0,0x0). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <Olivier.Martin@arm.com> Reviewed-by: Ronald Cron <Ronald.Cron@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17528 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-27EmbeddedPkg: Fix Ebl dumpgcd bug with memory type and IO typeHeyi Guo
1. Data type for GcdMemoryType and GcdIoType is enumeration type rather than bit field, so we need to use strict equation "==" instead of bit-and "&"; 2. Testing for GcdIoType should use EfiGcdIoType*** constants rather than EfiGcdMemoryType***; 3. As we are going to use strict equation, it is clearer to use switch-case than if-else. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Olivier Martin <Olivier.Martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17527 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-27ArmPkg: Expand AArch64 address width to 48 bitsHeyi Guo
The VA address space has a maximum address width of 48 bits in AArch64 state; 48 bits address width limit will provide better compatibility than 40 bits for future CPU. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Olivier Martin <Olivier.Martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17526 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-27EmbeddedPkg/FdtPlatformDxe: Add FdtLib to the required librariesOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <Olivier.Martin@arm.com> Reviewed-by: Ronald Cron <Ronald.Cron@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17525 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-27ArmPlatformPkg/ArmJunoPkg/Madt.aslc: Added GIC MSI Frame TableOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <Olivier.Martin@arm.com> Reviewed-by: Ronald Cron <Ronald.Cron@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17524 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-27EmbeddedPkg/AcpiLib.h: Introduced EFI_ACPI_6_0_GIC_MSI_FRAME_INIT()Olivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <Olivier.Martin@arm.com> Reviewed-by: Ronald Cron <Ronald.Cron@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17523 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-27ArmPlatformPkg/ArmJunoPkg: ACPI PCI SupportOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <Olivier.Martin@arm.com> Reviewed-by: Ronald Cron <Ronald.Cron@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17522 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-27Enable Digital Thermal Sensor to detect processor temperature.Shifei Lu
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Shifei Lu <shifeix.a.lu@intel.com> Reviewed-by: David Wei <david.wei@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17521 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-27CorebootModulePkg: Fix GCC build failure.Guo Dong
This patch fixed a GCC build failure issue. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17519 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-27MdePkg: Add EFI EAP Configuration Protocol definitionsHao Wu
Add UEFI2.5 EFI EAP Configuration Protocol definitions. MdePkg/Include/Protocol/Eap.h is also modified for backward compatibility. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Ye Ting <ting.ye@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17518 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-27MdePkg: Add EFI EAP Management2 Protocol definitionsHao Wu
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17517 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-27MdeModulePkg: Enable reconnect request from action request or question flag.Eric Dong
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17516 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-27MdePkg: Add reconnect definition in action request type and question attribute.Eric Dong
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17515 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-27BaseTools: Add reconnect request flag for question.Eric Dong
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17514 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-27MdeModulePkg: Fix PciBus hang issueRuiyu Ni
LocatePciExpressCapabilityRegBlock () doesn't check the return status of Pci.Read(). Certain platform's PciRootBridge.Pci.Read() doesn't support PCIE access causing the CapabilityEntry not updated. If the uninitialized CapabilityEntry equals to a big enough initial value, the while-loop will never end. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17513 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-26MdeModulePkg:fix browser not call EFI_BROWSER_ACTION_CHANGEDDandan Bi
fix bellow bug: change checkbox from FALSE to TRUE.EFI_BROWSER_ACTION_CHANGED called but when checkbox change back to FALSE,don't call EFI_BROWSER_ACTION_CHANGED Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17512 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-26MdeModulePkg:Support delete keyDandan Bi
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17511 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-26BaseTools: Add default BuildRuleOrder in tools_def.templateYingke Liu
*_*_*_*_BUILDRULEORDER = nasm Nasm NASM asm Asm ASM S s *_XCODE32_*_*_BUILDRULEORDER = S s nasm Nasm NASM *_XCLANG_*_*_BUILDRULEORDER = S s nasm Nasm NASM *_XCODE5_*_*_BUILDRULEORDER = S s nasm Nasm NASM Tool Chain in Mac Os will use S as the first priority. Other tool chains use nasm as the first priority. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Yingke Liu <yingke.d.liu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17510 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-26BaseTools: Implement BUILDRULEORDER for tools_defYingke Liu
This feature allows the toolchain to choose a preference for source file extensions in tools_def.txt. The first extension is given the highest priority. Here is an example usage for tools_def.txt: *_*_*_*_BUILDRULEORDER = nasm Nasm NASM asm Asm ASM S s *_XCODE5_*_*_BUILDRULEORDER = S s nasm Nasm NASM Now, if a .inf lists these sources: 1.nasm, 1.asm and 1.S All toolchains, except XCODE5 will use the 1.nasm file. The XCODE5 toolchain will use the 1.S file. Note that the build_rule.txt file also impacts the decision, because, for instance there is no build rule for .asm files on GCC toolchains. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Yingke Liu <yingke.d.liu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17509 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-26* MdePkg: Move SIO header files to correct location.Ruiyu Ni
The patch also fixed some comments to align the code. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17507 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-26MdeModulePkg: Move IsaBusDxe driver to MdeModulePkg.Ruiyu Ni
A previous incorrect check-in adds the IsaBusDxe driver to <Root>/Bus directory. The patch fixes it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17506 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-26MdePkg: Move SIO header files to MdePkg.Ruiyu Ni
A previous incorrect check-in adds the SIO header files to <Root>/Include directory. The patch fixes it. The patch also adds the missing PeiServices pointer to the SIO PPI interfaces. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17505 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-26MdeModulePkg: Add IsaBusDxe driverRuiyu Ni
This driver follows UEFI driver model and layers on ISA HC protocol defined in PI spec 1.2.1. It consumes the ISA Host Controller protocol produced by the ISA Host Controller and installs the ISA Host Controller Service Binding protocol on the ISA Host Controller's handle. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17504 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-26MdePkg: Add SIO related protocol/PPI definitions.Ruiyu Ni
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17503 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-25IntelFrameworkModulePkg: Rollback this change because display engine use ↵Eric Dong
class/subclass. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17502 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-08 12:45:39 +0000