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2017-11-30Platform/ARM: move to new TFTP Shell command implementationArd Biesheuvel
Upstream EDK2 has refactored the implementation of the TFTP Shell command so update the ARM platforms accordingly. Instead of having to add the new module to all .FDF files under Platform/ARM, add it to the 'networking FDF' include file and include that everywhere. Also, add a build time option to omit the TFTP command. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Joakim Bech <joakim.bech@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-30Platform/Hisilicon: drop BdsLib inclusion from HiKey .dscLeif Lindholm
The ArmPkg BdsLib has been dropped from EDK2, and is no longer required by the Android*Boot applications - so delete the reference to fix the resulting build failure. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2017-11-30Silicon/AMD Silicon/Hisilicon: remove ArmGetCpuCountPerCluster()Ard Biesheuvel
The function ArmGetCpuCountPerCluster () was moved out of ArmPlatformLib because it was unused (except internally by one of the implementations) So remove the remaining implementations from edk2-platforms. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-26Platform/ARM/TC2: move to private FdtPlatformDxe implementationArd Biesheuvel
Move to our own private copy of FdtPlatformDxe and BdsLib so that we can get rid of the upstream version. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-26Platform/ARM/Juno: move to migrated FdtPlatformDxeArd Biesheuvel
Move Juno to the migrated version of FdtPlatformDxe. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-26Platform/ARM: import FdtPlatformDxe driver from EDK2Ard Biesheuvel
Import FdtPlatformDxe from EmbeddedPkg into Platform/ARM, given that it is not used anywhere else, nor should it be. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-26Platform/ARM: import BdsLib from ArmPkgArd Biesheuvel
We are about to migrate the only remaining user of the deprecated ARM BdsLib, i.e., FdtPlatformDxe, into Platform/ARM. So create our own copy of BdsLib, allowing us to finally remove it from upstream EDK2. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-26Platform: switch to new PL011UartLibArd Biesheuvel
Switch to the new version of PL011UartLib which supersedes the one residing in Drivers/ inappropriately. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-26Platform: remove stale EBL related PCD settingsArd Biesheuvel
Remove all gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt assignments, which are no longer meaningful with EBL removed. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-26Platform: remove stale PL35xSmcLib referencesArd Biesheuvel
No drivers actually use PL35xSmcLib so remove any resolutions for it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-26Platform: remove references to EBL librariesArd Biesheuvel
None of these platforms still include EBL, but some references remained to its support libraries. Get rid of that. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-26Platform/Hisilicon: remove SP804 PCD definitionsArd Biesheuvel
These platforms don't actually include the SP804 driver so no need to set the PCDs. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-26Platform/ARM: remove outdated SP804 TimerLib referenceArd Biesheuvel
ArmVExpress.dsc.inc declares a TimerLib dependency and resolves it using ArmPlatformPkg/Library/SP804TimerLib/SP804TimerLib.inf, but all users of the include file supersede it with ArmArchTimerLib.inf so let's just use that instead. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-26Platform/ARM/Juno: import ArmJunoPkg from EDK2Ard Biesheuvel
Move ArmJunoPkg into edk2-platforms, so it can be removed from the main EDK2 tree. This allows use to remove the dodgy -I arguments to GCC to build shared modules with a different copy of ArmPlatform.h, which was making it very difficult to properly split the various modules into their own packages. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-26Platform/Hisilicon: remove bogus VExpress dependenciesArd Biesheuvel
Remove false copy-pasted dependencies on various VExpress support libraries. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-26Platform/ArmVExpress-FVP: remove bogus ArmPlatformSecLib referenceArd Biesheuvel
No FVP driver uses this library so remove the resolution. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-26Platform: remove bogus ArmTrustedMonitorLib referencesArd Biesheuvel
Remove copy-pasted ArmTrustedMonitorLib library class resolutions that none of the platforms actually need. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-26Platform: remove bogus ArmPlatformSecExtraActionLib referencesArd Biesheuvel
Remove copy-pasted ArmPlatformSecExtraActionLib library class resolutions that none of the platforms actually need. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-25Platform/DeveloperBox: wire up RTC supportArd Biesheuvel
Add the drivers, library resolutions and PCD settings to enable RTC support on DeveloperBox. Also, update PlatformDxe to register the non-discoverable device handles for both I2C controllers. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-25Silicon/NXP: add RTC support library for PCF8563 I2C IPArd Biesheuvel
Add a RealTimeClockLib implementation for the NXP PCF8563 as used on the Socionext Developer Box board. Note that the standard I2C protocol stack does not support runtime use, so this driver invokes the I2C master protocol directly. This requires support from the platform side as well, and so this driver will only attach to a I2C master that has the gPcf8563RealTimeClockLibI2cMasterProtolGuid protocol installed on its handle. It is up to the platform to ensure that the driver producing the I2C master protocol in question is runtime capable, and is not shared with the I2C protocol stack (i.e., it should not have the I2C Bus Configuration Management protocol installed as well). Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-25Silicon/Socionext: implement I2C master protocol for SynQuacer I2CArd Biesheuvel
Add a driver that produces the I2C master protocol on top of the I2C controllers that are implemented in the SynQuacer Socionext SoC. Note that this supports two modes simultaneously: I2C controllers that are only usable at boot time, and usable via the I2C protocol stack, and I2C controllers that are dedicated for the RTC or other runtime components. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-25Silicon/SynQuacer: add DT description of the SDHCI controllerArd Biesheuvel
Describe the SynQuacer SoC's eMMC controller in DT so the OS can attach to it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-25Silicon/SynQuacer: implement 'clear NVRAM' feature using a DIP switchArd Biesheuvel
Ordinary computers typically have a physical switch or jumper on the board that allows non-volatile settings to be cleared. Let's implement the same using DIP switch #1 on block #3, and clear the EFI variable store if it is set to ON at boot time. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17Silicon/SynQuacer: implement PEIM that exposes GPIO PPIArd Biesheuvel
In order to be able to sample the state of the DIP switches at early boot on the Developer Box platform, implement the GPIO PPI based on the GPIO block that is implemented in the SynQuacer SoC. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17Silicon/SynQuacerMemoryInitPeiLib: ignore capsules when clearing NVRAMArd Biesheuvel
In preparation of adding support for setting a DIP switch to clear the EFI variable store, update the early capsule handling logic to take the boot mode into account. This is necessary for two reasons: - we override the boot mode when a capsule is detected, - the capsule detection itself involves reading a EFI variable, which we shouldn't be doing if the varstore may be in a bad state. So factor out the initial capsule check (to keep the code understandable) and only perform it if we are not booting in 'clear NVRAM' mode. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17Platform/DeveloperBox: add description of power button to DTArd Biesheuvel
Add the power button as a gpio-keys KEY_POWER button, and mark it as a wakeup source so it can be used under the OS both as a 'sleep' and as a 'wake' button. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2017-11-17Silicon/SynQuacer: add description of EXIU to the device treeArd Biesheuvel
Add a DT node for the external interrupt unit (EXIU), which handles interrupts from GPIO lines. We need OS support for this for things like PHY interrupts and a 'wake' button. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17Silicon/SynQuacer: add description of GPIO block to device treeArd Biesheuvel
Add a description of the SoCs GPIO controller as well as a description of DIP switch block #3, which is wired to GPIOs 0 - 7, both on the evaluation board as well as the Developer Box. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17Platform/DeveloperBox: add ConsolePrefDxe driverArd Biesheuvel
In order to improve the 'out of the box' experience when booting this system with a monitor and keyboard attached, include the serial console preference driver that prevents the installer GUI to only appear on the serial port in this case. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17Platform/Socionext: add support for Socionext Developer Box rev 0.1Ard Biesheuvel
This adds support for the first working sample of the MZSC2AM board, revision 0.1 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17Silicon/SynQuacerPciHostBridgeLib: add workaround to support 32-bit only cardsArd Biesheuvel
Implement workaround suggested by Socionext to get legacy endpoints with 32-bit BARs working. This fixes the issue on Developer Box with the onboard ASM1061 SATA controller. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17Platform/SynQuacerEvalBoard: add signed capsule update supportArd Biesheuvel
Add all the boilerplate to make the SPI NOR image updateable using signed capsules and the FMP protocol. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17Socionext/SynQuacerEvalBoard: switch to execute in placeArd Biesheuvel
Now that we switched to PrePeiCore, we can execute the firmware image in place, using a stack and temporary heap in non-secure SRAM. This allows us to query the secure firmware for the size and placement of DRAM, and also allows the use of capsules for firmware update. NOTE: this requires ARM Trusted Firmware to be built with PRELOADED_BL33_BASE set to the base of UEFI in the NOR flash, 0x820_0000 in our case. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17Socionext/SynQuacerEvalBoard: wire up basic capsule supportArd Biesheuvel
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17SynQuacer/SynQuacerMemoryInitPeiLib: add capsule supportArd Biesheuvel
Add support for dealing with capsules left in memory by the OS before reboot. This needs to be done early, before the memory is reused, which is why the initial handling must reside here. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17Silicon/SynQuacer: implement PlatformFlashAccessLibArd Biesheuvel
In order to support capsule update, implement PlatformFlashAccessLib that exposes write access to the UEFI NOR partition. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17Platform/SynQuacer: incorporate NOR flash and variable driversArd Biesheuvel
Wire up the non-volatile EFI variable store support, by switching from the emulation driver to the real one, and enabling the prerequisite FTW and NOR flash drivers. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17Silicon/Socionext: add driver for SPI NOR flashPipat Methavanitpong
This imports the driver sources provided by Socionext for the FIP006 SPI NOR flash device found on SynQuacer SoCs. It has been slightly tweaked to bring it up to date with the changes made on the EDK2 side since it was forked. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Pipat Methavanitpong <methavanitpong.pipat@socionext.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17Silicon/SynQuacer: add NorFlashPlatformLib implementationArd Biesheuvel
Add the platform glue for the NOR flash driver. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17Silicon/SynQuacer: add device tree support for eval boardArd Biesheuvel
Add a device tree description of the SynQuacer SoC, and expose it for the SynQuacerEvalBoard platforms. This includes the menu option in the UEFI boot menu to switch between ACPI and DT. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17Platform/SynQuacerEvalBoard: add NETSEC driverArd Biesheuvel
Add the NETSEC driver to the SynQuacerEvalBoard platform. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17Platform/SynQuacerEvalBoard: add PCI supportArd Biesheuvel
Wire up the various drivers and libraries for the SynQuacerEvalBoard platform. Also enable the usual PCI suspects: XHCI, SATA and NVME, and the various bus, partition and file system drivers that we need to make use of PCIe devices. Given how PCI support enables USB support too, and taking the lack of a RNG on this SoC into account, let's enable the ChaosKey driver as well. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17Silicon/SynQuacer: implement EFI_CPU_IO2_PROTOCOLArd Biesheuvel
The SynQuacer SOC has two separate PCIe RCs, which means there is no single value for the translation offset between I/O port accesses and MMIO accesses. So add a special implementation of EFI_CPU_IO2_PROTOCOL that takes the two disjoint I/O windows into account. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17Silicon/SynQuacer: implement PciHostBridgeLib supportArd Biesheuvel
Implement the glue library that exposes the PCIe root complexes to the generic PCI host bridge driver. Since that driver is the first one to access the PCI config space, put the low level init code for the RCs into this library's constructor. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17Silicon/SynQuacer: implement PciSegmentLib to support dual RCsArd Biesheuvel
Having two distinct root complexes is not supported by the standard set of PciLib/PciExpressLib/PciSegmentLib, so let's reimplement one of the latter specifically for this platform (and forget about the others). This also allows us to implement the Synopsys Designware PCIe specific workaround for PCI config space accesses to devices 1 and up on bus 0. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17Platform: add support for Socionext SynQuacer eval boardArd Biesheuvel
This is a barebones port based on the .DSC/.FDF and ArmPlatformLib code provided by Socionext. It can boot into the UiApp menu screen or the UEFI Shell, but lacks support for any peripherals. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-16Silicon/SynQuacer: add MemoryInitPeiLib implementationArd Biesheuvel
Implement MemoryInitPeiLib based on the newly added DramInfo PPI, which retrieves the DRAM information from lower level firmware. Note that the firmware volumes in SPI NOR are mapped with different attributes: the FV containing the PEI modules that may execute in place is mapped as uncached memory, given that it requires executable permissions. The FV containing the compressed DXE modules is mapped with device attributes for performance (!), and copied into DRAM by the platform PEIM once permanent memory is installed. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-16Silicon/SynQuacer: implement a platform DXE driverArd Biesheuvel
This implements a driver that will take care of platform specific initialization, such as declaring non-discoverable devices, and installing the device tree blob as a configuration table. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-16Silicon/Socionext: add PlatformPeilib implementation for SynQuacerArd Biesheuvel
Create a specialized PlatformPeiLib implementation that invokes the platform specific firmware interface (currently, just a data structure left in SRAM) to set the ARM standard PcdSystemMemoryBase|Size PCDs, and expose the information via a newly added DramInfo PPI. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-16Silicon/Socionext: add driver for NETSEC network controllerArd Biesheuvel
This adds the NetSecDxe driver provided by Socionext, but reworked extensively to improve compliance with the SimpleNetworkProtocol API, and to avoid uncached allocations for streaming DMA. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>