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2016-09-08ArmPkg ArmPlatformPkg ArmVirtPkg: ARM GICv2/v3 Base Address width fix-upDennis Chen
According to the ACPI 6.0/6.1 spec, the physical base address of GICC, GICD, GICR and GIC ITS is 64-bit. So change the type of the various GIC base address PCDs to 64-bit, and fix up all users. Contributed-under: TianoCore Contribution Agreement 1.0 Cc: Leif Lindholm <leif.lindholm@linaro.org> Signed-off-by: Dennis Chen <dennis.chen@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2016-07-07ArmPkg: introduce ArmMmuLib library classArd Biesheuvel
Introduce the library class ArmMmuLib, which encapsulates the functionality to set up and modify page table entries. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-04-29ArmPlatformPkg: move PCI related PCD definitions to ArmPkgArd Biesheuvel
The PCI related PCDs are not platform specific, and architectural protocols such as CpuIo2 are based on PCI provided MMIO to IO translation, so these PCDs belong in ArmPkg not ArmPlatformPkg. NOTE: this *WILL* break some out-of-tree platforms, the fix is changing all consumers of gArmPlatformTokenSpaceGuid.PcdPci* to gArmTokenSpaceGuid.PcdPci* Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-03-25ArmPkg|EmbeddedPkg: make PcdCpuVectorBaseAddress 64 bits wideLeendert van Doorn
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leo Duran <leo.duran@amd.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2015-11-18ArmPkg/ArmV7Mmu: introduce feature PCD to map normal memory non-shareableArd Biesheuvel
Even though mapping normal memory (inner) shareable is usually the correct choice on coherent systems, it may be desirable in some cases to use non-shareable mappings for normal memory, e.g., when hardware managed coherency is not required and the memory system is not fully configured yet. So introduce a PCD PcdNormalMemoryNonshareableOverride that makes cacheable mappings of normal memory non-shareable. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18897 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-28ArmPkg: split off ArmGicArchLib from ArmGicLibArd Biesheuvel
The current implementation of ArmGicGetSupportedArchRevision () that is used by all ARM platforms is entirely stateless (in order to support being executed from flash) so it needs to interrogate the hardware for the supported GIC revision upon each invocation. However, this statelessness is only needed for SEC type modules; in all other cases, we could easily determine the GIC revision once, and store the result in a global variable. In preparation of having separate early and normal versions, this patch introduces the ArmGicArchLib library class and default implementation, and moves the existing ArmGicGetSupportedArchRevision () into it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18098 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-14ArmPkg: Remove PCD declarations linked to the ARM BDS Linux LoaderOlivier Martin
The Linux Loader has been removed from ARM BDS. These PCDs are not needed anymore. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <Olivier.Martin@arm.com> Reviewed-by: Ronald Cron <Ronald.Cron@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17973 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-14ArmPkg: remove cache maintenance by VA operation range size thresholdArd Biesheuvel
This removes the range size threshold for virtual address based cache maintenance instructions that operate on VA ranges to be 'promoted' to use set/way instructions. Doing so is unsafe: set/way operations are fundamentally different from VA operations, and really only suitable for cleaning or invalidating a cache when turning it on or off. To quote the ARM ARM (DDI0487A_d G3.4): """ Since the set/way instructions are performed only locally, there is no guarantee of the atomicity of cache maintenance between different PEs, even if those different PEs are each performing the same cache maintenance instructions at the same time. Since any cacheable line can be allocated into the cache at any time, it is possible for [a] cache line to migrate from an entry in the cache of one PE to the cache of a different PE in a manner that the cache line avoids being affected by set/way based cache maintenance. Therefore, ARM strongly discourages the use of set/way instructions to manage coherency in coherent systems. """ Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Olivier Martin <Olivier.Martin@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17176 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-28ArmPkg: allow patchable PCDs for memory, FD and FV addressesArd Biesheuvel
In order to allow a runtime self relocating PrePi instance, change the allowable PCD types for the following PCDs: gArmTokenSpaceGuid.PcdSystemMemoryBase gArmTokenSpaceGuid.PcdSystemMemorySize gArmTokenSpaceGuid.PcdFdBaseAddress gArmTokenSpaceGuid.PcdFvBaseAddress to include PcdsPatchableInModule. This makes the build system correctly distinguish fixed PCDs from PCDs whose value may be different from the assigned value at compile time. Note that this only affects platforms that explicitly mark these PCDs as PatchableInModule in the DSC. All existing platforms that use FixedPcd will not be affected by this change. Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16954 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-16ArmPkg/ArmGic: enable ARE bit before driving GICv3 in native modeArd Biesheuvel
The GICv3 driver must use native mode to drive a GICv3 due to the fact that v2 compatibility is optional in the v3 spec. However, if v2 compatibility is implemented, it is the default and needs to be disabled first by setting the Affinity Routing Enable (ARE) bit. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Olivier Martin <olivier.martin@arm.com> [added PCD that allows forcing the GICv3 driver to drive the GIC in v2 mode] Signed-off-by: Olivier Martin <olivier.martin@arm.com> Tested-by: Ard Biesheuvel <ard@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16875 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-16ArmPkg/ArmGic: Added GICv3 specific definitionsOlivier Martin
ARM GICv3 specification introduces some new components and registers. This patch adds their definitions. The most important GICv3 component is the GIC Redistributor. It supports LPIs (Locality-specific peripheral Interrupt), 8+ CPU configuration. Some GIC distributor registers have moved to the GIC redistributor. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> Tested-by: Ard Biesheuvel <ard@linaro.org> Reviewed-by: Ard Biesheuvel <ard@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16872 6f19259b-4bc3-4df7-8a09-765794883524
2014-12-12ArmPlatformPkg/ArmJunoPkg: Move the watchdog generic driver to ArmPkg/DriversRonald Cron
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <Ronald.Cron@arm.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16512 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-11ArmPlatformPkg: Increase more ARM address Pcd entries to 64-bit.Leif Lindholm
Some AArch64 platforms have RAM and flash devices >4GB. Update some additional Pcd entries to 64-bit, and change the corresponding PcdGet32 calls to PcdGet64. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16325 6f19259b-4bc3-4df7-8a09-765794883524
2014-10-10ArmPkg/UncachedMemoryAllocationLib: Track uncached memory allocationsOlivier Martin
Keeping track of uncached memory allocations prevents doing expensive cache operations (eg: clean & invalidate) on newly allocated regions by reusing regions where possible Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16205 6f19259b-4bc3-4df7-8a09-765794883524
2014-10-10ArmPkg/ArmPsciResetSystemLib: Made the library only using SMCOlivier Martin
Only ArmVirtualizationPkg based platforms are expected to use the dynamic method to choose between SMC and HVC to invoke PSCI. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16204 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-10ArmPkg: Introduced ArmPsciResetSystemLibArd Biesheuvel
This implementation of EfiResetSystemLib uses ARM PSCI calls to perform reboot and poweroff, using either HVC or SMC calls. Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16089 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09ArmPkg,ArmPlatformPkg: Allow dynamic PCDs for memory base and sizeArd Biesheuvel
This changes the definition and a bunch of references to gArmTokenSpaceGuid.PcdSystemMemoryBase and gArmTokenSpaceGuid.PcdSystemMemorySize so they can be declared as dynamic PCDs by the platform. Also, move the non-SEC call to ArmPlatformInitializeSystemMemory() earlier, so a platform has a chance to set these PCDs before they are first referenced. The purpose is allowing dynamically instantiated virtual machines to declare the system memory by passing a device tree. Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16079 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09ArmPkg: allow dynamic GIC base addressesArd Biesheuvel
Allow the PCDs gArmTokenSpaceGuid.PcdGicDistributorBase and gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase to be redeclared as PcdsDynamic by the platform, so virtual machines can set these properties during boot. As the PcdGet32() calls now call into the PCD database, cache the values that are required during the handling of interrupts. Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16072 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09ArmPkg: allow dynamically discovered timer interruptsArd Biesheuvel
To support booting on virtual machines whose interrupt routing is discovered from the device tree, allow the interrupt numbers to be redeclared as PcdsDynamic by the platform .dsc Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16071 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29ArmPkg/ArmPkg.dec: Added the interrupt numbers for the Hypervisor and ↵Olivier Martin
Virtual Timers These numbers are mainly to reduce hardcoded numbers into the ACPI GTDT table. And also to match with the use of PcdArmArchTimerSecIntrNum and PcdArmArchTimerIntrNum into the GTDT ACPI Table. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15707 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-15ArmPkg/BdsLib: Removed PSCI discoverability from the Linux loaderOlivier Martin
Some platforms might decide to not support PSCI in their FDT-aware Linux system even if their firmware supports it. It is the responsibility of the platform engineer to provide the appropriate FDT. The PCD gArmTokenSpaceGuid.PcdArmPsciSupport is not required anymore. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15658 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-19ArmPkg/BdsLib: Added support for TFTP servers without 'tsize' extensionOlivier Martin
Some TFTP servers do not have 'tsize' extension. This change allows to download files from TFTP servers that do not have this extension by trying to download the file into a pre-allocated buffer. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15539 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-24ArmPkg: Fix typo in comment and trailing spacesOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15378 6f19259b-4bc3-4df7-8a09-765794883524
2014-01-10ArmPkg/ArmPkg.dec: Redefined PcdSystemMemory(Base|Size) as UINT64Olivier Martin
The System Memory region might be out of the 32-bit memory space. This change has been validated on the FVP AArch64 model using 4GB of DRAM at 0x8_0000_0000: - # System Memory (2GB) - gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000 - gArmTokenSpaceGuid.PcdSystemMemorySize|0x80000000 + # System Memory (4GB) + gArmTokenSpaceGuid.PcdSystemMemoryBase|0x800000000 + gArmTokenSpaceGuid.PcdSystemMemorySize|0x100000000 EFI Shell and Linux kernel boot successfully. Note: This change has not been validated on AArch32. I expect some early assembly code to not work. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15093 6f19259b-4bc3-4df7-8a09-765794883524
2013-10-29ARM Packages: Renamed PL390Gic driver into ArmGic driverOlivier Martin
The aim is to make this driver follows the ARM GIC specifications and be implementation independent. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14810 6f19259b-4bc3-4df7-8a09-765794883524
2013-08-21ArmPlatformPkg/Sec: Remove SCR and CPTR initialization from SetupExceptionLevel3Olivier Martin
This is already taken care by Sec when PcdTrustzoneSupport = TRUE. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14580 6f19259b-4bc3-4df7-8a09-765794883524
2013-08-06ARM: Remove NSACR from the common codeOlivier Martin
NSACR (Non-Secure Access Control Register) is AArch32 specific. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14522 6f19259b-4bc3-4df7-8a09-765794883524
2013-07-18ArmPkg/BdsLib: Added Aarch64 support for booting LinuxHarry Liebel
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14487 6f19259b-4bc3-4df7-8a09-765794883524
2013-07-18ArmPkg: Added Aarch64 supportHarry Liebel
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14486 6f19259b-4bc3-4df7-8a09-765794883524
2013-07-17ArmPkg: Removed the non-used PCD PcdGicPrimaryCoreIdOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14480 6f19259b-4bc3-4df7-8a09-765794883524
2013-06-19ArmPkg: Moved PcdArmLinuxAtagMaxOffset to be ARM specificOlivier Martin
ATAG is specific to 32bit ARM architecture. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14435 6f19259b-4bc3-4df7-8a09-765794883524
2013-04-14ArmPkg/BdsLib: Added support for FDT alignment through PcdArmLinuxFdtAlignmentoliviermartin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14274 6f19259b-4bc3-4df7-8a09-765794883524
2013-04-14ArmPkg: Delete PCD value PcdArmLinuxKernelFixedOffset.oliviermartin
PcdArmLinuxKernelFixedOffset is supposed to indicate the offset from the beginning of the system memory at which the kernel will be loaded. However, this PCD value is not used at all. Instead the kernel is loaded just below a certain limit indicated by PCD value PcdArmLinuxKernelMaxOffset. This patch deletes PCD value PcdArmLinuxKernelFixedOffset to avoid any confusion. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14273 6f19259b-4bc3-4df7-8a09-765794883524
2013-03-12ArmPkg/BdsLib: Added support to declare Power State Coordination Interface ↵oliviermartin
(PSCI) to the Flat Device Tree (FDT) Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14185 6f19259b-4bc3-4df7-8a09-765794883524
2012-09-28ArmPkg/BdsLib: Added FDT support for BdsLiboliviermartin
Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13768 6f19259b-4bc3-4df7-8a09-765794883524
2012-09-27ARM Packages: Minor typo, mispellings and coding style changesoliviermartin
Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13752 6f19259b-4bc3-4df7-8a09-765794883524
2012-07-04ArmPkg/ArmPkg.dec: Removed duplicated PCD declarationsoliviermartin
Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13491 6f19259b-4bc3-4df7-8a09-765794883524
2012-05-02ArmPkg/ArmGicLib: Replaced 'ArmGicAcknowledgeSgiFrom' by ↵oliviermartin
'ArmGicAcknowledgeInterrupt' The function 'ArmGicAcknowledgeSgiFrom' was actually acknowledging Interrupts (and not only SGIs). ArmPkg/ArmGicLib: Introduced the PCD PcdGicPrimaryCoreId This PCD defines the Id of the primary core in the GIC. Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13259 6f19259b-4bc3-4df7-8a09-765794883524
2012-05-02ArmPkg: Replaced gArmTokenSpaceGuid.PcdGicNumInterrupts by ↵oliviermartin
ArmGicGetMaxNumInterrupts() The maximum number of interrupts can be retrieve through the GIC distributor. Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13244 6f19259b-4bc3-4df7-8a09-765794883524
2012-03-26ArmPkg: Declared ARM Hypervisor Firmware PCDsoliviermartin
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13131 6f19259b-4bc3-4df7-8a09-765794883524
2012-03-26ArmPkg/PL390Gic: Introduced PcdGicSgiIntId to define which SGI is used for ↵oliviermartin
core synchronisation By default this PCD is set to use SGI #0. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13123 6f19259b-4bc3-4df7-8a09-765794883524
2012-02-14ArmPkg: Changed ARM CPU SetMemoryAttributes to always use strongly ordered ↵oliviermartin
for the EFI_MEMORY_UC attribute Changed ARM CPU SetMemoryAttributes to always use strongly ordered for the EFI_MEMORY_UC attribute. Signed-off-by: Reviewed-by: eugenecohen Reviewed-by: yanivtal git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13011 6f19259b-4bc3-4df7-8a09-765794883524
2011-11-01ArmPlatformPkg/Sec: Replaced hardcode SCR and NSACR values by PCDs to enable ↵oliviermartin
CPU and Platform Specific settings git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12637 6f19259b-4bc3-4df7-8a09-765794883524
2011-09-27ArmPkg: Add ARM Architectural Timer supportoliviermartin
ARM Architectural Timer support is defined by the ARM Generic Timer Specification. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12455 6f19259b-4bc3-4df7-8a09-765794883524
2011-09-27ArmPlatformPkg: Replaced 'ArmPlatformTrustzoneSupported' by the fixed Pcd ↵oliviermartin
gArmTokenSpaceGuid.PcdTrustzoneSupport This change does not make possible to disable Trustzone from the firmware. The firmware has to be built for Trustzone support enabled or disabled. The memory page table are now defined as 'Normal Memory' in any case. Except for RTSM Device Memory which as to be Secure Device Memory due to a RTSM bug. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12452 6f19259b-4bc3-4df7-8a09-765794883524
2011-09-22ArmPkg: Removed deprecated 'ArmMPCoreMailBoxLib'oliviermartin
This library has been replaced by ArmMpCoreInfo PPI and HOBs. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12424 6f19259b-4bc3-4df7-8a09-765794883524
2011-09-22ArmPkg: Create MpCoreInfo PPI and HOB to describe CPU Cores on a MPCore platformoliviermartin
These info are: - ClusterId, CoreId - MailBox Set/Get/Clear address git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12423 6f19259b-4bc3-4df7-8a09-765794883524
2011-09-22ARM Packages: Rename PcdNormal* into Pcd* PCDsoliviermartin
The denomination 'Normal' was used to make reference to the 'Normal' or 'Non Secure' or 'Non Trusted' world. To avoid confusion, this prefix has been removed from PCDs to define the normal world. The PCDs explicitely related to the Secure/Trusted World continue to have the 'Sec' prefix. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12416 6f19259b-4bc3-4df7-8a09-765794883524
2011-09-22ArmPlatformPkg: Introduce Primary core macrosoliviermartin
On MpCore system, the primary core can now be any core of the system. To identify the primary core, you can use 'gArmTokenSpaceGuid.PcdArmPrimaryCoreMask' and 'gArmTokenSpaceGuid.PcdArmPrimaryCore'. These PCDs by default use the ClusterId and CoreId to identify the core. And the primary core is defined as the ClusetrId=0 and CoreId=0. The helper macros are: IS_PRIMARY_CORE(MpId), GET_CORE_ID(MpId), GET_CLUSTER_ID(MpId), GET_CORE_POS(MpId), PRIMARY_CORE_ID. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12412 6f19259b-4bc3-4df7-8a09-765794883524
2011-09-22Arm Packages: Fixed coding style/Line endings to follow EDK2 coding conventionoliviermartin
Arm Packages: Fixed mispelling Arm Packages: Reduced warnings all over the code git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12407 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-19 14:05:24 +0000