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2015-08-19ArmPkg: remove ARMv6 support codeArd Biesheuvel
No platforms use the ARMv6 (ARM11) support code anymore. In fact, the only reference to it in ArmPkg.dsc was commented out by Andrew in SVN r11298 (2011-02-03) so it may well be broken. So remove it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18237 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-28ArmPkg: split off ArmGicArchLib from ArmGicLibArd Biesheuvel
The current implementation of ArmGicGetSupportedArchRevision () that is used by all ARM platforms is entirely stateless (in order to support being executed from flash) so it needs to interrogate the hardware for the supported GIC revision upon each invocation. However, this statelessness is only needed for SEC type modules; in all other cases, we could easily determine the GIC revision once, and store the result in a global variable. In preparation of having separate early and normal versions, this patch introduces the ArmGicArchLib library class and default implementation, and moves the existing ArmGicGetSupportedArchRevision () into it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18098 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-28ArmPkg: merge ArmGicV[23]Lib.h into ArmGicLib.hArd Biesheuvel
Before splitting off ArmGicArchLib and moving it out of ArmPkg/Drivers/ArmGic into ArmPkg/Library, make sure that the GIC specific declarations it depends on are not hidden away in local headers "GicV2/GicV2Lib.h" and "GicV3/GicV3Lib.h". So merge them with <Library/ArmGicLib.h>. This is entirely appropriate, since this is not a header that declares a public interface into ArmGicLib, but defines implementation internals. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18097 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-14ArmPkg/BdsLib: Remove Linux loader from BdsLibOlivier Martin
This change removes the embedded Linux Loder from BdsLib. BdsLib becomes OS agnostic. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <Olivier.Martin@arm.com> Reviewed-by: Ronald Cron <Ronald.Cron@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17969 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-14ArmPkg/BdsLib: Replaced BdsLoadApplication() by LocateEfiApplicationInFv()Olivier Martin
Replaced the function BdsLoadApplication() by two explicit functions that load the EFI application either by its GUID or its Name. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <Olivier.Martin@arm.com> Reviewed-by: Ronald Cron <Ronald.Cron@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17966 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-27ArmPkg: Expand AArch64 address width to 48 bitsHeyi Guo
The VA address space has a maximum address width of 48 bits in AArch64 state; 48 bits address width limit will provide better compatibility than 40 bits for future CPU. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Olivier Martin <Olivier.Martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17526 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-11ArmPkg: update BdsLib to updated definition of EFI_LOAD_OPTIONArd Biesheuvel
Since there is now a formal definition of EFI_LOAD_OPTION, we can no longer typedef it as a UINT8*. So update the code to use the common definition, which is not a pointer type, hence the additional changes to the C code. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Ronald Cron <Ronald.Cron@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17410 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-05ArmPkg/BdsLib: Exposed ShutdownUefiBootServices() in the BdsLib interfaceOlivier Martin
Other libraries/modules could use it (eg: EFI Shell command `runaxf`). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Ronald Cron <Ronald.Cron@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17297 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-26ArmPlatformPkg/Bds: Remove any use of the "Fdt" UEFI variableRonald Cron
Remove the option to update the "Fdt" UEFI variable in the ARM BDS as the "setfdt" EFI Shell command provides this service from now. Remove the use of this variable in the legacy kernel boot loader and use the FDT installed in the configuration table instead. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <Ronald.Cron@arm.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16940 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-26ArmPlatformPkg/ArmJunoDxe: Set the platform dependent FDT device pathRonald Cron
The MIDR register of the CPU on which the UEFI firmware is running on is used to infer if the platform is a Juno r0 or a Juno r1. The right device path to the platform FDT is then stored in the "gEmbeddedTokenSpaceGuid.PcdFdtDevicePaths" dynamic PCD. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <Ronald.Cron@arm.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16939 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-16ArmPkg/ArmGic: enable ARE bit before driving GICv3 in native modeArd Biesheuvel
The GICv3 driver must use native mode to drive a GICv3 due to the fact that v2 compatibility is optional in the v3 spec. However, if v2 compatibility is implemented, it is the default and needs to be disabled first by setting the Affinity Routing Enable (ARE) bit. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Olivier Martin <olivier.martin@arm.com> [added PCD that allows forcing the GICv3 driver to drive the GIC in v2 mode] Signed-off-by: Olivier Martin <olivier.martin@arm.com> Tested-by: Ard Biesheuvel <ard@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16875 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-16ArmPkg/ArmGic: Use the GIC Redistributor instead of GIC Distributor for GICv3Olivier Martin
GICv3 controller with no GICv2 legacy support must use the GIC Redistributor registers instead of the GIC Distributor registers for some operations (eg: enable/disable interrupts). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> Tested-by: Ard Biesheuvel <ard@linaro.org> Reviewed-by: Ard Biesheuvel <ard@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16874 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-16ArmPkg/ArmGic: Added GICv3 specific definitionsOlivier Martin
ARM GICv3 specification introduces some new components and registers. This patch adds their definitions. The most important GICv3 component is the GIC Redistributor. It supports LPIs (Locality-specific peripheral Interrupt), 8+ CPU configuration. Some GIC distributor registers have moved to the GIC redistributor. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> Tested-by: Ard Biesheuvel <ard@linaro.org> Reviewed-by: Ard Biesheuvel <ard@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16872 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-16ArmPkg/ArmLib.h: Add CPU Affinity definitionsOlivier Martin
The CPU affinity fields are defined by MPIDR/MPIDR_EL1. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> Tested-by: Ard Biesheuvel <ard@linaro.org> Reviewed-by: Ard Biesheuvel <ard@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16871 6f19259b-4bc3-4df7-8a09-765794883524
2014-12-12ArmPkg/AsmMacroIoLib: Fixed the global variables initializationOlivier Martin
The top of the stack always points to 'stack_base + stack_size'. But the stack pointer is decremented before writing to the stack. It means the top byte of the stack is actually 'stack_base + stack_size - 1'. The initialization should also decrement the stack pointer before zero'ing the memory (pre-indexed addressing). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16518 6f19259b-4bc3-4df7-8a09-765794883524
2014-10-27ArmPkg/ArmLib: Removed duplicated invalidate TLB functionOlivier Martin
ArmInvalidateInstructionAndDataTlb() was doing the same thing as ArmInvalidateTlb(). Both invalidate Data and Instruction TLBs. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16253 6f19259b-4bc3-4df7-8a09-765794883524
2014-10-27ArmPkg/SemihostLib: Add library functionsRonald Cron
Add library functions to rename a file and get a temporary name for a file through the semi-hosting interface. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <ronald.cron@arm.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16238 6f19259b-4bc3-4df7-8a09-765794883524
2014-10-27ArmPkg/Semihostlib: Rename semi-hosting open optionRonald Cron
Change mnemonic SEMIHOST_FILE_MODE_CREATE with mnemonic SEMIHOST_FILE_MODE_UPDATE. The bit referred to by this mnemonic is for the semi-hosting open mode code the equivalent of the + in the ISO C fopen mode terminology. This allows to select the so called update mode for which both read and write are allowed on the open file. The mnemonic SEMIHOST_FILE_MODE_UPDATE is more in line with the ISO C fopen mode terminology. A description of the ISO C fopen modes can be found here : http://pubs.opengroup.org/onlinepubs/009695399/functions/fopen.html. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <ronald.cron@arm.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16237 6f19259b-4bc3-4df7-8a09-765794883524
2014-10-27ArmPkg/ArmGic: Added GicV3 support to ArmGicDxeOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16234 6f19259b-4bc3-4df7-8a09-765794883524
2014-10-27ArmPkg/ArmGic: Added GicV3 detectionOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16232 6f19259b-4bc3-4df7-8a09-765794883524
2014-10-27ArmPkg/ArmGic: Introduced ArmGicGetSupportedArchRevision()Olivier Martin
This function returns the revision of the GIC Architecture. Some GICv3 controllers can work in GICv2 mode. Switching to an older GIC revision is driven by the higher level exception level. This function allows code to support any GIC revision at runtime. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16231 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-10ArmPkg: Add ArmHvcLibArd Biesheuvel
This is a utility library closely modeled after ArmSmcLib, that allows hypervisor call (HVC) instructions to be issued from C code. Change-Id: I5f5c65f83e910ff98dbb2f5b031dad8c4f663daa Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16088 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-10ArmPkg: Add PSCI 0.2 constants for system poweroff and resetArd Biesheuvel
Change-Id: I683a603300812578c15cf3c1e0ccb7574fdb5caf Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16087 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09ArmPkg: Move TimerDxe and ArmArchTimerLib to new ArmGenericTimerCounterLibArd Biesheuvel
Move TimerDxe and ArmArchTimerLib to ArmGenericTimerCounterLib, and update all platforms to select the physical counter instance they have been using implicitly all along. Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16078 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09ArmPkg: add ArmGenericTimerCounterLib interfaceArd Biesheuvel
This introduces ArmGenericTimerCounterLib by adding the include file ArmPkg/Include/Library/ArmGenericTimerCounterLib.h. Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16074 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09ArmPkg: Renamed ArmArchTimerLib.h to ArmArchTimer.hArd Biesheuvel
The ArmArchTimerLib.h include file is not directly related to the TimerLib instance ArmArchTimerLib, so the name is confusing. Rename to ArmArchTimer.h instead. Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16073 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-26ARM Packages: Replace tabs by spaces for indentationRonald Cron
Replace tabs by spaces for indentation to comply to EDK2 coding standards. Done in files with extension ".S", ".c", ".h", ".asm", ".dsc", ".inc", "*.inf", "*.dec" or ".fdf" and located in ArmPkg, ArmPlatformPkg, EmbeddedPkg, BeagleBoardPkg or Omap35xxPkg. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <ronald.cron@arm.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15901 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-19ARM Packages: Removed trailing spacesRonald Cron
Trailing spaces create issue/warning when generating/applying patches. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <ronald.cron@arm.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15833 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-04ArmPkg/ArmSmcLib: Fixed SMC helper functionsOlivier Martin
The SMC helper functions were buggy as they were assuming that the values in x1-x7 registers were preserved across an SMC call, which is not the case. This patch fixes this issue. It also simplifies the code by providing only 1 version of the SMC helper function. We used to have 4 versions depending on the number of arguments. The problem with this approach was that the number of arguments also dictated the number of return values, which is completely unrelated. E.g. you can have an SMC call that takes 1 argument but returns 4 values. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15748 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-04ArmPkg/IndustryStandard/ArmStdSmc.h: Update Standard Service SMC CallsOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15747 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29ArmPkg/ArmLib.h: Fixed name of the argumentOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15711 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29ArmPkg/AArch64.h: Added Exception Syndrome Register definitionsOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15709 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29ArmPkg/AArch64: Added ARM_HCR_TSC definitionOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15708 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29ArmPkg/AArch64.h: Added SPSR and Timer register definitionsOlivier Martin
These timer register definitions are AArch64 specific. It is the reason why they are into this file and not into Chipset/ArmArchTimer.h. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15706 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-15ArmPkg/ArmLib.h: Removed GET_CORE_POS macroRonald Cron
The platform independant GET_CORE_POS has been replaced by the platform dependent function ArmPlatformGetCorePosition(). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <ronald.cron@arm.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15661 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04ArmPkg/ArmGic: Returned the InterruptId in ArmGicAcknowledgeInterrupt()Olivier Martin
The InterruptId has a different width for GicV2 and GicV3 (respectively 10bit and 24bit). The function prototype has been changed to return this value to make the caller GIC architecture version independent. Otherwise, we would have need to expose a different mask to allow the caller to retrieve this value from the read register. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15628 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04ArmPkg/ArmGic: Introduced support for GicV2 to ArmGicLibOlivier Martin
The support for GIcV2 was already existing. This change separate the GicV2 specific functions from the common Gic code (in preparation for GicV3 support). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15626 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04ArmPkg/ArmGic: Introduced helper functions to access the GIC controllerOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15621 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04ArmPkg/ArmGic: Move out the EndOfInterrupt from the interrupt acknowledgementOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15619 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04ArmPkg/Drivers/ArmGic: Introduced ArmGicEndOfInterrupt()Olivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15618 6f19259b-4bc3-4df7-8a09-765794883524
2014-06-03ArmPkg/AsmMacroIoLib: Add support for ARM Compiler 6.00Olivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15554 6f19259b-4bc3-4df7-8a09-765794883524
2014-06-03ArmPkg: Added new ARM Processor Feature Register definitionsOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15552 6f19259b-4bc3-4df7-8a09-765794883524
2014-04-02ArmPkg: Fixed GetEnvironmentVariable() when the UEFI Variable did not existOlivier Martin
The function was allocating a buffer for the read value from the UEFI Variable. But it was returning the pointer of the default value when the variable was not present. It could cause error when the default value and the returned value were free when these addresses were the same (double FreePool on the same address). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15427 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-26ArmPkg/ArmCortexA5x: Declared the helper functions to access the CPU ↵Olivier Martin
Extended Control Register This register is A5x specific. It is the reason why the code moved from ArmLib to ArmCpuLib/ArmCortexA5xLib. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15397 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-26ArmPkg/ArmLib: Added helper functions for accessing CPU ACTLROlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15396 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-26ArmPkg/Chipset: Added ARMv8 CPU's PartNumOlivier Martin
PartNum is the field of MIDR that returns the CPU name. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15395 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-24ArmPkg/ArmLib: Renamed Cp15CacheInfo into ArmCacheInfoOlivier Martin
CTR (Cache Type Register) has the same format on ARMv7 and AArch64. Renaming Cp15CacheInfo() into ArmCacheInfo() makes this function architecture independent. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15381 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-24ArmPkg/ArmLib: Removed unused ArmSwitchProcessorMode & ArmProcessorMode ↵Olivier Martin
functions Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15380 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-01ArmPkg/ArmLib: Rationalise ArmReadMidr and cognate functions.Olivier Martin
The function ArmReadMidr has been recently added, but that functionality was already present under other names such as Cp15IdCode and ArmMainIdCode. This change removes redundant code and moves the function to the Common library. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15276 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-01ArmPkg: Replace single dead loop.Olivier Martin
Several assembler macros use a loop at the label "dead" to trap an error. This is difficult to debug as there is no indication of how one arrived at the loop. This change replaces dead with distinct loops locally in the macro, which means the cause of the hang is detectable to the debugger. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15273 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-02 12:46:24 +0000