Age | Commit message (Collapse) | Author |
|
This removes the range size threshold for virtual address based cache
maintenance instructions that operate on VA ranges to be 'promoted' to
use set/way instructions.
Doing so is unsafe: set/way operations are fundamentally different
from VA operations, and really only suitable for cleaning or invalidating
a cache when turning it on or off.
To quote the ARM ARM (DDI0487A_d G3.4):
"""
Since the set/way instructions are performed only locally, there is no
guarantee of the atomicity of cache maintenance between different PEs,
even if those different PEs are each performing the same cache maintenance
instructions at the same time. Since any cacheable line can be allocated
into the cache at any time, it is possible for [a] cache line to migrate
from an entry in the cache of one PE to the cache of a different PE in a
manner that the cache line avoids being affected by set/way based cache
maintenance. Therefore, ARM strongly discourages the use of set/way
instructions to manage coherency in coherent systems.
"""
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Olivier Martin <Olivier.Martin@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17176 6f19259b-4bc3-4df7-8a09-765794883524
|
|
Trailing spaces create issue/warning when generating/applying patches.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15833 6f19259b-4bc3-4df7-8a09-765794883524
|
|
CTR (Cache Type Register) has the same format on ARMv7 and AArch64.
Renaming Cp15CacheInfo() into ArmCacheInfo() makes this function
architecture independent.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15381 6f19259b-4bc3-4df7-8a09-765794883524
|
|
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14445 6f19259b-4bc3-4df7-8a09-765794883524
|
|
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14180 6f19259b-4bc3-4df7-8a09-765794883524
|
|
This large code change only modifies the line endings to be CRLF to be
compliant with the EDK2 coding convention document.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14088 6f19259b-4bc3-4df7-8a09-765794883524
|
|
The 'NS' bit must only be set in Secure world to define the Non-Secure region
of the Non-Secure World.
This bit must not be set in Non-Secure World.
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13252 6f19259b-4bc3-4df7-8a09-765794883524
|
|
aligned
The current code does not support memory region size that is not
aligned on TT_DESCRIPTOR_SECTION_SIZE boundary.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11490 6f19259b-4bc3-4df7-8a09-765794883524
|
|
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11297 6f19259b-4bc3-4df7-8a09-765794883524
|
|
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11295 6f19259b-4bc3-4df7-8a09-765794883524
|
|
BdsUnixLib.h and fixed a lot of issues with Xcode building.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11293 6f19259b-4bc3-4df7-8a09-765794883524
|
|
half of check-in 11167.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11169 6f19259b-4bc3-4df7-8a09-765794883524
|
|
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10444 6f19259b-4bc3-4df7-8a09-765794883524
|
|
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10087 6f19259b-4bc3-4df7-8a09-765794883524
|
|
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10064 6f19259b-4bc3-4df7-8a09-765794883524
|
|
Data/Instruction syncronization barrier support to the ARM lib.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10063 6f19259b-4bc3-4df7-8a09-765794883524
|
|
CpuDxe driver (still working on that). Also looks like some of the .INF file hade the token used to search replace the copyright headers and not the headers so I updated that.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9716 6f19259b-4bc3-4df7-8a09-765794883524
|
|
ArmPkg - Supoprt for ARM specific things that can change as the architecture changes. Plus semihosting JTAG drivers.
EmbeddedPkg - Generic support for an embeddded platform. Including a light weight command line shell.
BeagleBoardPkg - Platform specifics for BeagleBoard. SD Card works, but USB has issues. Looks like a bug in the open source USB stack (Our internal stack works fine).
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9518 6f19259b-4bc3-4df7-8a09-765794883524
|