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2015-05-05ArmPkg/BdsLib: Exposed ShutdownUefiBootServices() in the BdsLib interfaceOlivier Martin
Other libraries/modules could use it (eg: EFI Shell command `runaxf`). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Ronald Cron <Ronald.Cron@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17297 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-14ArmPkg: remove cache maintenance by VA operation range size thresholdArd Biesheuvel
This removes the range size threshold for virtual address based cache maintenance instructions that operate on VA ranges to be 'promoted' to use set/way instructions. Doing so is unsafe: set/way operations are fundamentally different from VA operations, and really only suitable for cleaning or invalidating a cache when turning it on or off. To quote the ARM ARM (DDI0487A_d G3.4): """ Since the set/way instructions are performed only locally, there is no guarantee of the atomicity of cache maintenance between different PEs, even if those different PEs are each performing the same cache maintenance instructions at the same time. Since any cacheable line can be allocated into the cache at any time, it is possible for [a] cache line to migrate from an entry in the cache of one PE to the cache of a different PE in a manner that the cache line avoids being affected by set/way based cache maintenance. Therefore, ARM strongly discourages the use of set/way instructions to manage coherency in coherent systems. """ Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Olivier Martin <Olivier.Martin@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17176 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-02ArmPkg/BaseMemoryLib(Sym|Vstm): Do not post increment returned pointerOlivier Martin
InternalMemScanMem(8|16|32|64) was returning a pointer that was post incremented from the expected returned value. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Ronald Cron <ronald.cron@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17108 6f19259b-4bc3-4df7-8a09-765794883524
2015-03-02ArmPkg: DebugPeCoffExtraActionLib: debugger commands are not errorsLaszlo Ersek
PeCoffLoaderRelocateImageExtraAction() prints helpful debugger commands for source level debugging. These messages should not be printed on the EFI_D_ERROR level; they don't report errors. Change the debug level (bitmask, actually) to EFI_D_LOAD | EFI_D_INFO, because the messages are printed in relation to image loading, and they are informative. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16983 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-26ArmPlatformPkg/Bds: Remove any use of the "Fdt" UEFI variableRonald Cron
Remove the option to update the "Fdt" UEFI variable in the ARM BDS as the "setfdt" EFI Shell command provides this service from now. Remove the use of this variable in the legacy kernel boot loader and use the FDT installed in the configuration table instead. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <Ronald.Cron@arm.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16940 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-25ArmPkg/BdsLib: Added support to change the given DevicePath of a Boot EntryOlivier Martin
Some boot entries might not have a EFI Device Path FilePath attached to it (eg: EFI device Path for removable device path). This patch allows a support loader to edit the EFI Device Path and for instance add \EFI\BOOT\BOOT(ARM|AA64).EFI Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16930 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-02ArmPkg: ArmArchTimerLib: conditionally rebase to actual timer frequencyLaszlo Ersek
Allow a platform to set PcdArmArchTimerFreqInHz to zero, and consider it a request to use the actual timer frequency. No global variable is introduced, so that the library can be used in PEIMs that execute from flash. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <Olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16691 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-02ArmPkg: ArmArchTimerLib: use edk2-conformant (UINT64 * UINT32) / UINT32Laszlo Ersek
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <Olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16690 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-02ArmPkg: ArmArchTimerLib: clean up commentsLaszlo Ersek
In the next patch we'll slightly reorganize TimerConstructor(). Let's improve the comments first. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <Olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16689 6f19259b-4bc3-4df7-8a09-765794883524
2015-01-06ArmPkg/BdsLib: Close file after reading an ImageRonald Cron
When loading an image from a file, close the file after reading from it. Use OpenProtocol instead of HandleProtocol to retrieve the simple file system protocol interface. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <Ronald.Cron@arm.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16586 6f19259b-4bc3-4df7-8a09-765794883524
2015-01-06ArmPkg/BdsLib: Fix DHCP4 configurationRonald Cron
Fix DHCP4 configuration as part of TFTP boot process to get the IP address of the gateway and the subnet mask from the DHCP server. Fix a memory leak when the download from the TFTP server fails as well. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <Ronald.Cron@arm.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16582 6f19259b-4bc3-4df7-8a09-765794883524
2014-12-12ArmPkg/BdsLib: Update the size of the Device Tree before booting LinuxOlivier Martin
The memory reserved to load the device tree is over-allocated when UEFI loads the blob to update the device tree with additional information such as the command line, the initrd, etc. This change ensures the total size declared by the device tree matches the actual data (and not the over-allocated size value). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16517 6f19259b-4bc3-4df7-8a09-765794883524
2014-12-12ArmPkg/BdsLib: Rework TFTP bootRonald Cron
Rework the downloading of an image from a TFTP server to do not depend on any "PXE specific" setting of the DHCP server. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <Ronald.Cron@arm.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16516 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-11ArmPkg/ArmArchTimerLib: Promotes 32bit value to prevent overflowOlivier Martin
Both MicroSeconds and PcdArmArchTimerFreqInHz are 32-bit values on AArch32 so their multiplication produces 32-bit result that might cause wrong calculation. Example: With MicroSeconds = 200 us, PcdArmArchTimerFreqInHz = 24MHz. 200*24000000 = 0x1_1E1A_3000 => So 0x1E1A_3000 when the type is UINT32. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16329 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-11ArmPkg/CompilerIntrinsicesLib: Fixed memmove() and memset()Olivier Martin
- Fixed memmove when going backward: the copy started one byte after the end of the region to copy - memset: - removed unused register - fixed arguments size and character arguments were actually reversed - Added memmove() to ARM32 GCC Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16328 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-11ArmPkg: Ensured the stack is always quad-word alignedOlivier Martin
From the AArch64 Procedure Call Standard (ARM IHI 0055B): 5.2.2.1 Universal stack constraints At all times the following basic constraints must hold: - SP mod 16 = 0. The stack must be quad-word aligned. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16327 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-11ArmPlatformPkg: Increase more ARM address Pcd entries to 64-bit.Leif Lindholm
Some AArch64 platforms have RAM and flash devices >4GB. Update some additional Pcd entries to 64-bit, and change the corresponding PcdGet32 calls to PcdGet64. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16325 6f19259b-4bc3-4df7-8a09-765794883524
2014-10-27ArmPkg/ArmLib: Removed duplicated invalidate TLB functionOlivier Martin
ArmInvalidateInstructionAndDataTlb() was doing the same thing as ArmInvalidateTlb(). Both invalidate Data and Instruction TLBs. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16253 6f19259b-4bc3-4df7-8a09-765794883524
2014-10-27ArmPkg/SemihostLib: Add library functionsRonald Cron
Add library functions to rename a file and get a temporary name for a file through the semi-hosting interface. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <ronald.cron@arm.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16238 6f19259b-4bc3-4df7-8a09-765794883524
2014-10-27ArmPkg/Semihostlib: Rename semi-hosting open optionRonald Cron
Change mnemonic SEMIHOST_FILE_MODE_CREATE with mnemonic SEMIHOST_FILE_MODE_UPDATE. The bit referred to by this mnemonic is for the semi-hosting open mode code the equivalent of the + in the ISO C fopen mode terminology. This allows to select the so called update mode for which both read and write are allowed on the open file. The mnemonic SEMIHOST_FILE_MODE_UPDATE is more in line with the ISO C fopen mode terminology. A description of the ISO C fopen modes can be found here : http://pubs.opengroup.org/onlinepubs/009695399/functions/fopen.html. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <ronald.cron@arm.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16237 6f19259b-4bc3-4df7-8a09-765794883524
2014-10-10ArmPkg/ArmLib/AArch64: Initialize the new N+1-level page table before ↵Olivier Martin
registering it Prior to this change, when a new page table was created at level N+1, the reference to the table was added to the level N translation table, before being initialized. It means if virtual addresses were in the address range defined by this new table the CPU would crash as the address range was not initialized. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16206 6f19259b-4bc3-4df7-8a09-765794883524
2014-10-10ArmPkg/UncachedMemoryAllocationLib: Track uncached memory allocationsOlivier Martin
Keeping track of uncached memory allocations prevents doing expensive cache operations (eg: clean & invalidate) on newly allocated regions by reusing regions where possible Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16205 6f19259b-4bc3-4df7-8a09-765794883524
2014-10-10ArmPkg/ArmPsciResetSystemLib: Made the library only using SMCOlivier Martin
Only ArmVirtualizationPkg based platforms are expected to use the dynamic method to choose between SMC and HVC to invoke PSCI. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16204 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-16ArmPsciResetSystemLib: read PSCI method in constructorArd Biesheuvel
As this library is used in the implementation of a Runtime Service, make sure to access dynamic PCDs only in the constructor. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16108 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-10ArmPkg: Introduced ArmPsciResetSystemLibArd Biesheuvel
This implementation of EfiResetSystemLib uses ARM PSCI calls to perform reboot and poweroff, using either HVC or SMC calls. Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16089 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-10ArmPkg: Add ArmHvcLibArd Biesheuvel
This is a utility library closely modeled after ArmSmcLib, that allows hypervisor call (HVC) instructions to be issued from C code. Change-Id: I5f5c65f83e910ff98dbb2f5b031dad8c4f663daa Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16088 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-10ArmPkg/ArmSmcLib: fix stack handling in .asm version of SMC wrapperArd Biesheuvel
This fixes a bug in the stack handling in the RVCT .asm version of the SMC wrapper. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16086 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09ArmPkg,ArmPlatformPkg: Allow dynamic PCDs for memory base and sizeArd Biesheuvel
This changes the definition and a bunch of references to gArmTokenSpaceGuid.PcdSystemMemoryBase and gArmTokenSpaceGuid.PcdSystemMemorySize so they can be declared as dynamic PCDs by the platform. Also, move the non-SEC call to ArmPlatformInitializeSystemMemory() earlier, so a platform has a chance to set these PCDs before they are first referenced. The purpose is allowing dynamically instantiated virtual machines to declare the system memory by passing a device tree. Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16079 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09ArmPkg: Move TimerDxe and ArmArchTimerLib to new ArmGenericTimerCounterLibArd Biesheuvel
Move TimerDxe and ArmArchTimerLib to ArmGenericTimerCounterLib, and update all platforms to select the physical counter instance they have been using implicitly all along. Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16078 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09ArmPkg: add ArmGenericTimerCounterLib implementation using virtual timerArd Biesheuvel
This adds an implementation of ArmGenericTimerCounterLib using the virtual architected generic timer. Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16076 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09ArmPkg: add ArmGenericTimerCounterLib implementation using physical timerArd Biesheuvel
This adds an implementation of ArmGenericTimerCounterLib using the physical architected generic timer. Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16075 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09ArmPkg: Renamed ArmArchTimerLib.h to ArmArchTimer.hArd Biesheuvel
The ArmArchTimerLib.h include file is not directly related to the TimerLib instance ArmArchTimerLib, so the name is confusing. Rename to ArmArchTimer.h instead. Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16073 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09ArmPkg: allow dynamic GIC base addressesArd Biesheuvel
Allow the PCDs gArmTokenSpaceGuid.PcdGicDistributorBase and gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase to be redeclared as PcdsDynamic by the platform, so virtual machines can set these properties during boot. As the PcdGet32() calls now call into the PCD database, cache the values that are required during the handling of interrupts. Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16072 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09ArmPkg/ArmDisassemblerLib: ARMThumb and AArch64 fixesHarry Liebel
- Fix ARM Thumb mask operator. This was flagged by a toolchain as warning "use of logical '&&' with constant operand [-Wconstant-logical-operand]" - AArch64 should not be building the ARM32 disassemblers. - Add a AArch64 build target. The disassembler is still to be implemented. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16069 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-01ArmPkg/BdsLib/Arm: Check Linux image and parameters are not overlappingOlivier Martin
Check Linux image and parameters are not overlapping with each other. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16013 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-01ArmPkg/BdsLib/Arm: Clean Data cache before disabling itOlivier Martin
It is actually the same sequence as AArch64. Without cleaning the data cache prior to disable the cache, the LR value pushed on the stack when entering in ArmCleanInvalidateDataCache() might have been overwritten by this specific cache line maintenance. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16012 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-27ArmPkg/TimerDxe: Changed calculation to allow 1KHz granularity frequencyOlivier Martin
Prior to this change the frequency was rounded to 1Mhz. This change rounds the timer frequency to 1KHz. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15921 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-26ArmPkg/ArmArchTimerLib: Remove non required [depex] and IoLibOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15903 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-26ARM Packages: Replace tabs by spaces for indentationRonald Cron
Replace tabs by spaces for indentation to comply to EDK2 coding standards. Done in files with extension ".S", ".c", ".h", ".asm", ".dsc", ".inc", "*.inf", "*.dec" or ".fdf" and located in ArmPkg, ArmPlatformPkg, EmbeddedPkg, BeagleBoardPkg or Omap35xxPkg. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <ronald.cron@arm.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15901 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-20ArmPkg/ArmLib/ArmV7: Fixed ArmIsMpCore()Olivier Martin
The function was not returning the expected value. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15850 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-19ArmPkg/ArmLib: Set again TCR after getting the Translation Table attributesOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15837 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-19ArmPkg/BdsLib: Prevent a hang in BdsConnectDevicePath() when a sub-device ↵Olivier Martin
path is not found Some device paths were making BdsConnectDevicePath() hang. To prevent these hangs we check if the handle returned by gBS->LocateDevicePath() is the same after each iteration. An example of a device path that hangs: PciRoot(0x0)/Pci(0x1,0x0)/USB(0x0,0x0)/USB(0x3,0x0)/HD(...) The connect controller function manages to find PciRoot()/Pci(0x1,0x0) but the USB driver does not produce USB(0x0,0x0)/USB(0x3,0x0) and returns EFI_SUCCESS on its initialization. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15835 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-19ARM Packages: Removed trailing spacesRonald Cron
Trailing spaces create issue/warning when generating/applying patches. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <ronald.cron@arm.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15833 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-19ARM Packages: Corrected non-DOS line endingsRonald Cron
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <ronald.cron@arm.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15832 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-04ArmPkg/ArmSmcLib: Fixed SMC helper functionsOlivier Martin
The SMC helper functions were buggy as they were assuming that the values in x1-x7 registers were preserved across an SMC call, which is not the case. This patch fixes this issue. It also simplifies the code by providing only 1 version of the SMC helper function. We used to have 4 versions depending on the number of arguments. The problem with this approach was that the number of arguments also dictated the number of return values, which is completely unrelated. E.g. you can have an SMC call that takes 1 argument but returns 4 values. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15748 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29ArmPkg: Remove BasePeCoffLibHarry Liebel
ArmPkg contains unused and outdated code for runtime PE/COFF image relocation. - Use the version in MdePkg instead. - Remove references to this package from BeagleBoardPkg. ArmPkg/BasePeCoffLib was added to deal with MOVT instruction that was not part of the PE/COFF specification at that time. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15712 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-15ARM Packages: Force the SEC modules to be 2K aligned for AArch64Olivier Martin
The AArch64 Vector Table must be aligned on a 2K boundary. The FDF specification does not support 2K alignment but support 4K. A clear comment has been added to help integrator to understand why the assertion fails when porting to a new AArch64 platform. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15659 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-15ArmPkg/BdsLib: Removed PSCI discoverability from the Linux loaderOlivier Martin
Some platforms might decide to not support PSCI in their FDT-aware Linux system even if their firmware supports it. It is the responsibility of the platform engineer to provide the appropriate FDT. The PCD gArmTokenSpaceGuid.PcdArmPsciSupport is not required anymore. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15658 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-09ArmPkg/ArmLib: Improved ArmConfigureMmu PerformanceEugene Cohen
Data & Instruction Caches can be kept enabled while the new translation table is filled. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eugene Cohen <eugene@hp.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15647 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-01ArmPkg/BdsLib: Prevent memory leak whith TFTPOlivier Martin
In some case, the size of the downloaded TFTP image cannot be known. An arbitrary larger buffer is allocated to receive the image. We need to make sure when we free the buffer we free the size of the allocated buffer and not the size of the actual image. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15609 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-28 05:51:55 +0000