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2014-09-10ArmPkg/TimerDxe: Read timer frequency from CPUArd Biesheuvel
The PCD gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz is used in the SEC phase (if applicable) to write the platform's counter frequency to the CNTFRQ system register, as this needs to be done by the highest exception level implemented. Under virtualization, we should be able to rely on the host to have initialized this register to a sane value, as we run at EL1 and only use the virtual timer, so the PcdArmArchTimerFreqInHz PCD has little meaning here. So in either case, by the time we enter the DXE phase, we can use the CNTFRQ system register to read the frequency instead of looking at the PCD. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16090 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-10ArmPkg: Introduced ArmPsciResetSystemLibArd Biesheuvel
This implementation of EfiResetSystemLib uses ARM PSCI calls to perform reboot and poweroff, using either HVC or SMC calls. Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16089 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-10ArmPkg: Add ArmHvcLibArd Biesheuvel
This is a utility library closely modeled after ArmSmcLib, that allows hypervisor call (HVC) instructions to be issued from C code. Change-Id: I5f5c65f83e910ff98dbb2f5b031dad8c4f663daa Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16088 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-10ArmPkg: Add PSCI 0.2 constants for system poweroff and resetArd Biesheuvel
Change-Id: I683a603300812578c15cf3c1e0ccb7574fdb5caf Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16087 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-10ArmPkg/ArmSmcLib: fix stack handling in .asm version of SMC wrapperArd Biesheuvel
This fixes a bug in the stack handling in the RVCT .asm version of the SMC wrapper. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16086 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09ArmPkg,ArmPlatformPkg: Allow dynamic PCDs for memory base and sizeArd Biesheuvel
This changes the definition and a bunch of references to gArmTokenSpaceGuid.PcdSystemMemoryBase and gArmTokenSpaceGuid.PcdSystemMemorySize so they can be declared as dynamic PCDs by the platform. Also, move the non-SEC call to ArmPlatformInitializeSystemMemory() earlier, so a platform has a chance to set these PCDs before they are first referenced. The purpose is allowing dynamically instantiated virtual machines to declare the system memory by passing a device tree. Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16079 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09ArmPkg: Move TimerDxe and ArmArchTimerLib to new ArmGenericTimerCounterLibArd Biesheuvel
Move TimerDxe and ArmArchTimerLib to ArmGenericTimerCounterLib, and update all platforms to select the physical counter instance they have been using implicitly all along. Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16078 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09ArmPkg/TimerDxe: Register the virt and hyp timer interrupts at init time.Ard Biesheuvel
Change-Id: I1162dc60140278c0b3da837bf325e3789ababf54 Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16077 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09ArmPkg: add ArmGenericTimerCounterLib implementation using virtual timerArd Biesheuvel
This adds an implementation of ArmGenericTimerCounterLib using the virtual architected generic timer. Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16076 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09ArmPkg: add ArmGenericTimerCounterLib implementation using physical timerArd Biesheuvel
This adds an implementation of ArmGenericTimerCounterLib using the physical architected generic timer. Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16075 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09ArmPkg: add ArmGenericTimerCounterLib interfaceArd Biesheuvel
This introduces ArmGenericTimerCounterLib by adding the include file ArmPkg/Include/Library/ArmGenericTimerCounterLib.h. Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16074 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09ArmPkg: Renamed ArmArchTimerLib.h to ArmArchTimer.hArd Biesheuvel
The ArmArchTimerLib.h include file is not directly related to the TimerLib instance ArmArchTimerLib, so the name is confusing. Rename to ArmArchTimer.h instead. Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16073 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09ArmPkg: allow dynamic GIC base addressesArd Biesheuvel
Allow the PCDs gArmTokenSpaceGuid.PcdGicDistributorBase and gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase to be redeclared as PcdsDynamic by the platform, so virtual machines can set these properties during boot. As the PcdGet32() calls now call into the PCD database, cache the values that are required during the handling of interrupts. Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16072 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09ArmPkg: allow dynamically discovered timer interruptsArd Biesheuvel
To support booting on virtual machines whose interrupt routing is discovered from the device tree, allow the interrupt numbers to be redeclared as PcdsDynamic by the platform .dsc Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16071 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09ArmPkg/ArmDisassemblerLib: ARMThumb and AArch64 fixesHarry Liebel
- Fix ARM Thumb mask operator. This was flagged by a toolchain as warning "use of logical '&&' with constant operand [-Wconstant-logical-operand]" - AArch64 should not be building the ARM32 disassemblers. - Add a AArch64 build target. The disassembler is still to be implemented. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16069 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-01ARM Packages: Removed unused PcdArmPrimaryCoreOlivier Martin
This PCD has been replaced by ArmPlatformIsPrimaryCore() function. Althrough this PCD is still used in some occasions. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16026 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-01ArmPkg/BdsLib/Arm: Check Linux image and parameters are not overlappingOlivier Martin
Check Linux image and parameters are not overlapping with each other. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16013 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-01ArmPkg/BdsLib/Arm: Clean Data cache before disabling itOlivier Martin
It is actually the same sequence as AArch64. Without cleaning the data cache prior to disable the cache, the LR value pushed on the stack when entering in ArmCleanInvalidateDataCache() might have been overwritten by this specific cache line maintenance. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16012 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-27ArmPkg/TimerDxe: Fixed real time periodOlivier Martin
Prior to this change, the TimerPeriod was re-initialize at the end of the interrupt handling with the value of the period. It means the real timer period was: Timer Interrupt Processing time + Timer Period Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15923 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-27ArmPkg/TimerDxe: Fixed the reloading of the periodOlivier Martin
Prior to this change the period was restored to the default period. This change restores the latest 'set period'. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15922 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-27ArmPkg/TimerDxe: Changed calculation to allow 1KHz granularity frequencyOlivier Martin
Prior to this change the frequency was rounded to 1Mhz. This change rounds the timer frequency to 1KHz. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15921 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-26ArmPkg/ArmArchTimerLib: Remove non required [depex] and IoLibOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15903 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-26ARM Packages: Replace tabs by spaces for indentationRonald Cron
Replace tabs by spaces for indentation to comply to EDK2 coding standards. Done in files with extension ".S", ".c", ".h", ".asm", ".dsc", ".inc", "*.inf", "*.dec" or ".fdf" and located in ArmPkg, ArmPlatformPkg, EmbeddedPkg, BeagleBoardPkg or Omap35xxPkg. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <ronald.cron@arm.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15901 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-25EDK II Contributions.txt: Note acceptable contribution licensesJordan Justen
We strongly prefer that contribtions be offered using the same license as the project/module. But, we should document other acceptable licenses for contributions. This will allow package owners to more easily know if they can accept a contribution under a different source license. NOTE: This does not modify the wording of the "TianoCore Contribution Agreement 1.0" section Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Mark Doran <mark.doran@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15892 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-20ARM Packages: Added support for GCC stack protectorOlivier Martin olivier.martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15853 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-20ArmPkg/ArmLib/ArmV7: Fixed ArmIsMpCore()Olivier Martin
The function was not returning the expected value. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15850 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-19ArmPkg/ArmLib: Set again TCR after getting the Translation Table attributesOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15837 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-19ArmPkg/BdsLib: Prevent a hang in BdsConnectDevicePath() when a sub-device ↵Olivier Martin
path is not found Some device paths were making BdsConnectDevicePath() hang. To prevent these hangs we check if the handle returned by gBS->LocateDevicePath() is the same after each iteration. An example of a device path that hangs: PciRoot(0x0)/Pci(0x1,0x0)/USB(0x0,0x0)/USB(0x3,0x0)/HD(...) The connect controller function manages to find PciRoot()/Pci(0x1,0x0) but the USB driver does not produce USB(0x0,0x0)/USB(0x3,0x0) and returns EFI_SUCCESS on its initialization. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15835 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-19ARM Packages: Removed trailing spacesRonald Cron
Trailing spaces create issue/warning when generating/applying patches. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <ronald.cron@arm.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15833 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-19ARM Packages: Corrected non-DOS line endingsRonald Cron
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <ronald.cron@arm.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15832 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-04ArmPkg/ArmSmcLib: Fixed SMC helper functionsOlivier Martin
The SMC helper functions were buggy as they were assuming that the values in x1-x7 registers were preserved across an SMC call, which is not the case. This patch fixes this issue. It also simplifies the code by providing only 1 version of the SMC helper function. We used to have 4 versions depending on the number of arguments. The problem with this approach was that the number of arguments also dictated the number of return values, which is completely unrelated. E.g. you can have an SMC call that takes 1 argument but returns 4 values. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15748 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-04ArmPkg/IndustryStandard/ArmStdSmc.h: Update Standard Service SMC CallsOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15747 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29ArmPkg: Remove BasePeCoffLibHarry Liebel
ArmPkg contains unused and outdated code for runtime PE/COFF image relocation. - Use the version in MdePkg instead. - Remove references to this package from BeagleBoardPkg. ArmPkg/BasePeCoffLib was added to deal with MOVT instruction that was not part of the PE/COFF specification at that time. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15712 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29ArmPkg/ArmLib.h: Fixed name of the argumentOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15711 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29ArmPkg/CpuDxe: Fixed some typo issues in the AArch64 exception codeOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15710 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29ArmPkg/AArch64.h: Added Exception Syndrome Register definitionsOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15709 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29ArmPkg/AArch64: Added ARM_HCR_TSC definitionOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15708 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29ArmPkg/ArmPkg.dec: Added the interrupt numbers for the Hypervisor and ↵Olivier Martin
Virtual Timers These numbers are mainly to reduce hardcoded numbers into the ACPI GTDT table. And also to match with the use of PcdArmArchTimerSecIntrNum and PcdArmArchTimerIntrNum into the GTDT ACPI Table. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15707 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29ArmPkg/AArch64.h: Added SPSR and Timer register definitionsOlivier Martin
These timer register definitions are AArch64 specific. It is the reason why they are into this file and not into Chipset/ArmArchTimer.h. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15706 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-15ArmPkg/ArmLib.h: Removed GET_CORE_POS macroRonald Cron
The platform independant GET_CORE_POS has been replaced by the platform dependent function ArmPlatformGetCorePosition(). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <ronald.cron@arm.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15661 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-15ARM Packages: Force the SEC modules to be 2K aligned for AArch64Olivier Martin
The AArch64 Vector Table must be aligned on a 2K boundary. The FDF specification does not support 2K alignment but support 4K. A clear comment has been added to help integrator to understand why the assertion fails when porting to a new AArch64 platform. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15659 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-15ArmPkg/BdsLib: Removed PSCI discoverability from the Linux loaderOlivier Martin
Some platforms might decide to not support PSCI in their FDT-aware Linux system even if their firmware supports it. It is the responsibility of the platform engineer to provide the appropriate FDT. The PCD gArmTokenSpaceGuid.PcdArmPsciSupport is not required anymore. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15658 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-09ArmPkg/ArmLib: Improved ArmConfigureMmu PerformanceEugene Cohen
Data & Instruction Caches can be kept enabled while the new translation table is filled. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eugene Cohen <eugene@hp.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15647 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04ArmPkg/ArmGic: Returned the InterruptId in ArmGicAcknowledgeInterrupt()Olivier Martin
The InterruptId has a different width for GicV2 and GicV3 (respectively 10bit and 24bit). The function prototype has been changed to return this value to make the caller GIC architecture version independent. Otherwise, we would have need to expose a different mask to allow the caller to retrieve this value from the read register. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15628 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04ArmPkg/ArmGic: Introduced support for GicV2 to ArmGicDxeOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15627 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04ArmPkg/ArmGic: Introduced support for GicV2 to ArmGicLibOlivier Martin
The support for GIcV2 was already existing. This change separate the GicV2 specific functions from the common Gic code (in preparation for GicV3 support). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15626 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04ArmPkg/ArmGic: Moved ArmGicDisableDistributor() to ArmGicLib.cOlivier Martin
The implementation is the same when we run in Secure or Non-Secure world. This change makes this function available for ArmGicSec.inf and ArmGicNonSec.inf. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15625 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04ArmPkg/ArmGic: Move RegisterInterruptSource() to the common GicDxe fileOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15624 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04ArmPkg/ArmGic: Move the installation and the registration to ↵Olivier Martin
InstallAndRegisterInterruptService() It will allow reusing the same code for GICv2 and GICv3 only drivers. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15623 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04ArmPkg/ArmGic: Make the GicDxe driver depends on ArmGicLib (cont)Olivier Martin
... and also rename the ArmGicLib sources to use an explicit 'Lib' suffix. The renaming did not work well with SVN. Files were missing from the initial commit. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15622 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-19 11:14:16 +0000