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Some AArch64 platforms have RAM and flash devices >4GB.
Update some additional Pcd entries to 64-bit, and change
the corresponding PcdGet32 calls to PcdGet64.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16325 6f19259b-4bc3-4df7-8a09-765794883524
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The library already supports UEFI_DRIVER, we just need to relax the
restriction list.
This allows ArmVirtualizationPkg platforms to build applications, like the
UEFI shell.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16219 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16208 6f19259b-4bc3-4df7-8a09-765794883524
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Only ArmVirtualizationPkg based platforms are expected to use
the dynamic method to choose between SMC and HVC to invoke PSCI.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16204 6f19259b-4bc3-4df7-8a09-765794883524
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This adds support for executing UEFI in a QEMU/mach-virt emulated environment.
The following assumptions are made about the target:
- DRAM base at 0x4000_0000, containing the device tree blob
- DRAM size at least 1 MB
- device tree uses 64-bit physical base addresses and sizes
- ARM architected timer
- Cortex-A15 CPU (if built for 32-bit)
The following information is retrieved from the device tree:
- PL011 UART base address
- GIC base addresses
- virtual timer interrupt
- PL031 RTC base address
- DRAM size, must be at least 128 MB
- virtio MMIO transports
- PSCI 0.2 availability (for reset and poweroff)
The device tree image is relocated and installed as a configuration table
so an EFI stub enabled kernel can be booted directly without the need for
a bootloader.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Casadevall <michael.casadevall@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16141 6f19259b-4bc3-4df7-8a09-765794883524
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This adds 2 implementations of SerialPortLib for device tree based platforms
using a PL011 UART:
- an 'early' one which is completely stateless and uses only fixed PCDs
- a normal one which takes its base address from a HOB containing the base
address discovered in the PEI phase
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-with-remarks-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16140 6f19259b-4bc3-4df7-8a09-765794883524
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This GUID will identify a customized HOB that carries the base address of
the PL011 serial port, for clients that cannot access PCDs.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16139 6f19259b-4bc3-4df7-8a09-765794883524
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This is an implementation of ArmPlatformLib that discovers the size of system
DRAM from a device tree blob located at the address passed in
gArmTokenSpaceGuid.PcdDeviceTreeBaseAddress, which should equal the value in
gArmTokenSpaceGuid.PcdSystemMemoryBase.
As the device tree blob is passed in system DRAM, this library can only be used
if sufficient DRAM is available (>= 128 MB) and if not using shadowed NOR. The
reason for this is that it makes it easier to guarantee that such a device tree
blob at base of DRAM will not be clobbered before we get a chance to preserve it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Casadevall <michael.casadevall@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16138 6f19259b-4bc3-4df7-8a09-765794883524
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This driver enumerates the device nodes in the device tree located at the
base address passed in gArmTokenSpaceGuid.PcdDeviceTreeBaseAddress, and
installs drivers for devices it cares about (GIC interrupt controller, RTC,
architected timer interrupt)
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16137 6f19259b-4bc3-4df7-8a09-765794883524
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This is a fork of the ARM PlatformPeiLib for virtual machines. The main
purpose of having this specific implementation is that it allows us to
preserve the device tree blob if it was passed to us in system DRAM.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16136 6f19259b-4bc3-4df7-8a09-765794883524
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Introduce gArmVirtualizationTokenSpaceGuid.PcdDeviceTreeBaseAddress and
PcdDeviceTreeInitialBaseAddress, which will be used by virtual machine ports
that discover the system configuration from a flattened device tree DTB image.
The latter is FixedPcd only, and should contain the initial offset of the DTB,
the former may be declared as dynamic, and updated at runtime if the DTB is
relocated before the DXE phase.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16135 6f19259b-4bc3-4df7-8a09-765794883524
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DXE phase
To allow a dynamically discovered UART base address, we parse the device
tree early and store the base address in a HOB. To prevent circular
constructor dependencies from interfering with bringing up the serial port
using this dynamic base address, use our own private HobLib with no
dependencies on DebugLib either directly or indirectly through UefiLib.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16134 6f19259b-4bc3-4df7-8a09-765794883524
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This adds an implementation of NorFlashPlatformLib that exposes the
two 64 MB NOR flash banks that are provided by QEMU's mach-virt
emulation both in 32-bit and 64-bit mode.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16133 6f19259b-4bc3-4df7-8a09-765794883524
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This include file contains platform specific defines, and is shared by
various modules.
Contributed-under: TianoCore Contribution Agreement 1.0
Acked-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16132 6f19259b-4bc3-4df7-8a09-765794883524
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