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2017-02-16ArmPlatformPkg/PL061Gpio: fix the offset value in Get functionHaojian Zhuang
When call PL061GetPins() or PL061SetPins(), should use GPIO_PIN_MASK(offset) as parameter, not offset. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2017-02-16ArmPlatformPkg/PL061: remove duplicated PL061_GPIO_DATA_REGHaojian Zhuang
PL061_GPIO_DATA_REG offset is referenced in PL061EffectiveAddress () already. So remove the duplicated reference when invoke PL061GetPins () or PL061SetPins (). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2017-01-26ArmPlatformPkg/TZASC: Allow specifying subregions to be disabledBhupesh Sharma
ARM TZASC-380 IP provides a mechanism to split memory regions being protected via it into eight equal-sized sub-regions. A bit-setting allows the corresponding subregion to be disabled. Several NXP/FSL SoCs support the TZASC-380 IP block and allow the DDR connected via the TZASC to be partitioned into regions having different security settings and also allow subregions to be disabled. This patch enables this support and can be used for SoCs which support such a partition of DDR regions. Details of the 'subregion_disable' register can be viewed here: http://infocenter.arm.com/help/topic/com.arm.doc.ddi0431c/CHDIGDCI.html Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Bhupesh Sharma <bhupesh.sharma@nxp.com> [bhupesh.linux@gmail.com : Added gmail ID as NXP one is no longer valid] Signed-off-by: Bhupesh Sharma <bhupesh.linux@gmail.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-01-20ArmPlatformPkg/NorFlashDxe: Change Flash memory attributes before writesAchin Gupta
In NorFlashFvbInitialize() if a valid Firmware Volume header is not found at the start of NOR Flash, the Flash memory is written before it has been remapped with EFI_MEMORY_UC attributes to allow write commands. Since the flash memory was previously mapped with Normal and possibly cacheable memory attributes, the Flash commands might never reach the device. This patch fixes this issue by remapping the Flash memory region with correct memory attributes before writing to it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Achin Gupta <achin.gupta@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2016-11-24ArmPlatformPkg/PL180MciDxe: update for identifying SDHaojian Zhuang
When CMD6 & ACMD51 are added into identifying SD process, PL180 should also support CMD6 & ACMD51. Otherwise, it will hang when system tries to read expected data. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
2016-10-24ArmPlatformPkg/NorFlashDxe: eliminate void pointer arithmeticArd Biesheuvel
While most compilers happily allow arithmetic on void pointer, the RVCT compiler does not, and throws the following warning for NorFlashDxe: ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.c(894,48) : error #1254-D: arithmetic on pointer to void or function type Since the expression in question involves a cast from UINTN to VOID*, simply add some parentheses to eliminate this warning. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-10-11ArmPlatformPkg: Correct mendacious comments.Alexei
Correct some obviously incorrect comments that have invalid details for the returned values. (Copy /Paste problem?) There are no functional changes in this commit. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Alexei Fedorov <alexei.fedorov@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-10-11ArmPlatformPkg: Fix PL011 FIFO size testEvan Lloyd
This change updates PL011UartInitializePort to compare ReceiveFifoDepth with the correct hardware FIFO size instead of the constant 32 used previously. This corrects a minor bug where a request for a fifo size > 15 and < 32 would not have been honoured on a system with a 16 byte FIFO. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-09-09ArmPlatformPkg/NorFlashDxe: use strictly aligned CopyMem()Ard Biesheuvel
The UEFI spec stipulates that unaligned accesses should be enabled on CPUs that support them, which means all of them, given that we no longer support pre-v7 ARM cores, and the AARCH64 bindings mandate support for unaligned accesses unconditionally. This means that one should not assume that CopyMem () is safe to call on regions that may be mapped using device attributes, which is the case for the NOR flash. Since we have no control over the mappings when running under the OS, and given that write accesses require device mappings, we should not call CopyMem () in the read path either, but use our own implementation that is guaranteed to take alignment into account. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-06-22ArmPlatformPkg/NorFlashAuthenticatedDxe: remove this obsolete moduleArd Biesheuvel
This module is now identical in functionality to NorFlashDxe, and is no longer used, so remove it altogether. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-06-22ArmPlatformPkg/NorFlashDxe: accept both non-secure and secure varstore GUIDsArd Biesheuvel
Now that the generic Variable Runtime DXE code no longer distinguishes between gEfiVariableGuid and gEfiAuthenticatedVariableGuid in the varstore FV header, we can relax the check in the NOR flash driver to accept either GUID regardless of whether we are running a secure boot capable build or not. This also means we can always use gEfiAuthenticatedVariableGuid when we encounter an empty NOR flash that needs to be initialized before use. So remove the mNorFlashVariableGuid global from the shared code and from both versions of NorFlashDxe.inf. This essentially collapses the two drivers into a single one, which means we can remove NorFlashAuthenticatedDxe entirely in a subsequent patch. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-06-15ArmPlatformPkg: Fix PL011 Glitches.Evan Lloyd
This change corrects 3 problems in the PL011 driver. 1. The TRM states "The UARTLCR_H, UARTIBRD, and UARTFBRD registers must not be changed:...when the UART is enabled" 2. The TRM (3.3.8) describes logic requiring the UART to be disabled and flushed before adjusting UARTCR. 3. Several redundant calls get made to PL011UartInitializePort, where the characteristics do not change, but updating the registers can cause glitches in the output stream. The parameters are compared to the current state and no action taken if no change of state is required. Where an update is required, the specified logic is followed, and the register updates only made when the UART is disabled. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
2016-06-15ArmPlatformPkg: Add support to configure PL011 UART clockEvan Lloyd
On some platforms the UART clock is not the same for all the serial ports. The PL011 driver must be capable of handling serial ports with different clock rates, so must not rely on a PCD for the clock rate. This patch allows the UART clock rate to be passed as a parameter to PL011UartInitializePort(), which is called from the serial port library. This patch also contains the corresponding changes in the serial port library. The PCD in Drivers/PL011Uart is replaced by an extra parameter for PL011UartInitializePort. The PCD is moved to Library/PL011SerialPortLib to supply the value to pass. A corresponding patch to ArmVirtPkg is included in the same bundle to align that with these changes. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
2016-06-15ArmPlatformPkg: Remove double write in PL011Evan Lloyd
The variable LineControl was initialised to zero, then updated in a condition. This change converts that to a write in each branch of the condition, removing the Write/Read/Modify/Write sequence. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
2016-06-15ArmPlatformPkg: Update PL011 Serial PCDs to Fixed PCDsEvan Lloyd
The PCDs used in the PL011 UART Driver and Serial Port Library are inherently "fixed at build". This change updates the source to use Fixed PCDs for these values. This improves clarity and efficiency. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
2016-06-15ArmPlatformPkg: Tidy PL011 UART driverEvan Lloyd
This cosmetic change only tidies things up in preparation for actual updates. (This reflects responses to a previously submitted patch, which has been split into several discrete changes.) There are no functional changes in this commit. Changes comprise: Minor corrections to comment typos. Minor formatting mods. Expansion of function comments. Remove OUT from UartBase parameter. Addition of #define for "magic mumbers". Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
2016-03-14ArmPlatformPkg: PL061: support multiple controllerHaojian Zhuang
Support multiple PL061 controllers. If platform gpio driver couldn't be found, PL061 gpio driver will continue to load PcdPL061GpioBase as the register base. It could be compatible with the use case of current PL061 gpio driver. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-03-01ArmPlatformPkg/PL180MciDxe: don't check ID_REG3Ryan Harkin
TC2 reads 0x02 for the PL180 ID3 register instead of 0x00 as defined in the spec. However, the spec [1] states that the contents of ID3 register represent the "configuration option of the peripheral" and thus not part of the Prime Cell identification. For this patch, we drop checking the value in MCI_PERIPH_ID_REG3. [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0172a/index.html Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-03-01ArmPlatformPkg/PL180MciDxe: warn on probe failRyan Harkin
If the PL180 fails to probe, issue a warning on debug builds. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-03-01ArmPlatformPkg/PL180MciDxe: fix Depex for TC2Ryan Harkin
PL180 on TC2 has a dependency on gEfiCpuArchProtocolGuid. Without adding the dependency, TC2 will crash in the PL180 driver. This problem has been present since d340ef7 when TC2 stopped booting. However, it was masked by 300fc77 which prevented PL180 from running on TC2 due to TC2 using a version on PL180 newer than that documented publicly. [1] https://github.com/tianocore/edk2/commit/d340ef7 2014-08-26 ArmPkg/ArmArchTimerLib: Remove non required [depex] and IoLib [2] https://github.com/tianocore/edk2/commit/300fc77 2015-08-25 ArmPlatformPkg/PL180MciDxe: check PrimeCell ID before initializing Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-02-26ArmPlatformPkg: PL061 - rewrite the hardware interactionLeif Lindholm
The PL061 GPIO controller is a bit of an anachronism, and the existing driver does nothing to hide this - leading to it being very tricky to read. Rewrite it to document (in comments and code) what is actually happening, and fix some bugs in the process. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
2016-02-26ArmPlatformPkg: PL061 - drop pointless initialize functionLeif Lindholm
PL061Initialize() did not actually do anything other than call PL061Identify() - so cut out the middle man. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
2016-02-26ArmPlatformPkg: PL061 - only initialize on protocol loadLeif Lindholm
For whatever reason, every single operation on the PL061 looked for an "Initialized" flag, and manually called the initialization function if not set. Move this to a single call on protocol installation. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
2016-02-26ArmPlatformPkg: PL061 - reformat copyright statement.Leif Lindholm
The copyright statement in PL061Gpio.c would not fit on a normal terminal screen. Break lines at <= 80 characters. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
2016-02-02ArmPlatformPkg: Rectify file modesEvan Lloyd
Problems have been encountered because some of the source files have execute permission set. This can cause git to report them as changed when they are checked out onto a file system with inherited permissions. This has been seen using Cygwin, MinGW and PowerShell Git. This patch makes no change to source file content, and only aims to correct the file modes/permissions. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19787 6f19259b-4bc3-4df7-8a09-765794883524
2015-10-16ArmPlatformPkg: NorFlashDxe: mellow DEBUG messages about flash reinitLaszlo Ersek
The ValidateFvHeader() function checks several conditions against the firmware volume header. Failure of the first of these checks, reported as "No Firmware Volume header present", is a common situation for unformatted flash images, especially when a new virtual machine is created. Similarly, "Variable Store Guid non-compatible" is common when the firmware binary is switched from Secure Boot-incapable to Secure Boot-capable, or vice versa. The only caller of ValidateFvHeader(), NorFlashFvbInitialize(), handles all these mismatches by installing a new FVB header. It also emits another, loud ERROR message (which is even less justified when it is triggered by (BootMode == BOOT_WITH_DEFAULT_SETTINGS)). Downgrade these messages from EFI_D_ERROR to EFI_D_INFO, so that they don't clutter the debug output when the PcdDebugPrintErrorLevel mask only enables EFI_D_ERROR (i.e., in a "silent" build). These messages have annoyed / confused users; see for example: - https://bugzilla.redhat.com/show_bug.cgi?id=1270279 - http://thread.gmane.org/gmane.comp.bios.edk2.devel/2772/focus=2869 Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Drew Jones <drjones@redhat.com> Cc: Yehuda Yitschak <yehuday@marvell.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18618 6f19259b-4bc3-4df7-8a09-765794883524
2015-09-04ArmPlatformPkg/HdLcd: add missing LcdIdentify()Ard Biesheuvel
Commit r18308 ("ArmPlatformPkg/LcdGraphicsOutputDxe: check PrimeCell ID before initializing") introduced a LcdIdentify() function to the PL111 LCD driver that makes it fail gracefully when executed on hardware that does not have the IP. However, the LcdGraphicsOutputDxe driver is shared with the HdLcd driver, which now fails to build due to the fact that it has no LcdIdentity() function. So add a dummy implementation that always returns EFI_SUCCESS. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18395 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-25ArmPlatformPkg/LcdGraphicsOutputDxe: check PrimeCell ID before initializingArd Biesheuvel
To deal gracefully with the absence of the PL111 hardware on the Foundation model, check the PrimeCell ID before proceeding with the installation. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18308 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-25ArmPlatformPkg/PL180MciDxe: check PrimeCell ID before initializingArd Biesheuvel
To deal gracefully with the absence of the PL180 hardware on the Foundation model, check the PrimeCell ID before proceeding with the installation. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18307 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-01ArmPlatformPkg: Use the merged Variable driverStar Zeng
Remove gVariableAuthenticatedRuntimeDxeFileGuid definition in ArmPlatformPkg.dec and use gVariableRuntimeDxeFileGuid in NorFlashAuthenticatedDxe.inf as auth Variable driver in SecurityPkg and Variable driver in MdeModulePkg have been merged. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17768 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-07ArmPlatformPkg: enable use of authenticated variables in NorFlashDxeArd Biesheuvel
The NorFlashDxe uses an explicit 'BEFORE xxx' Depex declaration to ensure that it is dispatched before VariableRuntimeDxe, and uses the file GUID of the latter as 'xxx' explicitly to accomplish that. However, when enabling UEFI Secure Boot, this breaks down since the authenticated VariableRuntimeDxe is a completely separate driver, with a different GUID. Also, the hardcoded dependency on gEfiVariableGuid, which is not used under UEFI Secure Boot, needs to be factored out in order to allow this driver to be used. So clone NorFlashDxe.inf into NorFlashAuthenticatedDxe.inf, and fix up the dependencies so they refer to gEfiAuthenticatedVariableGuid and SecurityPkg/VariableAuthenticated/RuntimeDxe/VariableRuntimeDxe.inf instead. Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17355 6f19259b-4bc3-4df7-8a09-765794883524
2015-01-23ArmPlatformPkg: detect correct pl011 fifo depthLeif Lindholm
pl011 releases earlier than r1p5 has a fifo depth of 16 bytes, whereas version r1p5 upwards has a fifo depth of 32 bytes. The pl011 driver was hardwired to 32 byte depth, causing dropped characters on some platforms (including default settings on FVP Base and Foundation models). Update driver to select 16 or 32 on port initialization by checking the component revision. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16656 6f19259b-4bc3-4df7-8a09-765794883524
2015-01-23ArmPkg/NorFlashDxe : Fix the check of flash addressesRonald Cron
Fix the check to prevent any reading past the end of the nor flash. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <ronald.cron@arm.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16655 6f19259b-4bc3-4df7-8a09-765794883524
2014-10-27EmbeddedPkg: Clarify the declaration of SerialPortGetControl()Ronald Cron
Rework the PL011UartGetControl() function removing a TODO by the way. Update of the header comment blocks of (PL011Uart|SerialPort)GetControl() functions. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <ronald.cron@arm.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16252 6f19259b-4bc3-4df7-8a09-765794883524
2014-10-27EmbeddedPkg: Clarify the declaration of SerialPortSetControl()Ronald Cron
Rework of PL011UartSetControl() as a consequence as well as update of function header comment blocks. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <ronald.cron@arm.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16251 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-16ArmPlatformPkg/NorFlashDxe: use MmioWrite () not memory storesArd Biesheuvel
When writing to the flash, make sure to use MmioWrite () wrappers instead of letting the compiler generate the store instructions. This is needed because under virtualization, store instructions with multiple outputs (i.e., store pair or store with writeback) cannot be emulated efficiently when operating on MMIO ranges. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16107 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-26ArmPlatformPkg/NorFlashDxe: Clean the driverOlivier Martin
- Marked some functions as STATIC - Simplified some conditions Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15907 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-26ARM Packages: Replace tabs by spaces for indentationRonald Cron
Replace tabs by spaces for indentation to comply to EDK2 coding standards. Done in files with extension ".S", ".c", ".h", ".asm", ".dsc", ".inc", "*.inf", "*.dec" or ".fdf" and located in ArmPkg, ArmPlatformPkg, EmbeddedPkg, BeagleBoardPkg or Omap35xxPkg. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <ronald.cron@arm.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15901 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-19ARM Packages: Removed trailing spacesRonald Cron
Trailing spaces create issue/warning when generating/applying patches. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <ronald.cron@arm.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15833 6f19259b-4bc3-4df7-8a09-765794883524
2014-06-20ARM Packages: Fixed missing braces (the warning was disabled by GCC)Olivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15578 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-14ArmPlatformPkg/NorFlashDxe: Fixed LBA for FVBOlivier Martin
FVB (for instance for UEFI Variable) might not be at the start of the NOR Flash. 'Lba' needs to be fixed up for it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15532 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-08ArmPlatformPkg/Drivers/NorFlashDxe: Directly implement DiskIO protocolBrendan Jackman
This improves performance by accessing NOR with the fine granularity that the hardware permits, rather than the coarse granularity assumed by DiskIoDxe. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Brendan Jackman <brendan.jackman@arm.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15502 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-08ArmPlatformPkg/NorFlashDxe: Optimise FVB protocolHarry Liebel
- Only read what needs reading, don't read the whole block. - Don't write back buffers containing no data after an erase. - Reduce number of NOR erases when writing data. Only erase the block when required. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15500 6f19259b-4bc3-4df7-8a09-765794883524
2014-04-08ArmPlatformPkg/NorFlashDxe: Fixed driver to support UEFI Runtime modeOlivier Martin
- Added the NOR Flash region to the Runtime UEFI Memory Mapped IO - Caught the gEfiEventVirtualAddressChangeGuid event to fixup the NOR Flash pointers Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15438 6f19259b-4bc3-4df7-8a09-765794883524
2014-04-08ArmPlatformPkg/NorFlashDxe: Fix coding mistakes that would prevent Runtime modeOlivier Martin
- No allocation during Runtime mode (post ExitBootServices()) - Allocate all the persistent data into runtime space - Do not access BootServices API during Runtime mode Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15437 6f19259b-4bc3-4df7-8a09-765794883524
2014-04-08ArmPlatformPkg/NorFlashDxe: Declare the driver as a UEFI Runtime driverOlivier Martin
NorFlash driver is required by UEFI Variable services to read/write Non-Volatile UEFI variables. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15436 6f19259b-4bc3-4df7-8a09-765794883524
2013-12-10ARM Packages: Removed 'inline' keywordOlivier Martin
'inline' keyword is not supported by the C89 (version used by EDK2). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14957 6f19259b-4bc3-4df7-8a09-765794883524
2013-10-21ArmPlatformPkg/PL180MciDxe: Fixed check for space in transmit FIFOOlivier Martin
This patch prevents a buffer underrun error on the Versatile Express Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14793 6f19259b-4bc3-4df7-8a09-765794883524
2013-10-21ArmPlatformPkg/NorFlashDxe: Fix checking of return value of ↵Roy Franz
NorFlashWriteBlocks() Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Roy Franz <roy.franz@linaro.org> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14792 6f19259b-4bc3-4df7-8a09-765794883524
2013-09-23LcdGraphicsOutputDxe: Update FrameBufferSize as per UEFI spec section 11.9Olivier Martin
The shift by 1 on the left was expected. It eases the access to CSSELR and set/way operations where the cache level field is at the BIT1 position. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14705 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-02 16:46:14 +0000