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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
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Some AArch64 platforms have RAM and flash devices >4GB.
Update some additional Pcd entries to 64-bit, and change
the corresponding PcdGet32 calls to PcdGet64.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16325 6f19259b-4bc3-4df7-8a09-765794883524
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ArmInvalidateInstructionAndDataTlb() was doing the same thing as
ArmInvalidateTlb().
Both invalidate Data and Instruction TLBs.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16253 6f19259b-4bc3-4df7-8a09-765794883524
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The platform independant GET_CORE_POS has been replaced by the platform
dependent function ArmPlatformGetCorePosition().
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15661 6f19259b-4bc3-4df7-8a09-765794883524
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NSACR (Non-Secure Access Control Register) is AArch32 specific.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14522 6f19259b-4bc3-4df7-8a09-765794883524
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Checking if a core if the primary/boot core used to be done with the macro
IS_PRIMARY_CORE().
Some platforms exposes configuration registers to change the primary core.
Replacing the macro IS_PRIMARY_CORE() by ArmPlatformIsPrimaryCore() allows
some flexibility in the way to check the primary core.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Acked-by: Ryan Harkin <ryan.harkin@linaro.org>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14344 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14179 6f19259b-4bc3-4df7-8a09-765794883524
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This large code change only modifies the line endings to be CRLF to be
compliant with the EDK2 coding convention document.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14088 6f19259b-4bc3-4df7-8a09-765794883524
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In case a DebugAgent library is supported for a specific debugger, we would
expect the exception be caught by DebugAgentLib.
The DebugAgentBaseLib exposes the cause of the exception to the user in the
Serial Terminal.
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13765 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13499 6f19259b-4bc3-4df7-8a09-765794883524
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For instance, in case of CpuHotPlug boot path the platform has already been
initialized. The CPU core should not execute any of the platform initialization
in this case.
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13492 6f19259b-4bc3-4df7-8a09-765794883524
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The function only used in Secure Firmware used to be mixed with
the Non-Secure/Normal functions in ArmPlatformLib.
When the Secure Firmware was not required for some platforms (eg:
BeagleBoard), these functions were empty functions.
This new interface has been created to clean the ArmPlatformLib
interface between the SEC and PEI phases.
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13260 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13253 6f19259b-4bc3-4df7-8a09-765794883524
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ArmCpuSynchronizeSignal by sev & wfe
Previsouly the synchronization of MpCore was using the SGI (Software
Generated Interrupt) to synchronize MpCore during the early boot.
This commit replaced this mechanism by the more appropriate SEV/WFE
instructions (Send/Wait Event instructions).
That also eases the port to a new cpu/platform.
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13249 6f19259b-4bc3-4df7-8a09-765794883524
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'Secure/Boot Firmware'
The 'SEC' component is not part of the UEFI software stack.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13138 6f19259b-4bc3-4df7-8a09-765794883524
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bits to their PPIs
The GICD_IGROUPR0 is banked for each connected processor. It means the
Non-Secure bits for the PPIs (Private Peripheral Interrupts) must be
configured for every processor.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13135 6f19259b-4bc3-4df7-8a09-765794883524
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platform-specific security bit
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13127 6f19259b-4bc3-4df7-8a09-765794883524
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values
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13062 6f19259b-4bc3-4df7-8a09-765794883524
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git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13061 6f19259b-4bc3-4df7-8a09-765794883524
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The enter_monitor_world() function was trashing r0/r1/r2 registers and then
was returning back to 'C'. The compiler might have used these registers in the C code.
These new design prevents register corruptions.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13060 6f19259b-4bc3-4df7-8a09-765794883524
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'ArmTrustedMonitorLib' library
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13059 6f19259b-4bc3-4df7-8a09-765794883524
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Because GET_CORE_POS(MpId) returns 0x0 for the primary core, the
stack position must be defined by the top of the stack. It means
stack_size must be added to the stack base.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12858 6f19259b-4bc3-4df7-8a09-765794883524
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library invocation
Some compilers uses VFP for some 64bit operation. If the VFP coprocessor is not enabled at
this stage the processor raises an undefined exception.
To prevent this case, the VFP enabling has been moved at the beginning of the platform
initialization phase.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12823 6f19259b-4bc3-4df7-8a09-765794883524
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Only the primary core was calling this function.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12646 6f19259b-4bc3-4df7-8a09-765794883524
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CPU and Platform Specific settings
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12637 6f19259b-4bc3-4df7-8a09-765794883524
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ArmPlatformLib
Memory map remapping is a platform specific feature only enabled by some platforms.
Instead of keeping this function empty for most platforms, the function has been
removed. This feature can easily fit in any other ArmPlatformLib function.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12632 6f19259b-4bc3-4df7-8a09-765794883524
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gArmTokenSpaceGuid.PcdTrustzoneSupport
This change does not make possible to disable Trustzone from the firmware.
The firmware has to be built for Trustzone support enabled or disabled.
The memory page table are now defined as 'Normal Memory' in any case.
Except for RTSM Device Memory which as to be Secure Device Memory due
to a RTSM bug.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12452 6f19259b-4bc3-4df7-8a09-765794883524
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Every CPUs have their own initialization requirements.
This library allows to allows to abstract these initialization requirements
into the ARM Platform common components.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12448 6f19259b-4bc3-4df7-8a09-765794883524
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git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12417 6f19259b-4bc3-4df7-8a09-765794883524
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The denomination 'Normal' was used to make reference to the 'Normal'
or 'Non Secure' or 'Non Trusted' world.
To avoid confusion, this prefix has been removed from PCDs to define
the normal world.
The PCDs explicitely related to the Secure/Trusted World continue to
have the 'Sec' prefix.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12416 6f19259b-4bc3-4df7-8a09-765794883524
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On MpCore system, the primary core can now be any core of the system.
To identify the primary core, you can use 'gArmTokenSpaceGuid.PcdArmPrimaryCoreMask'
and 'gArmTokenSpaceGuid.PcdArmPrimaryCore'.
These PCDs by default use the ClusterId and CoreId to identify the core. And the
primary core is defined as the ClusetrId=0 and CoreId=0.
The helper macros are: IS_PRIMARY_CORE(MpId), GET_CORE_ID(MpId), GET_CLUSTER_ID(MpId),
GET_CORE_POS(MpId), PRIMARY_CORE_ID.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12412 6f19259b-4bc3-4df7-8a09-765794883524
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This library is the interface for the ARM Generic Interrupt Controller
Architecture Specification.
ARM Platform can use any GIC controller (not necessary PL390 GIC).
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12411 6f19259b-4bc3-4df7-8a09-765794883524
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ArmPlatformSecExtraAction()
The PcdStandalone is a PCD ARM Ltd uses to make the difference between a standalone UEFI (boot
from cold boot to Boot Manager without user intervention) and a Debug UEFI firmware (the firmware
engineer has to copy the Normale World image into the DRAM to enable his/her firmware).
By coping the firmware into DRAM in the non standalone version it is much faster than reflashing
the NOR Flash after each build.
ArmPlatformSecExtraAction() function is called just before the Sec module jump to normal world.
The platform firmware can run extra actions at this stage.
The 'ARM Standalone' concept has moved to the implementation of ArmPlatformSecExtraAction() for
the ARM development boards (in ArmPlatformPkg/Library/DebugSecExtraActionLib).
ArmPlatformPkg: Enable DebugAgentLib in Sec and PrePeiCore
ArmPlatformPkg: Fix line endings in some source files
Use CR+LF line endings as defined by the EDK2 coding convention
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11991 6f19259b-4bc3-4df7-8a09-765794883524
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This module is enabled for ArmRealViewEb and ArmvExpress builds
when the macro EDK2_SKIP_PEICORE is passed to the build system.
The PrePi module can be used when the DRAM has already been initialized
by the SEC phase/1st stage boot loader and no call to external PEIM is
required.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11953 6f19259b-4bc3-4df7-8a09-765794883524
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Feature PCDs cannot be used in assembly files.
The PcdStandalone PCD is needed in one of the assembly file of the
ArmPlatformPkg/PrePi module.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11952 6f19259b-4bc3-4df7-8a09-765794883524
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git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11829 6f19259b-4bc3-4df7-8a09-765794883524
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With this change, we now have these following PCDs values to define the
location of the Secure and Normal firmwares:
- gArmTokenSpaceGuid.PcdSecureFd(BaseAddress|Size)
- gArmTokenSpaceGuid.PcdSecureFv(BaseAddress|Size)
- gArmTokenSpaceGuid.PcdNormalFd(BaseAddress|Size)
- gArmTokenSpaceGuid.PcdNormalFv(BaseAddress|Size)
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11806 6f19259b-4bc3-4df7-8a09-765794883524
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ArmPlatformSecInitialize
Some platforms require some of their controllers to be initialized in Secure world.
This function make the difference between Secure and Normal world platform initialization.
ArmPlatformPkg/ArmPlatformLib: Introduce ArmPlatformNormalInitialize
Contain the code that initializes platform controllers that would be initialized in Normal World
by PlatformPei.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11591 6f19259b-4bc3-4df7-8a09-765794883524
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The GIC was not enabled on MPCore platform with Trustzone support disabled.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11590 6f19259b-4bc3-4df7-8a09-765794883524
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- Replace the '0' that defined the primary core by the macro ARM_PRIMARY_CORE
- Fix mispellings and coding style
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11589 6f19259b-4bc3-4df7-8a09-765794883524
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This function is responsible to handle all the specific platform code that must
be run in secure world to initialize some controllers.
ArmPlatformPkg/Sec: Move the L2x0 initialization to ArmPlatformLib
The L2x0 controller must be initialized in secure world. Move its initialization
into the ArmPlatformInitialize() of the Cortex A9x4 Core Tile PlatformLib.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11476 6f19259b-4bc3-4df7-8a09-765794883524
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gArmTokenSpaceGuid.PcdNormalFd*
This renaming is for matching the namespace with the secure firmware
gArmTokenSpaceGuid.PcdSecureFdBaseAddress/Size.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11475 6f19259b-4bc3-4df7-8a09-765794883524
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Exception errors and early print statements must be also print out in Release builds.
Replace the DEBUG() macro by the SerialPortWrite() function.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11474 6f19259b-4bc3-4df7-8a09-765794883524
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git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11291 6f19259b-4bc3-4df7-8a09-765794883524
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