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- Added the NOR Flash region to the Runtime UEFI Memory Mapped IO
- Caught the gEfiEventVirtualAddressChangeGuid event to fixup the NOR Flash pointers
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15438 6f19259b-4bc3-4df7-8a09-765794883524
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- No allocation during Runtime mode (post ExitBootServices())
- Allocate all the persistent data into runtime space
- Do not access BootServices API during Runtime mode
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15437 6f19259b-4bc3-4df7-8a09-765794883524
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NorFlash driver is required by UEFI Variable services to read/write
Non-Volatile UEFI variables.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15436 6f19259b-4bc3-4df7-8a09-765794883524
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- Removed PCD base address from the macro definition. The base address needs to be fixup when the driver runs in UEFI Runtime mode
- Added the PL031 controller memory region to the Runtime UEFI Memory Mapped IO
- Caught the gEfiEventVirtualAddressChangeGuid event to fixup the PL031 Base address
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15435 6f19259b-4bc3-4df7-8a09-765794883524
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in the entrypoint
The stack size in the entrypoint (ie: $ARCH/ModuleEntryPoint.S) is calculated such as
StackSize = PrimaryCoreStack + (core_count - 1) * SecondaryCoreStack
While we were declaring the stacksize into the stack hob as:
StackSize = PrimaryCoreStack + (cluster * 8) * SecondaryCoreStack
If the number of cluster (ie: PcdClusterCount) were not defined correctly then
the stack size declaration were not correct.
It could cause stack corruption if the allocator allocates memory in this range.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15431 6f19259b-4bc3-4df7-8a09-765794883524
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for Base and Foundation models
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15430 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15428 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15394 6f19259b-4bc3-4df7-8a09-765794883524
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If EditHIInputStr() is called, say with a MaxCmdLine of 2, the user is
currently allowed to enter 2 characters.
If the second character is a carriage return/line feed, this is
substituted with a NULL and the function returns.
If the second character is a regular character, the loop terminated and
the function returns. However, the buffer has not been NULL terminated.
This patch prevents the user from entering a regular character as the
final character and ensures that the only way out of the input is by
pressing ESC or ENTER (or equivalent).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15325 6f19259b-4bc3-4df7-8a09-765794883524
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file system
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15324 6f19259b-4bc3-4df7-8a09-765794883524
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That includes an implementation of FASTBOOT_PLATFORM_PROTOCOL for
ARM Versatile Express.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15317 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15315 6f19259b-4bc3-4df7-8a09-765794883524
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based platform
This driver should be used when adding code specific to a platform based on
ARM VExpress based board.
ArmFvpDxe driver has been renamed into ArmVExpressDxe driver to support the hardware
based platforms and the model based platforms.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15279 6f19259b-4bc3-4df7-8a09-765794883524
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- Fixed typo
- Removed unreachable 'dead' loop
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15277 6f19259b-4bc3-4df7-8a09-765794883524
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Several assembler macros use a loop at the label "dead" to trap an error.
This is difficult to debug as there is no indication of how one arrived at the loop.
This change replaces dead with distinct loops locally in the macro,
which means the cause of the hang is detectable to the debugger.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15273 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15256 6f19259b-4bc3-4df7-8a09-765794883524
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An assertion that was comparing the block size with the size of
the storage was failing.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15249 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15248 6f19259b-4bc3-4df7-8a09-765794883524
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- By setting the 'ARM_FVP_RUN_NORFLASH' flag at compile time UEFI will
be linked to run from NOR FLASH0 on FVPs.
- The RAM load location is currently set to 128MB from base of DRAM.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15245 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15241 6f19259b-4bc3-4df7-8a09-765794883524
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This header contains a function that does not exist.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15238 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15236 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15211 6f19259b-4bc3-4df7-8a09-765794883524
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BootMonFs (file system used on the VExpress NOR Flash) is now supported on
both NOR Flash regions.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15209 6f19259b-4bc3-4df7-8a09-765794883524
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128MB of DRAM
Linux and its DTB required to be loaded in the first 128MB of the system memory.
Moving UEFI firmware above this limit ensures some XIP runtime code (part of the
UEFI firmware) are not overwritten when loading Linux kernel.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15168 6f19259b-4bc3-4df7-8a09-765794883524
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The commit on Fri Dec 6 2013: "ArmPlatformPkg/ArmPlatformStackLib:
Do not directly use PcdArmPrimaryCore" has made the function
ArmPlatformStackSet() overwrites the registers r6 and r7.
These registers are used by PrePi to store the MPIDR and the the base
of the system memory region used by UEFI.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15167 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15166 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gao, Liming <liming.gao@intel.com>
Reviewed-By: Olivier Martin <Olivier.Martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15139 6f19259b-4bc3-4df7-8a09-765794883524
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The edk2 tree mandates CRLF line terminators. Earlier patches added some
lines with LF terminators. Clean them up.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15132 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Reece R. Pollack <reece.pollack@linaro.org>
Signed-off-by: Steven Kinney <steven.kinney@linaro.org>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15131 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Reece R. Pollack <reece.pollack@linaro.org>
Signed-off-by: Steven Kinney <steven.kinney@linaro.org>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15130 6f19259b-4bc3-4df7-8a09-765794883524
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networking and PXE boot.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15129 6f19259b-4bc3-4df7-8a09-765794883524
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ARM Development Boards
This is the filesystem created by the microcontroller on NOR Flash of the ARM Versatile
Express Development Board.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15126 6f19259b-4bc3-4df7-8a09-765794883524
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emulation
This patch adds an EDK2_ARMVE_SUPPORT_QEMU macro that can be defined at build
time to build an image that supports QEMU. The default build is unchanged and
builds the RTSM configuration.
QEMU only models fixed size blocks within a flash device, and the RTSM
configuration stores EFI variables in the smaller boot blocks of the
flash. When built for QEMU the larger blocks are used that QEMU properly
emulates.
Signed-off-by: Roy Franz <roy.franz@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15125 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15123 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15122 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15121 6f19259b-4bc3-4df7-8a09-765794883524
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instance to add new API MigratePeiServicesTablePointer()
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gao, Liming <liming.gao@intel.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15120 6f19259b-4bc3-4df7-8a09-765794883524
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The System Memory region might be out of the 32-bit memory space.
This change has been validated on the FVP AArch64 model using 4GB
of DRAM at 0x8_0000_0000:
- # System Memory (2GB)
- gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000
- gArmTokenSpaceGuid.PcdSystemMemorySize|0x80000000
+ # System Memory (4GB)
+ gArmTokenSpaceGuid.PcdSystemMemoryBase|0x800000000
+ gArmTokenSpaceGuid.PcdSystemMemorySize|0x100000000
EFI Shell and Linux kernel boot successfully.
Note: This change has not been validated on AArch32. I expect some
early assembly code to not work.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15093 6f19259b-4bc3-4df7-8a09-765794883524
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The line endings for EDK2 source files should be CRLF.
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15057 6f19259b-4bc3-4df7-8a09-765794883524
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Right now the ARM Platform driver does not do much, but
I expect to move most platform specific code into platform
specific driver in the future.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
v5:
- ensure / document that the VIRTIO_BLK_DEVICE_PATH structure must be
packed
- fix whitespace damage in definition of "mVirtioBlockDevicePath"
- the platform driver is added to all platform DSC and FDF files in the
previous patch; this patch focuses on virtio only
Change-Id: I3505bfc5b31085b8017bd9e6895a155bd7a2eee9
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14981 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
v5:
- For uniformity, add the empty driver to
ArmVExpress-RTSM-AEMv8Ax4-foundation.* too in this patch, not just
ArmVExpress-RTSM-AEMv8Ax4.*. V4 added the empty driver to
ArmVExpress-RTSM-AEMv8Ax4-foundation.* not sooner than the next patch,
fusing it with other (= virtio) functionality. Let's split these changes
cleanly.
Change-Id: I7d635011c8d3ac59097c728b7c7786d8677c80cb
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14980 6f19259b-4bc3-4df7-8a09-765794883524
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'inline' keyword is not supported by the C89 (version used by EDK2).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14957 6f19259b-4bc3-4df7-8a09-765794883524
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stacks PCDs
We do not have (Secure) Monitor mode on AArch64.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14939 6f19259b-4bc3-4df7-8a09-765794883524
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To make the code platform independent we should not use PcdArmPrimaryCore
in libraries other than the platform specific libraries.
Some platforms allow to change the primary core with external registers.
These platforms do not use PcdArmPrimaryCore to identify the primary CPU.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14938 6f19259b-4bc3-4df7-8a09-765794883524
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- Used correct PCD
- Implement the function for AArch64, BeagleBoard, CTA15A7
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14937 6f19259b-4bc3-4df7-8a09-765794883524
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PcdPrePiCpuMemorySize & PcdPrePiCpuIoSize
This change introduces default values for the PCDs PcdPrePiCpuMemorySize & PcdPrePiCpuIoSize.
These values are for the architectures ARM, AARCH64, IA32 and X64.
The redefinition of these PCDs (with the same default values) have been removed from the DSC files.
Note: the default value for AARCH64 was 32. It was preventing to allocate buffer above the 32bit
address space.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14914 6f19259b-4bc3-4df7-8a09-765794883524
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space on AArch64
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14912 6f19259b-4bc3-4df7-8a09-765794883524
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bringup when remapping DRAM at 0x0
If the DRAM is remapped at 0x0 then we need to wake up the secondary cores from wfe
(waiting for the memory to be initialized) as the instruction is still in the remapped
flash region at 0x0 to make them jumping into the C-code which lives in the NOR1 at 0x44000000 before
the region 0x0 is remapped as DRAM.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14910 6f19259b-4bc3-4df7-8a09-765794883524
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specific files
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14909 6f19259b-4bc3-4df7-8a09-765794883524
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