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2014-01-07ArmPlatformPkg/ArmFvpDxe: Fixed the line endingsoliviermartin
The line endings for EDK2 source files should be CRLF. git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15057 6f19259b-4bc3-4df7-8a09-765794883524
2013-12-13ArmPlatformPkg/ArmFvpDxe: Added Virtio Block supportOlivier Martin
Right now the ARM Platform driver does not do much, but I expect to move most platform specific code into platform specific driver in the future. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> v5: - ensure / document that the VIRTIO_BLK_DEVICE_PATH structure must be packed - fix whitespace damage in definition of "mVirtioBlockDevicePath" - the platform driver is added to all platform DSC and FDF files in the previous patch; this patch focuses on virtio only Change-Id: I3505bfc5b31085b8017bd9e6895a155bd7a2eee9 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14981 6f19259b-4bc3-4df7-8a09-765794883524
2013-12-13ArmPlatformPkg/ArmVExpressPkg: Added the empty 'ArmFvpDxe' platform UEFI driverOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> v5: - For uniformity, add the empty driver to ArmVExpress-RTSM-AEMv8Ax4-foundation.* too in this patch, not just ArmVExpress-RTSM-AEMv8Ax4.*. V4 added the empty driver to ArmVExpress-RTSM-AEMv8Ax4-foundation.* not sooner than the next patch, fusing it with other (= virtio) functionality. Let's split these changes cleanly. Change-Id: I7d635011c8d3ac59097c728b7c7786d8677c80cb Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14980 6f19259b-4bc3-4df7-8a09-765794883524
2013-12-10ARM Packages: Removed 'inline' keywordOlivier Martin
'inline' keyword is not supported by the C89 (version used by EDK2). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14957 6f19259b-4bc3-4df7-8a09-765794883524
2013-12-06ArmPlatformPkg/ArmVExpress-RTSM-AEMv8Ax4-foundation.dsc: Remove the Monitor ↵Olivier Martin
stacks PCDs We do not have (Secure) Monitor mode on AArch64. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14939 6f19259b-4bc3-4df7-8a09-765794883524
2013-12-06ArmPlatformPkg/ArmPlatformStackLib: Do not directly use PcdArmPrimaryCoreOlivier Martin
To make the code platform independent we should not use PcdArmPrimaryCore in libraries other than the platform specific libraries. Some platforms allow to change the primary core with external registers. These platforms do not use PcdArmPrimaryCore to identify the primary CPU. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14938 6f19259b-4bc3-4df7-8a09-765794883524
2013-12-06ArmPlatformPkg: Fix and Implement ArmPlatformGetPrimaryCoreMpIdOlivier Martin
- Used correct PCD - Implement the function for AArch64, BeagleBoard, CTA15A7 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14937 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-28EmbeddedPkg/EmbeddedPkg.dec: Defined default values for ↵Olivier Martin
PcdPrePiCpuMemorySize & PcdPrePiCpuIoSize This change introduces default values for the PCDs PcdPrePiCpuMemorySize & PcdPrePiCpuIoSize. These values are for the architectures ARM, AARCH64, IA32 and X64. The redefinition of these PCDs (with the same default values) have been removed from the DSC files. Note: the default value for AARCH64 was 32. It was preventing to allocate buffer above the 32bit address space. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14914 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-28ArmPlatformPkg/Ds5: Update script to support System Memory above the 32bit ↵Olivier Martin
space on AArch64 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14912 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-28ArmPlatformPkg/ArmVExpressLibCTA9x4: Fixed the initial secondary core ↵Olivier Martin
bringup when remapping DRAM at 0x0 If the DRAM is remapped at 0x0 then we need to wake up the secondary cores from wfe (waiting for the memory to be initialized) as the instruction is still in the remapped flash region at 0x0 to make them jumping into the C-code which lives in the NOR1 at 0x44000000 before the region 0x0 is remapped as DRAM. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14910 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-28ARM Packages: Removed 'Chipset/ArmV7.h' inclusion from the non-ARMv7 ↵Olivier Martin
specific files Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14909 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-28ArmPlatformPkg/ArmVExpressPkg: Removed unused PCDs declaration from INF fileOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14907 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-28ArmPlatformPkg/ArmVExpressPkg: Fixed when EDK2_ARMVE_STANDALONE is set to zeroOlivier Martin
If EDK2_ARMVE_STANDALONE is not defined then the value is set to 1. The developer has to explicit set the macro to zero to build a non standalone build. It means this macro is always defined. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14906 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-05ArmPlatformPkg: Added initial support for the FVP Base and Foundation ModelsOlivier Martin
The FVP Base Model has GICv3 support. UEFI SEC does limited configuration of GICv3 if present. This is required for Linux to use GICv3. UEFI itself uses the GICv3 in legacy mode (GICv2). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14824 6f19259b-4bc3-4df7-8a09-765794883524
2013-10-29ARM Packages: Renamed PL390Gic driver into ArmGic driverOlivier Martin
The aim is to make this driver follows the ARM GIC specifications and be implementation independent. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14810 6f19259b-4bc3-4df7-8a09-765794883524
2013-10-21ArmPlatformPkg/PL031RealTimeClockLib: Fixed the conditions in LibSetTime()Olivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14794 6f19259b-4bc3-4df7-8a09-765794883524
2013-10-21ArmPlatformPkg/PL180MciDxe: Fixed check for space in transmit FIFOOlivier Martin
This patch prevents a buffer underrun error on the Versatile Express Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14793 6f19259b-4bc3-4df7-8a09-765794883524
2013-10-21ArmPlatformPkg/NorFlashDxe: Fix checking of return value of ↵Roy Franz
NorFlashWriteBlocks() Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Roy Franz <roy.franz@linaro.org> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14792 6f19259b-4bc3-4df7-8a09-765794883524
2013-09-23LcdGraphicsOutputDxe: Update FrameBufferSize as per UEFI spec section 11.9Olivier Martin
The shift by 1 on the left was expected. It eases the access to CSSELR and set/way operations where the cache level field is at the BIT1 position. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14705 6f19259b-4bc3-4df7-8a09-765794883524
2013-09-23ArmPlatformPkg/LcdGraphicsOutputDxe: Call LcdShutdown() on ↵Olivier Martin
ExitBootServices() if PcdGopDisableOnExitBootServices Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14702 6f19259b-4bc3-4df7-8a09-765794883524
2013-09-23LcdGraphicsOutputDxe: Fix BltVideoFill for non-32-bit architecturesOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14701 6f19259b-4bc3-4df7-8a09-765794883524
2013-09-16ArmPlatformPkg/MemoryInitPei: AARCH64 fix memory address calculationsGarrett Kirkendall
At least for AARCH64 currently, SystemMemoryTop and FdTop can overflow while adding the 32-bit PCDs together. The resulting value loses the upper 32-bits. Cast each of the values to EFI_PHYSICAL_ADDRESS size before doing the addition to prevent erroneous overflow. There is currently no 32-bit platform in EDKII open source that will overflow and this change would not fix that problem anyway. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Garrett Kirkendall <garrett.kirkendall@amd.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14675 6f19259b-4bc3-4df7-8a09-765794883524
2013-09-04ArmPlatformPkg/patches: Updated BaseTools-Pending-Patches.patchOlivier Martin
This updated patch contains the patch: - Fixed calculation of BaseOfCode in GenFw when the first code section is aligned: Fixes the calculation of the PE/COFF header attribute .BaseOfCode. when the first ..text. section is aligned. In the current code base, the alignment of the first code section is not taken into account for the calculation of BaseOfCode. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14628 6f19259b-4bc3-4df7-8a09-765794883524
2013-09-04ArmPlatformPkg: Update AArch64 models to match the binaries generated by the ↵Olivier Martin
AArch64 Linux kernel Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14627 6f19259b-4bc3-4df7-8a09-765794883524
2013-08-30ARM Package: Increase FV file size for some EDK2 firmwareOlivier Martin
GCC47 generates bigger binaries in Debug build than GCC46. This large increase is considered as a regression. It will require some investigation to understand the reason of this increase in size. The size of the FV has been increased to allow developers to build these images with the current BaseTools. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14611 6f19259b-4bc3-4df7-8a09-765794883524
2013-08-27SCR_EL3 is the control register for setting the security stateGirish K S
modified the comment which can mislead. The "ldr r0, [r1]" is overrided with a immediate "mov ro, #3" instruction. This mov instruction will over write the contents of the ro register. So replacing 'mov' by 'orr' instruction would prevent to override the original value. This patch assumes mov is the right instruction to be retained Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Girish K S <ks.giri@samsung.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14606 6f19259b-4bc3-4df7-8a09-765794883524
2013-08-21ArmPlatformPkg/ArmVExpressPkg: Added 'EfiResetPlatformSpecific' to ↵Olivier Martin
ResetSystemLib This value was missing from the switch on 'ResetType'. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14583 6f19259b-4bc3-4df7-8a09-765794883524
2013-08-21ArmPlatformPkg/Sec: Removed SetupExceptionLevel3()Olivier Martin
This function only does the GIC initialization that is always taken care by Sec.c. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14581 6f19259b-4bc3-4df7-8a09-765794883524
2013-08-21ArmPlatformPkg/Sec: Remove SCR and CPTR initialization from SetupExceptionLevel3Olivier Martin
This is already taken care by Sec when PcdTrustzoneSupport = TRUE. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14580 6f19259b-4bc3-4df7-8a09-765794883524
2013-08-21ArmPlatformPkg/ArmVExpressPkg: Set PcdTrustzoneSupport to TRUE on the ↵Olivier Martin
AArch64 platforms This PCD ensures the transition from EL3 to EL2 in ArmPlatformPkg/Sec. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14579 6f19259b-4bc3-4df7-8a09-765794883524
2013-08-19ArmPlatformPkg/ArmVExpressPkg: Add System ID of FVP models to VE LCD driver.Olivier Martin
- Setting DVI fails on VE models. The FVP models behave the same. These have updated SYS ID numbers and they need to be added to the driver. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14564 6f19259b-4bc3-4df7-8a09-765794883524
2013-08-19ArmPlatformPkg/ArmVExpress.dsc.inc: Added DEBUG_GCD & DEBUG_CACHE values to ↵Olivier Martin
the list of DEBUG_* Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14563 6f19259b-4bc3-4df7-8a09-765794883524
2013-08-06ArmPlatformPkg: PrePei Cache disable and invalidate.Olivier Martin
- Disable data cache on all cores. - Do not clean caches as there might be junk in them, invalidate only. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14527 6f19259b-4bc3-4df7-8a09-765794883524
2013-08-06ArmPlatformPkg/PL180MciDxe: Increased the TPL at the highest priority to ↵Olivier Martin
disable interrupts This change prevent any interrupt to disturb the PL180 data transfer. If the data transfer is not fast enough, we get UNDERRUN error. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14526 6f19259b-4bc3-4df7-8a09-765794883524
2013-08-06ARM: Remove NSACR from the common codeOlivier Martin
NSACR (Non-Secure Access Control Register) is AArch32 specific. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14522 6f19259b-4bc3-4df7-8a09-765794883524
2013-07-26ArmPkg,ArmPlatformPkg: Free memory allocated by Get.*SpaceMap()Olivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14507 6f19259b-4bc3-4df7-8a09-765794883524
2013-07-19ArmPlatformPkg: Added Aarch64 Foundation ModelHarry Liebel
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14495 6f19259b-4bc3-4df7-8a09-765794883524
2013-07-18ArmPlatformPkg/Ds5: Added Aarch64 supportHarry Liebel
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14491 6f19259b-4bc3-4df7-8a09-765794883524
2013-07-18ArmPlatformPkg: Added support for Aarch64 AEM RTSM modelHarry Liebel
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14490 6f19259b-4bc3-4df7-8a09-765794883524
2013-07-18ArmPlatformPkg: Added Aarch64 supportHarry Liebel
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14489 6f19259b-4bc3-4df7-8a09-765794883524
2013-07-17ArmPkg: Removed the non-used PCD PcdGicPrimaryCoreIdOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14480 6f19259b-4bc3-4df7-8a09-765794883524
2013-07-17ArmPlatformPkg: Removed the check on the CpuId to release the secondary ↵Olivier Martin
cores from their mailbox spinning The idea is to remove the PCD PcdGicPrimaryCoreId to make the port easier (and also to allow changing the primary boot CPU without adding more platform specific code to UEFI). There is a risk the mailboxes contain garbage at boot time. But it should be easy enough to clear the mailboxes when starting UEFI to workaround this limitation. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14477 6f19259b-4bc3-4df7-8a09-765794883524
2013-07-01ArmPlatformPkg/ArmVExpressLibCTA15-A7: Mapped the extra 1GB of DRAM in the MMUOlivier Martin
ARM Versatile Express TC2 Core Tile has two profiles: the 1GB DRAM core tile or the 2GB DRAM core tile profiles. By default UEFI assumes, it is the 1GB core tile. In case of 2GB DRAM it declares this additional 1GB resource system memory to UEFI. But the previous code did not map this memory in the MMU Page Table. So, the memory was allocatable by UEFI modules, but was not accessible by the CPU (because not mapped). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Leif Lindholm <Leif.Lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14449 6f19259b-4bc3-4df7-8a09-765794883524
2013-06-27ArmPkg: Made ArmConfigureMmu() returns a status codeOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14445 6f19259b-4bc3-4df7-8a09-765794883524
2013-06-21ArmPlatformPkg: Fixed deprecated ifdef syntax in DSC filesOlivier Martin
The syntax '!ifdef $(MACRO)' is deprecated and should be replaced by '!ifdef MACRO'. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14440 6f19259b-4bc3-4df7-8a09-765794883524
2013-06-21ArmPlatformPkg/ArmVExpressPkg: CTA9x4: Default to EDK2_ARMVE_STANDALONE=1Ryan Harkin
This patch changes the Versatile Express A9 BSP to build with EDK2_ARMVE_STANDALONE=1 as the default option. The user may then specify zero if they wish to build the non-standalone version. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14439 6f19259b-4bc3-4df7-8a09-765794883524
2013-06-21ArmPlatformPkg/ArmVExpressPkg: Add Shutdown supportRyan Harkin
LibResetSystem was performing a cold reboot for both reboot and shutdown. This patch updates LibResetSystem to pass SYS_CFG_SHUTDOWN to the microcontroller when called wit EfiResetShutdown. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14438 6f19259b-4bc3-4df7-8a09-765794883524
2013-06-21ArmPlatformPkg/Bds: Make ".EFI" files recognizable as EFI applicationsLeif Lindholm
Currently, only ".efi" files are recognized as valid ARM UEFI applications by BDS. This patch also makes ".EFI" files recognised. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14437 6f19259b-4bc3-4df7-8a09-765794883524
2013-06-19ArmPlatformPkg/PL011Uart: Ignore BAUD rate if Integral non-zeroOlivier Martin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14432 6f19259b-4bc3-4df7-8a09-765794883524
2013-06-19ArmPlatformPkg/PL011Uart: Fixed conditionOlivier Martin
The aim of the condition is to check if we should use the default BaudRate value (case when *BaudRate == 0). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14431 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-03 06:43:56 +0000