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2015-10-08BaseTools: Update edksetup.bat to support multiple workspacesLiming Gao
1. Update edksetup.bat and toolsetup.bat to handle PACKAGES_PATH. BaseTools directory may be in PACKAGES_PATH instead of WORKSAPCE. 2. Introduce EDK_TOOLS_BIN env points to the windows binary tools dir. Windows BaseTools Win32 may be a separate directory. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Wu Hao A <hao.a.wu@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18582 6f19259b-4bc3-4df7-8a09-765794883524
2015-10-08BaseTools: Update ECC tool to support multiple workspacesLi YangX
Update ECC to refer MultipleWorkspace class to convert the file path from WORKSPACE and PACKAGES_PATH. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Li YangX <yangx.li@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18581 6f19259b-4bc3-4df7-8a09-765794883524
2015-10-08BaseTools: Update UPT tool to support multiple workspacesHesheng Chen
Update UPT to refer MultipleWorkspace class to convert the file path from WORKSPACE and PACKAGES_PATH. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hesheng Chen <hesheng.chen@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18580 6f19259b-4bc3-4df7-8a09-765794883524
2015-10-08BaseTools: Update Build tool to support multiple workspacesLi YangX
WORKSPACE is still kept. New PACKAGES_PATH is introduced to specify the additional WORKSPACEs. In PACKAGES_PATH, ';' is separator in Windows, ':' is separator in Linux. Build directory is in WORKSPACE. Package, BaseTools and Conf directory will be found from WORKSPACE and PACKAGES_PATH. In implementation, BaseTools adds MultipleWorkspace class for the file path conversion from WORKSPACE and PACKAGES_PATH. Verify two tree layouts. Root\edk2\MdePkg Root\edk2\MdeMdeModulePkg Root\edk2\... 1. set WORKSPACE=Root\edk2 2. set WORKSPACE=Root, and set PACKAGES_PATH=Root\edk2 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Li YangX <yangx.li@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18579 6f19259b-4bc3-4df7-8a09-765794883524
2015-10-02BaseTools/AARCH64: use large code model for GCC <= 4.8Ard Biesheuvel
As it turns out, upstream GCC only supports the AArch64 'tiny' code model as of version 4.9. Since the default 'small' code model requires 4 KB section alignment (which is undesirable for the XIP modules), revert GCC 4.7 and 4.8 to using the 'large' code model instead. Reported-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18569 6f19259b-4bc3-4df7-8a09-765794883524
2015-10-01BaseTools/ARM: move to unified GCC linker scriptArd Biesheuvel
Instead of using the ARM builtin linker script for GNU ld, use the new unified one instead. This will allow us to increase the section alignment for DXE_RUNTIME_MODULEs, which is a prerequisite for enabling the UEFIv2.5 Properties Table memory protection feature. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Michael Zimmermann <sigmaepsilon92@gmail.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18565 6f19259b-4bc3-4df7-8a09-765794883524
2015-09-24BaseTools/GenFw: disable RVCT linker size optimizationArd Biesheuvel
Disable the RVCT size optimization that may put sections at an offset that is not aligned to their own alignment, by adding the --no_legacyalign switch to the RVCT linker command line. This is necessary since such sections cannot be correctly converted into PE/COFF sections without padding them at the front, which defeats the purpose of the optimization anyway. With the optimization gone, we can also remove the special case for ARM in GenFw that could result in corrupt PE/COFF images to be emitted. Instead, sections whose base address is not aligned correctly are outright rejected. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18540 6f19259b-4bc3-4df7-8a09-765794883524
2015-09-24BaseTools/GenFw: remove ARM and RVCT references from ELF64 codeArd Biesheuvel
ARM and RVCT apply to 32-bit code only, so remove any references to them (including the workaround for the linker) from the 64-bit version of ElfConvert.c Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18539 6f19259b-4bc3-4df7-8a09-765794883524
2015-09-14BaseTools/Ecc: Remove checkpoint for STATIC modifierHess Chen
1. Fix a bug of removing the checkpoint for STATIC modifier 2. Fix a bug of parsing CONST variable Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hess Chen <hesheng.chen@intel.com> Reviewed-by: YangX Li <yangx.li@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18446 6f19259b-4bc3-4df7-8a09-765794883524
2015-09-11BaseTools/GenFw: align RVA of debugArd Biesheuvel
SVN commit r18077 ("BaseTools/GenFw: move .debug contents to .data to save space") removed the separate .debug section after moving its contents into .text or .data. However, this change does not take into account that some of these contents need to appear at a 32-bit aligned offset. So align the debug data RVA to 32 bits. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18443 6f19259b-4bc3-4df7-8a09-765794883524
2015-09-06Revert the change in r18404.Jeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18405 6f19259b-4bc3-4df7-8a09-765794883524
2015-09-06Update BaseTools binary to match main trunk r18339.Jeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18404 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-28BaseTools: Fixed bug for single FV generating.Yingke Liu
If -i is specified and this FV has no BlockSize defined, tool did not inherit FD's BlockSize. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Yingke Liu <yingke.d.liu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18339 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-27BaseTools:To generate string default type correctly in VfrCompilerDandan Bi
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18336 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-26BaseTools: Fix the missing depex file in GenFdsLiming Gao
If FDF FfsRule describes |.depex for depex file on source build, it may be missed in the generated FD image. GenFds tool needs to check the output file list and find the matched one. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Yingke Liu <yingke.d.liu@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18318 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-26BaseTools: Nested !include support in DSC and FDF filesCecil Sheng
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Cecil Sheng <cecil.sheng@hp.com> Reviewed-by: Samer El-Haj-Mahmoud <elhaj@hp.com> Reviewed-by: Yingke Liu <yingke.d.liu@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18317 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-24BaseTools: Update SetPcdPtr in AutoGen CodeLiming Gao
For patchable PCD, map SetPcdPtr() to LibPatchPcdSetPtrAndSize(), then the size of the updated VOID* value can be cached. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18272 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-24BaseTools: Fix AutoGen issue for Patchable VOID* PCD.Liming Gao
Patchable VOID* PCD set operation should map LibPatchPcdSetPtr() and LibPatchPcdSetPtrS() API. This has been done when PCD is used in driver, but not done when PCD is used in library. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18271 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-24BaseTools: Generate macro for the size of PCD valueBob Feng
PcdLib introduces new APIs to get the size of PCD value. BaseTools generates those macros in AutoGen code. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Bob Feng <bob.c.feng@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18270 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-24BaseTools: Add NULL pointer check in AutoGen codeLiming Gao
For DynamicEx PCD, if NULL pointer is specified as token space GUID, it will directly be used to compare GUID value in AutoGen code. To avoid access NULL pointer, NULL pointer will be checked first. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18267 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-24BaseTools/Ecc: Remove checkpoint for STATIC modifierHess Chen
Remove checkpoint for STATIC modifier to allow this usage Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hess Chen <hesheng.chen@intel.com> Reviewed-by: YangX Li <yangx.li@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18264 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-24BaseTools: Follow PI spec to update ExtendedSize in EFI_FFS_FILE_HEADER2Star Zeng
for FFS data above 16 bytes alignment requirement. PI spec requires FFS header to be at 8 bytes alignment to FV header. And, FFS data alignment requires the beginning of the file data must be aligned on a particular boundary, such as 1, 16, 128 bytes or above. If FFS data alignment requires to be above 16 bytes, and FFS header must be at 8 byte alignment, so FFS header size must be multiple of 8. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18262 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-21BaseTools: Fix build fail when the number in validlist is long type.Bob Feng
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Bob Feng" <bob.c.feng@intel.com> Reviewed-by: "Chen, Hesheng" <hesheng.chen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18256 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-20BaseTools AARCH64: use tiny code model by defaultArd Biesheuvel
The AARCH64 tiny code model produces more efficient code, since it uses relative symbol references rather than absolute references, i.e., an emitted relative reference refers to the symbol directly rather than a literal containing its 64-bit absolute address. This saves space in the binary, and reduces the number of relocation fixups that need to be applied by the PE/COFF loader. So now that we support relative relocations in GenFw, move to the tiny code model by default. Note that the large model can still be selected by individual modules by adding -mcmodel=large to the appropriate CC_FLAGS. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18242 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-18BaseTools: Add /arch:IA32 option in VS2012 and VS2013Liming Gao
VS2012 and VS2013 turn on optimizations by default that generate the use of CMOV instruction. This is a change from previous version VS2008. This means when you build with VS2012 or VS2013, it will generate UD exceptions on Quark. To resolve it, add /arch:IA32 options to not use enhanced instructions. https://msdn.microsoft.com/en-us/library/7t5yh4fd(v=vs.140).aspx Update the default options of VS2012 & VS2013 tool chain IA32 arch in BaseTools\Conf\tools_def.template to make sure the generated Quark compatibility driver. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18230 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-17BaseTools GCC: prevent unaligned memory accesses on ARM GCC 4.6Ard Biesheuvel
In GCC 4.7, a feature was added to the ARM backend that allows unaligned loads and stores to be emitted. Since it is enabled by default on ARMv6 and later CPUs, and since such code is not suitable in our case (i.e., bare metal code), we must disable it by passing the -mno-unaligned-access option if we are using GCC 4.7 or later. However, this particular feature and its enabling by default have been backported to version 4.6 by Linaro. Since the Linaro toolchains are widely used for ARM development, and also shipped by distros such as Ubuntu, we should disable the feature on version 4.6 as well. Unfortunately, since the upstream version does not support the feature, it also does not understand the -mno-unaligned-access option. Since GCC sets the builtin #define __ARM_FEATURE_UNALIGNED to 1 when -munaligned-access is in effect, we can force the build to fail in this case by passing -D__ARM_FEATURE_UNALIGNED=0 on the GCC command line. This will produce the following error message: <command-line>:0:0: error: "__ARM_FEATURE_UNALIGNED" redefined [-Werror] <built-in>:0:0: note: this is the location of the previous definition and terminate the build. This patch may cause some existing builds to fail, but they will be builds that were previously at risk of unexpected runtime exceptions. Those builds can also easily be switched to the GCC47 profile instead, generating safe binaries. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18228 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-13BaseTools IA32/X64: prevent .eh_frame sections from being generatedArd Biesheuvel
After the recent GNU linker script changes, the following warning is emitted many times during the OVMF build: BFD: <...>: warning: Empty loadable segment detected, is this intentional ? This is caused by the fact that, now that the section layout has changed somewhat, the .eh_frame section is assigned an ELF segment of its own, which ends up with no contents at all after we strip the .eh_frame section from the output. (Note that the program headers that contain the segment information are completely irrelevant to us since the PE/COFF conversion does not rely on them.) Since we only retain the .eh_frame data for external debugging, and not for things like stack unwinding or generating backtraces at runtime, we can remedy the situation by passing -fno-asynchronous-unwind-tables on the GCC command line. This option instructs the compiler to emit the unwind data into a debug section called .debug_frame instead of into .eh_frame. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Build-tested-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18217 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-12BaseTools: remove ARMGCC and ARMLINUXGCC toolchainsArd Biesheuvel
The ARMGCC and ARMLINUXGCC toolchains are specific to the ARM and AARCH64 architectures, and overlap with the toolchain configuration that is provided by the GCC44 - GCC49 toolchains, which are defined for all architectures. To reduce the maintenance burden, and make it easier to keep these different architectures aligned, remove the ARMGCC and ARMLINUXGCC toolchains entirely. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18212 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-12BaseTools: add ARCH detection for AARCH64 and ARMArd Biesheuvel
Add auto detection for the ARCH variable for AARCH64 and ARM systems. This allows us to do a native build of the BaseTools without the need to set ARCH externally. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18206 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-12BaseTools/GenFds: Fix 'NoneType' object is not iterable error.Qiu Shumin
When adding section VERSION in FDF file, for example: FILE FREEFORM = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile) { SECTION RAW = MdeModulePkg/Logo/Logo.bmp SECTION UI = "Logo" SECTION VERSION = "0001" } GenFds will report the following error: Traceback (most recent call last): File "GenFds.py", line 276, in main File "GenFds.py", line 391, in GenFd File "Fd.py", line 93, in GenFd File "Region.py", line 106, in AddToBuffer File "Fv.py", line 114, in AddToBuffer File "FfsFileStatement.py", line 117, in GenFfs File "VerSection.py", line 80, in GenSection File "GenFdsGlobalVariable.py", line 401, in GenerateSection TypeError: 'NoneType' object is not iterable. We found in GenFdsGlobalVariable.py line 401 'list' requires a iteralbe object as parameter while the 'Input' is None. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Qiu Shumin <shumin.qiu@intel.com> Reviewed-by: Yingke Liu <yingke.d.liu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18205 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-10BaseTools: add CLANG35 toolchain with AARCH64 supportArd Biesheuvel
This adds support for building the AARCH64 platforms using the Clang compiler and assembler combined with the GNU (cross-)linker. The chosen name CLANG35 is based on version 3.5 being the oldest supported version, but no issues are known that should prevent its use with any later version. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18198 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-10BaseTools/GenFw: allow AArch64 tiny and small code model relocationsArd Biesheuvel
The AArch64 small C model makes extensive use of ADRP/ADD and ADRP/{LDR,STR} pairs to emit PC-relative symbol references with a +/- 4 GB range. Since the relocation pair splits the relative offset into a relative page offset and an absolute offset into a 4 KB page, we need to take extra care to ensure that the target of the relocation preserves its alignment relative to a 4 KB alignment boundary. Also, due to a problem with the --emit-relocs GNU ld option, where it does not recalculate the addends for section relative relocations, the only way to guarantee correct code is by requiring the relative section offset to be equal in the ELF and PE/COFF versions of the binary. This affects both the 'tiny' and 'small' GCC code models. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18197 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-06BaseTools/Trim: Fixed a bug that cannot trim long valuesYingke Liu
The long value substitution must move to the front of HEX substitution, and updated build_rule to add --trim-long Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Yingke Liu <yingke.d.liu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18170 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-03BaseTools IA32/X64: Use GccBase.lds instead of gcc*-ld-scriptArd Biesheuvel
These scripts all now have the same contents, so we only need to use GccBase.lds. Therefore we can delete gcc-4K-align-ld-script, gcc4.4-ld-script and gcc4.9-ld-script. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18142 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-03BaseTools AARCH64: remove incremental linker script for 64K alignmentArd Biesheuvel
Now that we moved all users to the unified GCC linker script, remove the old 64 KB incremental linker script for AARCH64 since it is now unused. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18141 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-03BaseTools AARCH64: move to unified GCC linker scriptArd Biesheuvel
Drop the GCC AARCH64 specific linker script and use the new unified one instead. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18138 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-03BaseTools GCC: move AutoGen.obj contents to .text sectionArd Biesheuvel
All AutoGen.obj files consist of global GUID definitions, fixed and patchable PCDs and other data that is essentially read-only at runtime but has not been declared as such for various reasons. By moving these contents to .text we achieve two things: - global GUIDs and other data items which must be constant for correct program operation can no longer be modified, for instance, when running a DXE_RUNTIME_MODULE binary under the OS with the Properties Table feature for memory protection enabled; - the .data section becomes smaller, and may be dropped completely for many XIP modules, which reduces wasted FV space if the PE/COFF section alignment is large. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Liming Gao <liming.gao@intel.com> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18137 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-03BaseTools GCC: align start of .data to .text alignmentArd Biesheuvel
Now that GenFw honors the ELF section alignment when placing the PE/COFF sections in the output, the start of the PE/COFF version of .data will be aligned to the alignment of .text if its alignment is higher than the default. So duplicate this behavior in the ELF output, this will make the memory layout of the PE/COFF binary match the layout of the ELF version more closely. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Liming Gao <liming.gao@intel.com> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18136 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-03BaseTools GCC: add unified GCC linker script for all archs and versionsArd Biesheuvel
This unifies all GCC linker scripts into a single parametrised GCC linker script that can be used for all GCC versions and architectures. The two parameters that can be set on the linker command line are: - PECOFF_HEADER_SIZE, this is a build time property of GenFw, but its value is different between 32-bit and 64-bit; - common-page-size, this can be set using -z on the ld command line, and controls the value of the COMMONPAGESIZE constant when used in a linker script. This value is used for the minimum section alignment. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Liming Gao <liming.gao@intel.com> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18135 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-03BaseTools IA32/X64: get header size and alignment from ld commandlineArd Biesheuvel
Instead of hardcoding the values for the PE/COFF header size and the section alignment, set them on the linker command line. This factors out these values from the various linker scripts, which will allow us to unify them in a subsequent patch. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18134 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-03BaseTools IA32/X64: move .got contents to the PE/COFF .text sectionArd Biesheuvel
Move the .got contents to the PE/COFF .text section. This should be a no-op, since we typically don't generate position independent code (i.e., using -fPIC). But since the GOT contains variable addresses that are updated at relocation time only, its contents are best kept in .text to prevent them from being overwritten inadvertently. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18133 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-03BaseTools IA32/X64: drop redundant alignment from linker scriptArd Biesheuvel
There is no need to pad out the end of a section of the start of the following section is aligned to the same value. So drop the redundant ALIGN() statements. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18132 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-03BaseTools IA32/X64: move .rodata to PE/COFF .text sectionArd Biesheuvel
The .rodata ELF section contains constant non-executable data that should never be modified by the program itself. Since the risk of inadvertent modification is typically higher than the risk of inadvertent execution, it makes sense to put this data in the R-X .text section rather than in the RW- .data section. So move it there. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18131 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-03BaseTools IA32/X64: remove NOP padding from X86/IA32 GCC linker scriptsArd Biesheuvel
The NOP padding in the GCC linker scripts ensures that all empty regions in the ELF binary are filled with x86 NOP instructions. There is no upside to doing this: if the CPU ends up executing these instructions, we have little hope of resuming normal execution of the program anyway. And having NOP slides in memory only makes it easier for attackers to launch exploits. So remove them. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18130 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-28BaseTools: Add a keyword FvNameString in FDFYingke Liu
The keyword with value TRUE OR FALSE is used to indicate whether the FV UI name is included in FV EXT header as a entry or not. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Yingke Liu <yingke.d.liu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18090 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-27BaseTools/GenFv: optimize away redundant paddingArd Biesheuvel
To prevent double padding of XIP modules leading to excessive waste of FV space, try to adjust existing padding rather than adding more. Instead of adding a pad file to the FV to line up an FFS file that itself may contain padding to line up the payload, try to find a dedicated padding section inside the FFS, and reduce its size to place all subsequent aligned FFS section at their respective minimum alignments. When using 4 KB section alignment (which is required on AARCH64 in some cases), this will save 4 KB for each XIP module. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Yingke Liu <yingke.d.liu@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18080 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-27BaseTools: use GUID identifiable section for FFS alignment paddingArd Biesheuvel
Instead of using an anonymous section of type EFI_SECTION_RAW to pad out the first aligned FFS section to its required alignment, use a section with a dedicated GUID if the size of the padding permits it. This allows for more flexibility when placing such FFS images in a firmware volume, because we will now be able to remove padding rather than add more, by shrinking the size of this section instead of padding out the start of the FFS image to file alignment. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Yingke Liu <yingke.d.liu@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18079 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-27BaseTools/GenFw: move PE/COFF header closer to payloadArd Biesheuvel
The secondary header (not the DOS header) of a PE/COFF binary does not reside at a fixed offset. Instead, its offset into the file is recorded in the DOS header. This gives us the flexibility to move it, along with the section headers, to right before the first section if there is considerable space before it, i.e., when the PE/COFF file alignment is substantially larger than the size of the header. Since the PE/COFF to TE conversion replaces everything before the section headers with a simple TE header, this change removes all the header padding from such images, leading to smaller files. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Yingke Liu <yingke.d.liu@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18078 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-27BaseTools/GenFw: move .debug contents to .data to save spaceArd Biesheuvel
In order to reduce the memory footprint of PE/COFF images when using large values for the PE/COFF section alignment, move the contents of the .debug section to data, and point the debug data directory entry to it. This allows us to drop the .debug section entirely, as well as any associated rounding. Since our .debug section only contains the filename of the ELF input image, the penalty of keeping this data in a non-discardable section is negligible. Note that the PE/COFF spec v6.3 explicitly mentions that this is allowed. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Yingke Liu <yingke.d.liu@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18077 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-26BaseTools: Make AutoGen.h array declaration match AutoGen.c definitionScott Duplichan
When a quoted string is used as initialization data in a DEC file PCD entry, the PCD data type in that entry must be VOID*. The created AutoGen.c defines the PCD data as UINT8[] or UINT16[], depending on the string type. The created AutoGen.h, however, declares the PCD data as VOID*. For a standard compile/link, this works because AutoGen.c doesn't include AutoGen.h. But when GCC LTO is used, the link time code generation detects the mismatch and the build fails. This change makes the AutoGen.h PCD data declaration match the AutoGen.c definition. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-by: Yingke Liu <yingke.d.liu@intel.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18058 6f19259b-4bc3-4df7-8a09-765794883524