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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
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When there is no bridge before the HPC (hot plug controller),
the issue cannot be seen.
But when there are bridges before the HPC, the PciBus will only
use the value (= <CurrentBusNumber> + <ReservedBusNumber>) as the
sub-ordinary bus number for HPC.
The correct sub-ordinary bus number should be:
<CurrentBusNumber> + <OccupiedBusNumber>(by earlier bridges) +
<ReservedBusNumber>.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
(cherry picked from commit f6830005bb1a2fc225c89cdb1367b5058e939acc)
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For a hot plug bridge with device attached, PciBusDxe driver reserves
the resources which equal to the total amount of padding resource
returned from HotPlug->GetResourcePadding() and the actual occupied
resource by the attached device. The behavior is incorrect.
Correct behavior is to reserve the bigger one between the padding
resource and the actual occupied resource.
(Sync patch r18719 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18822 6f19259b-4bc3-4df7-8a09-765794883524
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The resource dumping logic contains a bug which cannot dump the
resource for hot plug controller correctly. The patch fixes this
bug.
(Sync patch r18718 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18821 6f19259b-4bc3-4df7-8a09-765794883524
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Certain PCI device may have capability pointing to itself.
Update LocateCapabilityRegBlock() to break when detecting such loop.
(Sync patch r18473 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18475 6f19259b-4bc3-4df7-8a09-765794883524
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According to the PCI spec, when software writes all-one to BAR for size probing,
the value read back should be 0b1...10...0 after masking the BAR type bits.
But in real world, it's possible that certain device returns 0b0...01...10...0
for MEM64 BAR size probing: some bits in the high 32bit may be 0.
PciBus driver has the code to handle such case. However, it doesn't handle the
case that the high 32bit is totally 0. The patch is to handle the special case.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18114 6f19259b-4bc3-4df7-8a09-765794883524
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The logic in an if statement in PciIo is too complex and hard to understand
and make VS2015 build failure. The fix simplifies the logic.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18109 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17532 6f19259b-4bc3-4df7-8a09-765794883524
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LocatePciExpressCapabilityRegBlock () doesn't check the return status of Pci.Read().
Certain platform's PciRootBridge.Pci.Read() doesn't support PCIE access causing the CapabilityEntry not updated.
If the uninitialized CapabilityEntry equals to a big enough initial value, the while-loop will never end.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17513 6f19259b-4bc3-4df7-8a09-765794883524
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"ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationQemu.dsc" references
these drivers:
- Pci/PciBusDxe
- Pci/EhciDxe
- Pci/UhciDxe
- Usb/UsbBusDxe
- Usb/UsbKbDxe
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16916 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Chao B Zhang <chao.b.zhang@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16625 6f19259b-4bc3-4df7-8a09-765794883524
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module UNI files.
1. Module UNI and Package UNI files are not DOS format. Convert them to DOS format.
2. Remove unused SectionExtractionDxeModStrs.uni and SectionExtractionPeiModStrs.uni
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gao, Liming <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16044 6f19259b-4bc3-4df7-8a09-765794883524
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2. Add MODULE_UNI_FILE file that contains the localized Abstract and Description of a module.
a. Addresses an information gap between INF files and the UEFI Distribution Packaging Specification XML schema
b. There will be an associated update to UPT in BaseTools to consume MODULE_UNI_FILE and associated UNI file during UDP creation that performs the INF -> XML conversion.
c. There will be an associated update to UPT in BaseTools to produce MODULE_UNI_FILE and associated UNI file during UDP installation that performs the XML -> INF conversion.
3. Add Module Extra UNI file that provides the localized Name of a module.
a. [UserExtensions.TianoCore."ExtraFiles"] provides an easy method for a module to specify extra files not listed in [Sources] or [Binaries] sections to be added to a UDP without having to list the files in the UPT package information data file.
b. There will be an associated update to UPT in BaseTools to package up files listed in [UserExtensions.TianoCore."ExtraFiles"] during UDP creation.
c. UNI file contains localized name of a module to go along with the localized Abstract and Description from the MODULE_UNI_FILE.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Zeng, Star <star.zeng@intel.com>
Reviewed-by: Gao, Liming <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15963 6f19259b-4bc3-4df7-8a09-765794883524
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1. Usage information in INF file comment blocks are either incomplete or incorrect.
This includes usage information for Protocols/PPIs/GUIDs/PCDs/HOBs/Events/BootModes.
The syntax for usage information in comment blocks is defined in the EDK II Module Information (INF) Specification
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Zeng, Star <star.zeng@intel.com>
Reviewed-by: Gao, Liming <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15962 6f19259b-4bc3-4df7-8a09-765794883524
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2) replace StrCpy() usage in Variable driver with StrnCpy().
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15770 6f19259b-4bc3-4df7-8a09-765794883524
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creation) of PciIoDevice->DevicePath. The bug can be triggered when
PciBusDxe is built into OVMF, with qemu/KVM device assignment of
a PCI-express device on the default 440FX machine type. OVMF
correctly discovers that the device is PCIe and begins probing
extended configuration space for the device. The root bridge
has no way to access extended config space and correctly errors,
sending us into the error reporting chain seen below. It's
possible that this error path could also be reproduced on physical
hardware when a PCI-to-PCIe bridge is present.
GatherDeviceInfo() | GatherPpbInfo() | GatherP2CInfo() [MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c]
CreatePciIoDevice() [MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c]
AllocateZeroPool()
LocateCapabilityRegBlock() [MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c]
PciIoDevice->IsPciExp = TRUE
LocatePciExpressCapabilityRegBlock() [MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c]
PciIoConfigRead() via funcptr [MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c]
RootBridgeIoPciRead() via funcptr [PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c]
FAILS
REPORT_STATUS_CODE_WITH_DEVICE_PATH() [MdePkg/Include/Library/ReportStatusCodeLib.h]
ReportStatusCodeWithDevicePath() [MdeModulePkg/Library/DxeReportStatusCodeLib/ReportStatusCodeLib.c]
ASSERT (DevicePath != NULL) <--+
CreatePciDevicePath() | [MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c]
sets PciIoDevice->DevicePath ----------+
In English:
- CreatePciIoDevice() allocates a zeroed out PCI_IO_DEVICE structure.
- PciIoConfigRead() tries to access the (extended) config space, and
fails.
- PciIoConfigRead() wants to report a status code (read error) for the
device path.
- Unfortuantely, PciIoDevice->DevicePath is still NULL at that point.
- The ASSERT() in ReportStatusCodeWithDevicePath() fires.
Fix it by moving CreatePciDevicePath() into CreatePciIoDevice(),
allowing PciIoDevice->DevicePath to be initialized before we
begin probing the device capabilities:
GatherDeviceInfo() | GatherPpbInfo() | GatherP2CInfo() [MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c]
CreatePciIoDevice() [MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c]
AllocateZeroPool()
CreatePciDevicePath() [MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c]
sets PciIoDevice->DevicePath -----------+
LocateCapabilityRegBlock() | [MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c]
PciIoDevice->IsPciExp = TRUE |
LocatePciExpressCapabilityRegBlock() | [MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c]
PciIoConfigRead() via funcptr | [MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c]
RootBridgeIoPciRead() via funcptr | [PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c]
FAILS |
REPORT_STATUS_CODE_WITH_DEVICE_PATH() | [MdePkg/Include/Library/ReportStatusCodeLib.h]
ReportStatusCodeWithDevicePath() | [MdeModulePkg/Library/DxeReportStatusCodeLib/ReportStatusCodeLib.c]
ASSERT (DevicePath != NULL) <-----+
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15567 6f19259b-4bc3-4df7-8a09-765794883524
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even it's below 6 to follow the UEFI Spec.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15535 6f19259b-4bc3-4df7-8a09-765794883524
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Platforms such as Xen already enumerates PCI bridges and devices. Use
this PCD to control EDK2 behavior.
PcdPciDisableBusEnumeration is placed under [PcdsFixedAtBuild,
PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx], so that it is
possible to alter it during runtime.
The default setting of this PCD is false (allow full PCI enumeration) to
preserve the same behavior before this change.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14940 6f19259b-4bc3-4df7-8a09-765794883524
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the PCI host bridge handle to follow PI Spec 1.3.
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Elvin Li <elvin.li@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14553 6f19259b-4bc3-4df7-8a09-765794883524
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ConvertDevicePathNodeToText, ConvertTextToDevicePath and ConvertTextToDeviceNode APIs in DevicePathLib.
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Elvin Li <elvin.li@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14505 6f19259b-4bc3-4df7-8a09-765794883524
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the PCI Bus driver through the function call NotifyPhase().
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14483 6f19259b-4bc3-4df7-8a09-765794883524
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the PCI to PCI bridge.
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Elvin Li <elvin.li@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14318 6f19259b-4bc3-4df7-8a09-765794883524
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RemovedPciDev array.
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Elvin Li <elvin.li@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14140 6f19259b-4bc3-4df7-8a09-765794883524
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the PciBus driver.
Signed-off-by: Ruiyu Ni<ruiyu.ni@intel.com>
Reviewed-by: Elvin Li<elvin.li@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14043 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Li Elvin <elvin.li@intel.com>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
Reviewed-by: Ni Ruiyu <ruiyu.ni@intel.com>
Reviewed-by: Gao Liming <liming.gao@intel.com>
Reviewed-by: Tian Feng <feng.tian@intel.com>
Reviewed-by: Fan Jeff <jeff.fan@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13890 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Ruiyu Ni<ruiyu.ni@intel.com>
Reviewed-by: Elvin Li<elvin.li@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13863 6f19259b-4bc3-4df7-8a09-765794883524
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the ROM content from PCI device to memory to avoid re-parsing the ROM image to check the EFI Option ROM.
Signed-off-by: Ruiyu Ni<ruiyu.ni@intel.com>
Reviewed-by: Elvin Li<elvin.li@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13707 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Sun Rui <rui.sun@intel.com>
Reviewed-by: Gao Liming <liming.gao@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13686 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Ruiyu Ni<ruiyu.ni@intel.com>
Reviewed-by: Rui Sun<rui.sun@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13673 6f19259b-4bc3-4df7-8a09-765794883524
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ResetPowerManagementFeature() to clear 4 related R/W bits in the PMCSR register, leaving other bits preserved.
Signed-off-by: Sun Rui <rui.sun@intel.com>
Reviewed-by: Fan Jeff <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13189 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: rsun3
Reviewed-by: geekboy15a
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13095 6f19259b-4bc3-4df7-8a09-765794883524
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precision" warning.
Signed-off-by: rsun3
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12978 6f19259b-4bc3-4df7-8a09-765794883524
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supports 64-bit prefetchable base and limit addresses.
Signed-off-by: rsun3
Reviewed-by: mdkinney
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12975 6f19259b-4bc3-4df7-8a09-765794883524
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EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO and EFI_PCI_IO_ATTRIBUTE_VGA_IO attributes to follow the UEFI spec.
Signed-off-by: rsun3
Reviewed-by: niruiyu
Reviewed-by: mdkinney
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12891 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: rsun3
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12606 6f19259b-4bc3-4df7-8a09-765794883524
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PCI bus ranges for a PCI root bridge.
Signed-off-by: rsun3
Reviewed-by: vanjeff
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12600 6f19259b-4bc3-4df7-8a09-765794883524
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EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE attribute for a PCI device.
Signed-off-by: rsun3
Reviewed-by: mdkinney
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12545 6f19259b-4bc3-4df7-8a09-765794883524
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Option ROM image.
* Check if the machine type of the image is supported by the current UEFI system.
* Ignore the image if it is an EFI application as required by the UEFI spec.
Signed-off-by: rsun3
Reviewed-by: li-elvin
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12465 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: niruiyu
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12095 6f19259b-4bc3-4df7-8a09-765794883524
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enumeration.
Signed-off-by: niruiyu
Reviewed-by: rsun3
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12087 6f19259b-4bc3-4df7-8a09-765794883524
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valid/invalid.
Signed-off-by: niruiyu
Reviewed-by: lgao4
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11987 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: niruiyu
Reviewed-by: rsun3
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11858 6f19259b-4bc3-4df7-8a09-765794883524
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git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11381 6f19259b-4bc3-4df7-8a09-765794883524
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git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11223 6f19259b-4bc3-4df7-8a09-765794883524
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driver/PCI host bridge drivers/LPC/VGA device drivers.
1. Fix the incorrect definition of EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 (does not conform to the UEFI spec) in PciIo.h.
2. Add missing definitions of ISA and VGA IO attributes in PCI Root Bridge IO protocol.
3. Improve the algorithm in the PCI bus driver to get PCI platform policy from PCI Platform Protocol and PCI Override Protocol.
4. Update the PCI bus driver to use the PCI platform policy to determine the supported attributes that are returned by the EFI_PCI_IO_PROTOCOL.Attributes() function. This is required by the PI spec.
5. Add a backward compatibility workaround for PCI VGA drivers in Option ROM, which typically sets VGA_IO without checking supported attributes.
6. Update the PCI host bridge driver in PcAtChipsetPkg to report VGA_IO_16 and ISA_IO_16 instead of VGA_IO/ISA_IO attributes. Modern chipsets don’t have hardware capability to control 10-bit or 16-bit decoding for ISA/VGA aliases.
7. Update LPC/VGA device drivers to check supported attributes of VGA_IO/VGA_IO_16 or ISA_IO/ISA_IO_16.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11204 6f19259b-4bc3-4df7-8a09-765794883524
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EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM, because these attributes are only for PCI IO, while not supported by PCI Root Bridge IO.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11165 6f19259b-4bc3-4df7-8a09-765794883524
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EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM attribute of PCI IO. Per UEFI spec, this attribute is used to determine if the ROM image is from the ROM BAR or from a platform specific location.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11159 6f19259b-4bc3-4df7-8a09-765794883524
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that some HPCs in the list are not found during PCI enumeration. In this case, the PCI HotPlug Init Protocol.InitializeRootHpc() will not be called for the un-found HPCs. However, in AllRootHPCInitialized(), all reported HPCs are checked to see if it has been initialized, so TIME_OUT happens.
This check-in fix the issue by adding a flag to indicate if a HPC is found during PCI enumeration or not. This check-in also adds a debug message if any found HPC failed with initialization.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11081 6f19259b-4bc3-4df7-8a09-765794883524
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multiplied by 1, which will leave Count unchanged.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11043 6f19259b-4bc3-4df7-8a09-765794883524
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git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11020 6f19259b-4bc3-4df7-8a09-765794883524
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