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2016-08-03MdeModulePkg/UsbMass: Not retry if usb bot transfer execution failFeng Tian
The retry mechanism will bring issue if the usb device is unplugged from XHCI HC but s/w is trying to access it through BlockIo. The current cmd will get device error return status, but the sequential cmds will be timeout. This behavior will cause system unresponsive for a long while and bring bad user experience. So we break the retry loop if found device error. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com>
2016-08-03MdeModulePkg: add generic SataController driver.Feng Tian
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Amy Chan <amy.chan@intel.com>
2016-07-25MdeModulePkg/XhciDxe: fix a bug on TRB check in async int transferFeng Tian
The last TRB in transfer ring is a LINK type TRB, which shouldn't be accounted as a valid item in IsAsyncIntTrb(). Without this fix, the original algo will bring issue on those URBs whose TRBs crosses the transfer ring. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
2016-07-25MdeModulePkg/UsbBus: reduce the port status polling before port resetFeng Tian
This change is used to remove the port status polling in port reset functions. Why it's needed is because: 1) The same polling on same port has taken place prior to this removed one. See UsbEnumeratePort()->GetPortStatus(). So this polling in UsbEnumerateNewDev()->ResetPort() is redundant. 2) EDKII Xhci driver hooks all GetPortStatus() operations. If we don't remove this one, XHCI driver's XhcPollPortStatusChange() may enter twice in reset process and wrongly think the device is unplugged. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
2016-07-25MdeModulePkg/UsbBus: remove redundant host controller reset in UsbBusFeng Tian
The Host Controller reset has been done at EDKII UHCI/EHCI/XHCI, The original code will do twice host controller initialization which is unnecessary. It also bring issues on some USB HCs. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
2016-07-18MdeModulePkg/PciHostBridgeDxe: fix Ia32 GCC44 build errorLaszlo Ersek
> cc1: warnings being treated as errors > MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c: > In function 'GetProposedResources': > MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c:1388: > error: integer constant is too large for 'long' type Append a ULL suffix to the replacement text of PCI_RESOURCE_LESS that is aligned with the style of the EFI_RESOURCE_SATISFIED and EFI_RESOURCE_NOT_SATISFIED macros. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-07-13MdeModulePkg/PciBusDxe: recognize hotplug-capable PCIe portsLaszlo Ersek
Section 7.8.2 of the PCI Express specification (r4.0 v0.3), entitled "PCI Express Capabilities Register (Offset 02h)", and section 7.8.9 "Slot Capabilities Register (Offset 14h)" of the same, describe the conditions when a PCIe port should be considered "supporting hotplug": - it should be a root complex port or a switch downstream port, and - it should have the "Slot Implemented" bit set in the Express Capabilities Register, and - it should have the "Hot-Plug Capable" bit set in the Slot Capabilities Register. The first two sub-conditions are already implemented in at least two open source projects I could find: - in SeaBIOS by Marcel Apfelbaum: "hw/pci: reserve IO and mem for pci express downstream ports with no devices attached" <https://code.coreboot.org/p/seabios/source/commit/3aa31d7d6375>, - in edk2 itself, in the implementation of the "PCI" UEFI Shell command: see the "PcieExplainTypeSlot" case label in function PciExplainPciExpress(), file "ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c". PciBusDxe recognizes such PCIe ports as bridges, but it doesn't realize they support hotplug. In turn PciBusDxe omits getting any resource padding information from the platform's EFI_PCI_HOT_PLUG_INIT_PROTOCOL for these bridges: GatherPpbInfo() [PciEnumeratorSupport.c] GetResourcePaddingPpb() [PciResourceSupport.c] GetResourcePaddingForHpb() [PciHotPlugSupport.c] IsPciHotPlugBus() [PciHotPlugSupport.c] // // returns FALSE // // // the following is not reached: // gPciHotPlugInit->GetResourcePadding() Implement a function called SupportsPcieHotplug() for identifying such ports, and call it from IsPciHotPlugBus() (after the call to IsSHPC()). Cc: "Johnson, Brian J." <bjohnson@sgi.com> Cc: Alex Williamson <alex.williamson@redhat.com> Cc: Andrew Fish <afish@apple.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ruiyu Ni <Ruiyu.ni@intel.com>
2016-07-13MdeModulePkg/PciBusDxe: look for the right capability in IsSHPC()Laszlo Ersek
The PCI Hot Plug capability register block is marked with capability ID 0x0C (EFI_PCI_CAPABILITY_ID_SHPC), not 0x06 (EFI_PCI_CAPABILITY_ID_HOTPLUG). This bug prevents PciBusDxe from recognizing whether a PCI-to-PCI bridge supports hotplug. In turn the platform's EFI_PCI_HOT_PLUG_INIT_PROTOCOL is not consulted for resource padding information: GatherPpbInfo() [PciEnumeratorSupport.c] GetResourcePaddingPpb() [PciResourceSupport.c] GetResourcePaddingForHpb() [PciHotPlugSupport.c] IsPciHotPlugBus() [PciHotPlugSupport.c] IsSHPC() [PciHotPlugSupport.c] // // returns FALSE // // // the following is not reached: // gPciHotPlugInit->GetResourcePadding() Look for the correct capability ID. Cc: "Johnson, Brian J." <bjohnson@sgi.com> Cc: Alex Williamson <alex.williamson@redhat.com> Cc: Andrew Fish <afish@apple.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ruiyu Ni <Ruiyu.ni@intel.com>
2016-07-12MdeModulePkg AtaBusDxe: Fix ATA commands cannot be sent to some devicesHao Wu
If there is no port multiplier (PortMultiplierPort = 0xFFFF), current code in functions TransferAtaDevice() and TrustTransferAtaDevice() will always set the DEV bit of the ATA device register. It causes that ATA commands cannot be sent to some ATA hard drives. Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-07-11MdeModulePkg: Fix typos in comments and variablesGiri P Mudusuru
- abstrated to abstracted - accessibla to accessible - addres to address - apropriate to appropriate - arry to array - availabe to available - avaliable to available - becasue to because - correponding to corresponding - etablished to established - exeuction to execution - extensiable to extensible - fileds to fields - loadding to loading - ptototypes to prototypes - prococol protocol - requried to required - resoruce to resource - runing to running - uild to build Cc: Star Zeng <star.zeng@intel.com> Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-07-11MdeModulePkg SdBlockIoPei: Initialize 'SwitchResp' elements before usingHao Wu
The commit makes sure that the elements in array 'SwitchResp' get initialized before being used. Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-07-01MdeModulePkg/EmmcDxe: Don't expose BlockIo interface for RPMB partitionFeng Tian
This change is to avoid UEFI SCT failure as UEFI SCT has no knowledge about how to accessing a EMMC RPMB partition. The user needs to access RPMB partition should get access through EFI_SD_MMC_PASS_THRU protocol with authentication key & mac. Cc: Hao Wu <hao.a.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2016-07-01MdeModulePkg/SdMmc: update TPL to notify to fix UEFI SCT hangFeng Tian
We have to upgrade the TPL level used by SdMmc stack because the following flow: DiskIo2ReadWriteDisk() in logical partition -> PartitionReadBlocksEx() in logical partition at TPL callback level -> ProbeMediaStatusEx() with sync request -> DiskIo2ReadWriteDisk() in physical partition -> waiting for async task completion. if the low layer driver doesn't run at TPL_NOTIFY level, it will have no time to trigger async task and cause system hang. Cc: Hao Wu <hao.a.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2016-06-29MdeModulePkg/XhciDxe:Fix usb desc length check logicFeng Tian
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Evgeny Yakovlev <insoreiges@gmail.com>
2016-06-29MdeModulePkg/UsbBusDxe: Fixed USB descriptor length checkEvgeny Yakovlev
According to spec if the length of a descriptor is smaller than what the specification defines, then the host shall ignore it. However if the size is greater than expected the host will ignore the extra bytes and start looking for the next descriptor at the end of actual length returned. Original check did not handle the latter case correctly and only allowed descriptors with lengths exactly as defined in specification. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Evgeny Yakovlev <insoreiges@gmail.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-06-24MdeModulePkg: SdMmc: Add delay before eMMC resetJoe Zhou
This delay is necessary for eMMC reset to working properly. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Joe Zhou <shjzhou@marvell.com> Signed-off-by: Marcin Wojtas <mw@semihalf.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-06-24MdeModulePkg: SdMmc: Fix parameters order in EmmcSwitch functions callJoe Zhou
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Joe Zhou <shjzhou@marvell.com> Signed-off-by: Jan Dabros <jsd@semihalf.com> Signed-off-by: Marcin Wojtas <mw@semihalf.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-06-22MdedulePkg: AtaAtapiPassThru: Remove polling on PxCMD.FR flag settingJan D?bro?
It is enough to set PxCMD.FRE bit, which cause HBA to post received FISes into the FIS receive area. According to AHCI Specification, only polling on PxCMD.FRE to be cleared is necessary, when it is needeed to stop FIS engine (eg. in order to change PxCMD.FB address). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jan Dabros <jsd@semihalf.com> Signed-off-by: Marcin Wojtas <mw@semihalf.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-06-21MdeModulePkg: Replace UnicodeStrToAsciiStr/AsciiStrToUnicodeStrStar Zeng
It is the follow up of 3ab41b7a325ca11a12b42f5ad1661c4b6791cb49 to replace UnicodeStrToAsciiStr/AsciiStrToUnicodeStr with UnicodeStrToAsciiStrS/AsciiStrToUnicodeStrS. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
2016-06-07MdeModulePkg/AtaBusDxe: Fix some ATA hard drives cannot be discoveredCinnamon Shia
If there is no multiplier, the DEV bit of the ATA device register would always be set. It causes that some ATA hard drives don't response the ATA identity command sent to them. Below is the description about DEV bit in ATA spec: A device is selected when the DEV bit of the Device register is equal to the device number assigned to the device by means of a Device 0/Device 1 jumper or switch, or use of the CSEL signal. Below is the description about DEV bit in SATA spec: When the DEV bit in the Device register is set to one, selecting the non-existent Device 1, the host adapter shall respond to register reads and writes as specified for a Device 0 with no Device 1 present, as defined in the ATA/ATAPI-5 standard. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Cinnamon Shia <cinnamon.shia@hpe.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2016-06-02MdeModulePkg NvmExpressDxe: Fix invalid queue size when creating IO queuesHao Wu
The Maximum Queue Entries Supported (MQES) field in the CAP (Controller Capabilities) register for a NVMe controller restrict the maximum individual queue size that the controller supports. The origin code does not check this value and always uses a hardcode value when creating I/O submission/completion queues for asynchronous transmission. The hardcode value might be larger than the MQES field, this will lead to an 'Invalid Queue Size' error when creating I/O submission/completion queues. The patch will add checks to make sure proper queue size is passed when creating I/O submission/completion queues. Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@Intel.com>
2016-05-27MdeModulePkg: Move/Replace NvmExpressHci.h definitions to Nvme.h.Darbin Reyes
Move NvmExpressHci.h definitions to a public industry standard header in MdePkg. The NvmExpressHci.h contains definitions based on the NVMe v1.1 specification. These definitions should be in a public header so that clients of the NVMe passthru protocol can use them to execute NVMe commands. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Darbin Reyes <darbin.emm.reyes@hpe.com> Reviewed-by: Samer El-Haj-Mahmoud <samer.el-haj-mahmoud@hpe.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-05-26MdeModulePkg NvmExpressDxe: Fix VS2010 build errorHao Wu
Potentially uninitialized 'Status' might be returned in functions NvmeCreateIoCompletionQueue() and NvmeCreateIoSubmissionQueue() in file NvmExpressHci.c. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Qiu Shumin <shumin.qiu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-05-24MdeModulePkg/PciHostBridgeDxe: Fix VS tool chain build failureRuiyu Ni
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Shumin Qiu <shumin.qiu@intel.com>
2016-05-24MdeModulePkg/PciHostBridgeDxe: Add CpuArch protocol dependencyRuiyu Ni
The driver entry point calls gDS->SetMemorySpaceAttributes(). This interface may return EFI_NOT_AVAILABLE_YET when CPU Arch protocol is not available. So we need to list CpuArch protocol in its INF dependency section. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-05-23MdeModulePkg/PciBus: do not improperly degrade resourceRuiyu Ni
PciBus driver originally always degrade (64->32) the MMIO resource for PCI BAR when the PCI device contains option ROM. But the degrade causes the PCI device can only use resource below 4GB which makes the resource allocation fails when the PCI device wants very big MMIO. The patch follows the PI spec (ECR 1529) to honor the granularity setting for PCI BAR from IncompatiblePciDeviceSupport so that even for PCI device which contains option ROM, the degrade doesn't happen if IncompatiblePciDeviceSupport returns 64 as granularity. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Tested-by: Laszlo Ersek <lersek@redhat.com>
2016-05-23MdeModulePkg/PciBus: Use shorter global variable nameRuiyu Ni
Remove "Efi" from gEfiIncompatiblePciDeviceSupport to shorten the global variable name. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Tested-by: Laszlo Ersek <lersek@redhat.com>
2016-05-23MdeModulePkg/PciBus: Remove unused fields in PCI_BARRuiyu Ni
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Tested-by: Laszlo Ersek <lersek@redhat.com>
2016-05-23MdeModulePkg/PciBus: use better name for local variables.Ruiyu Ni
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Tested-by: Laszlo Ersek <lersek@redhat.com>
2016-05-20MdeModulePkg ScsiDiskDxe: Add Erase Block Protocol support for UFS devicesHao Wu
This patch implements the EFI_ERASE_BLOCK_PROTOCOL in ScsiDiskDxe driver. For now, the codes support the erase block feature only on Universal Flash Storage (UFS) devices. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-05-19MdeModulePkg NvmExpressDxe: Add BlockIo2 supportHao Wu
Together with EFI_BLOCK_IO_PROTOCOL, EFI_BLOCK_IO2_PROTOCOL is also produced on NVMe devices. The following Block I/O 2 functions are implemented: Reset ReadBlocksEx WriteBlocksEx FlushBlocksEx Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-05-18MdeModulePkg: Skip invalid bus number scanning in PciBusDxe driverMa, Maurice
When PcdPciDisableBusEnumeration is enabled, the PciBus driver might get into a dead loop if the secondary bus register on PCI bridge is not programmed or programmed improperly. Adding this check to avoid any potential dead loop caused by this. Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Lee Leahy <Leroy.p.leahy@intel.com>
2016-05-12MdeModulePkg AtaAtapiPassThru: Fix incorrect parameter description commentHao Wu
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-05-12MdeModulePkg Ata: Use the new (incompatible) PortMultiplierPort semanticsHao Wu
The Mantis ticket 1353 <https://mantis.uefi.org/mantis/view.php?id=1353> and Mantis ticket 1472 <https://mantis.uefi.org/mantis/view.php?id=1472> updated the description of the port multiplier port number parameter in SATA Device Path Node and ATA Pass-Through Protocol. Now, this parameter should be set to 0xFFFF instead of 0 to indicate that an ATA device is directly attached on the controller port. Please note that this is an incompatible change. The consumer of SATA device path or ATA_PASS_THRU needs to re-examine its usage to follow UEFI 2.5 mantis 1353 and 1472. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-05-12MdeModulePkg/UsbMouseAbsolutePointerDxe: fix VS2015 NOOPT build errorFeng Tian
Cc: Shumin Qiu <shumin.qiu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Shumin Qiu <shumin.qiu@intel.com>
2016-05-11MdeModulePkg/PciHostBridgeDxe: Honor ResourceAssignedRuiyu Ni
Change PciHostBridgeDxe driver to not install the PciHostBridgeResourceAllocation protocol and let PciRootBridgeIo.Configuration() return the correct PCI resource assignment information when the ResourceAssigned is TRUE. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2016-05-11MdeModulePkg/PciHostBridgeDxe: Fix a Base/Limit comparing bugRuiyu Ni
When the aperture base equals to aperture limit, the old code treats the aperture as non-existent. It's not correct because it indicates a range starting with base and the length is 1. The new code corrects the comparing bug. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2016-05-11MdeModulePkg/PciHostBridgeDxe: Don't miss prefetchable MMIO apertureRuiyu Ni
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2016-05-10MdeModulePkg/PciSioSerialDxe: Do not flush the UARTRuiyu Ni
The patch aligns to the IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe driver not flush the UART in Reset() and SetAttributes() function. It was found the flush causes hang on certain PCI serial devices. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Eric Jin <eric.jin@intel.com>
2016-05-09MdeModulePkg/Sd: add Erase Block support on sd/emmc deviceFeng Tian
It's done by producing EFI_ERASE_BLOCK_PROTOCOL protocol instance. Cc: Hao Wu <hao.a.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2016-05-06MdeModulePkg/SdMmcPciHcDxe: Check SD's supported bus mode before switchFeng Tian
Before switch to a bus mode, we need check if the SD device supports this bus mode. Cc: Wu, Hao A <hao.a.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com>
2016-05-06MdeModulePkg/SdMmcPciHcDxe: Error handling enhance on tuning procedureFeng Tian
Enhance the code to reset tuning circuit when tuning error case happens. Cc: Wu, Hao A <hao.a.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com>
2016-05-06MdeModulePkg/SdMmcPciHcDxe: Using PIO rather than DMA for clock tuningFeng Tian
The original code is using ADMA mode to do clock tuning procedure. It may have problem on some SD/MMC host controllers as there is no way to know when to send next tuning cmd. Update it to PIO mode to strictly follow SD Host Controller Simplified Specification 3.0 Figure 2-29. By this way, if the Buffer Read Ready interrupt is set, we could know it's ok to send the next clock tuning cmd. Cc: Wu, Hao A <hao.a.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com>
2016-05-06MdeModulePkg/SdMmcPciHcDxe: Use BaseClk if the target clock is largerFeng Tian
The original code has a bug to calculate which clock freq should be used when the target clock freq is larger than the BaseClock Freq provided by the system. Cc: Wu, Hao A <hao.a.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com>
2016-05-06MdeModulePkg/SdMmcPciHcDxe: break cmd exec if the card isn't identifiedFeng Tian
Check if the card is identified/initialized correctly. if not, break the following cmd execution through PassThru()/ResetDevice(). Cc: Wu, Hao A <hao.a.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com>
2016-05-06MdeModulePkg NvmExpressDxe: Initialize IoAlign info for an NVMe deviceHao Wu
The "IoAlign" field in EFI_BLOCK_IO_MEDIA of an NVMe device is not initialized properly, leading to a zero value for this field. It should be initialized from the "IoAlign" field in the EFI_NVM_EXPRESS_PASS_THRU_MODE structure maintained by the NVMe controller. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-05-05MdeModulePkg: ScsiDiskDxe: cope with broken "Supported VPD Pages" VPD pageLaszlo Ersek
The USB flash drive with Vendor ID 0x1516 (CompUSA) and Product ID 0x6221 returns a broken "Supported VPD Pages" VPD page. In particular, the PageLength field has the invalid value 0x0602 (decimal 1538). This prevents the loop from terminating that scans for the Block Limits VPD page code in ScsiDiskInquiryDevice(): for (Index = 0; Index < PageLength; Index++) { because the Index variable has type UINT8, and it wraps from 255 to 0, without ever reaching PageLength (1538), and because EFI_SCSI_PAGE_CODE_BLOCK_LIMITS_VPD does not occur at offsets 0 through 255. * The fix is not to change the type of Index to UINT16 or a wider type. Namely, section 7.8.14 Supported VPD Pages VPD page in the "SCSI Primary Commands - 4" (SPC-4) specification names the following requirement: The supported VPD page list shall contain a list of all VPD page codes (see 7.8) implemented by the logical unit in ascending order beginning with page code 00h. Since page codes are 8-bit unsigned quantities, it follows that the maximum size for the Supported VPD Pages VPD page is 0x100 bytes, in which every possible page code (0x00 through 0xFF) will be found, before the UINT8 offset wraps around. (EFI_SCSI_SUPPORTED_VPD_PAGES_VPD_PAGE.SupportedVpdPageList is correctly sized as well, in "MdePkg/Include/IndustryStandard/Scsi.h".) * Instead, add sanity checks that enforce the above requirement. If the device breaks the spec, simply fall back to the "Block Limits page absent" case. Cc: Feng Tian <feng.tian@intel.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com> Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1330955 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-04-29MdeModulePkg/PciBusDxe: don't create bogus descriptor if no resources neededArd Biesheuvel
If the current PCI configuration requires no resources to be allocated at all (i.e., unpopulated bus), the PCI enumeration code creates a single ACPI_ADDRESS_SPACE_DESCRIPTOR memory descriptor with all fields cleared. This is rejected by the SubmitResources() implementation of the generic PciHostBridgeDxe in the following way: PciHostBridge: SubmitResources for PcieRoot(0x0) Mem: Granularity/SpecificFlag = 0 / 00 Length/Alignment = 0x0 / 0x0 PciBus: HostBridge->SubmitResources() - Invalid Parameter ASSERT_EFI_ERROR (Status = Invalid Parameter) ASSERT [PciBusDxe] .../PciBusDxe/PciLib.c(561): !EFI_ERROR (Status) So instead, create the empty configuration as a single entry of type EFI_ACPI_END_TAG_DESCRIPTOR. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2016-04-29MdeModulePkg/NvmExpressDxe: comments update to meet implementationFeng Tian
Cc: Simon (Xiang) Lian-SSI <simon.lian@ssi.samsung.com> Cc: Wu, Hao A <hao.a.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Wu, Hao A <hao.a.wu@intel.com> Reviewed-by: Simon (Xiang) Lian-SSI <simon.lian@ssi.samsung.com>
2016-04-26MdeModulePkg/NvmExpress: Clean Phase/CqHdbl/SqTdbl fields to restart HCTian Feng
Phase Tag, SqTdbl/CqHdbl and SqBuffer/CqBuffer should be cleared in NvmeControllerInit() to make HC functionality work when user invokes NvmeBlockIoReset(). Cc: Simon (Xiang) Lian-SSI <simon.lian@ssi.samsung.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Simon (Xiang) Lian-SSI <simon.lian@ssi.samsung.com>
generated by cgit v1.2.3 (git 2.25.1) at 2025-01-04 03:02:10 +0000