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Potentially uninitialized 'Status' might be returned in functions
NvmeCreateIoCompletionQueue() and NvmeCreateIoSubmissionQueue() in file
NvmExpressHci.c.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Qiu Shumin <shumin.qiu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
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Cc: Qiu Shumin <shumin.qiu@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Qiu Shumin <shumin.qiu@intel.com>
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The following codes are useless and cause memory leak issues.
So now remove them.
Cc: Cecil Sheng <cecil.sheng@hpe.com>
Cc: Qiu Shumin <shumin.qiu@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Shumin Qiu <shumin.qiu@intel.com>
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The driver entry point calls gDS->SetMemorySpaceAttributes().
This interface may return EFI_NOT_AVAILABLE_YET when CPU Arch
protocol is not available.
So we need to list CpuArch protocol in its INF dependency section.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
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PciBus driver originally always degrade (64->32) the MMIO resource
for PCI BAR when the PCI device contains option ROM.
But the degrade causes the PCI device can only use resource below 4GB
which makes the resource allocation fails when the PCI device wants
very big MMIO.
The patch follows the PI spec (ECR 1529) to honor the granularity
setting for PCI BAR from IncompatiblePciDeviceSupport so that even
for PCI device which contains option ROM, the degrade doesn't happen
if IncompatiblePciDeviceSupport returns 64 as granularity.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
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Remove "Efi" from gEfiIncompatiblePciDeviceSupport to shorten
the global variable name.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
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There is absolutely no reason to artificially limit the SKU range to 1-255.
PI1.4a spec fixed the artificial limitation.
This patch is to follow PI1.4a spec to remove the sentence
"The valid SkuId range is 1 to 255." from SetSku function comments.
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
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This patch implements the EFI_ERASE_BLOCK_PROTOCOL in ScsiDiskDxe driver.
For now, the codes support the erase block feature only on Universal Flash
Storage (UFS) devices.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
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Together with EFI_BLOCK_IO_PROTOCOL, EFI_BLOCK_IO2_PROTOCOL is also
produced on NVMe devices.
The following Block I/O 2 functions are implemented:
Reset
ReadBlocksEx
WriteBlocksEx
FlushBlocksEx
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
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In current code, BootManagerUiLib is not BDS scope.
So we remove bds keyword in the function name.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
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In current code, BootMaintenanceManagerUiLib is not BDS scope.
So we remove bds keyword in the function name.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
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In current code, UiApp is not the BDS scope. So we remove the bds
keyword in the function name.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
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In current code, we use different output modes for boot phase
and setup phase. When split BootMaintenanceMangerUiLib from
UiApp code, we not add logic to save the boot phase mode info
which will be used later. This change add this logic.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
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In current code, we use different output modes for boot phase
and setup phase. When split BootManagerUiLib from UiApp code,
we not add logic to save the boot phase mode info which will
be used later. This change add this logic.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
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FirmwareVolmeInfoPpiNotifyCallback is re-enterable during FV process. Since PrivateData->FVCount increases when processing each sub FVs, need to cache Parent FV count in stack before processing any sub FV.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chao Zhang <chao.b.zhang@intel.com>
Reviewed-by: Gao Liming <liming.gao@intel.com>
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When the parameter is unsupported or invalid,
should exit the function.
Cc: Qiu Shumin <shumin.qiu@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Qiu Shumin <shumin.qiu@intel.com>
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When PcdPciDisableBusEnumeration is enabled, the PciBus driver
might get into a dead loop if the secondary bus register on PCI
bridge is not programmed or programmed improperly. Adding this
check to avoid any potential dead loop caused by this.
Cc: Feng Tian <feng.tian@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Lee Leahy <Leroy.p.leahy@intel.com>
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Commit a85be3ae48a8aaa40b755cd0ff7270c67cfed585 imports errors for
BootNext question, this patch rollback the related changes.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
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CheckRemainingSpaceForConsistencyInternal()
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Zenith432 <zenith432@users.sourceforge.net>
Reviewed-by: Liming Gao <liming.gao@intel.com>
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The original BdsDxe driver has "Enter Setup" status code
while current code not. This patch restores it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
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Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
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When copy new string content to BufferValue, need to clean the
BufferValue firstly, or the BufferValue may contain some
content that doesn't belong to the new string.
Cc: Liming Gao <liming.gao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
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When submit form fail, the progress point to the first fail part
in ConfigResp, so should free the ConfigResp after Progrss has
been processed.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
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Static storage duration objects that are internal to a library instance
should:
- either have internal linkage (i.e., be declared STATIC),
- or, if they are referenced in multiple files of the library instance,
prefixed with a word that is specific to the library instance, and
minimizes namespace collisions.
In this case, the "gHiiDriverList" variable (with static storage duration
and external linkage) is defined in both BootMaintenanceManagerUiLib and
UiApp. When these are linked together, GCC catches the multiple external
definitions and aborts the build. (GCC notices this due to commit
214a3b79417f.) Fix the error by applying the first rule above.
Fixes: a85be3ae48a8aaa40b755cd0ff7270c67cfed585
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
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As-is, the code triggers [-Werror=unused-but-set-variable] with GCC.
Fixes: a85be3ae48a8aaa40b755cd0ff7270c67cfed585
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
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This patches rename CoreGetMemoryMapPropertiesTable to
CoreGetMemoryMapWithSeparatedImageSection.
The reason is that CoreGetMemoryMapPropertiesTable is called
by MemoryAttributesTable.c to get separated PE image section
information.
It is confusing to use *PropertiesTable, because it is NOT
related to PropertiesTable.c
We rename it to avoid confusing.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
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Current GetVariable implementation will return the first variable for
empty str VariableName, it is because GetVariable and GetNextVariablename
are sharing same function FindVariable.
But UEFI sepc defines SetVariable that If VariableName is an empty string,
then EFI_INVALID_PARAMETER is returned, that means an empty string variable
could never be set successfully, so GetVariable should return error for
empty string VariableName.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
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Change file arrangement to let user easy customize the front page UI.
After this change:
1. UiCustomizeFrontPage function in FrontPageCustomizedUi.c use to
let user customize front page menus. UiFrontPageCallbackHandler
function use to handle the callback for the added menus.
2. FrontPageCustomizedUiSupport.c file used to add support functions
used by FrontPageCustomizedUi.c file.
3. After this change, only above two files need to be updated if front page
menus needed to be changed.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
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Change file arrangement to let user easy customize the BMM UI.
After this change:
1. UiCustomizeBMMPage function in BootMaintenanceManagerCustomizedUi.c
use to let user customize BMM first page menus. UiBMMCallbackHandler
function use to handle the callback for the added menus.
2. BootMaintenanceManagerCustomizedUiSupport.c file used to add support
functions used by BootMaintenanceManagerCustomizedUi.c file.
3. After this change, only above two files need to be updated if BMM
first page menus needed to be changed.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
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HttpGenRequestMessage assumes that HTTP message would always
contain a request-line, headers and an optional message body.
However, subsequent to a HTTP PUT/POST request, HTTP requests
would contain just the message body. This patch supports
creation of such request messages with additional checks.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hegde, Nagaraj P <nagaraj-p.hegde@hpe.com>
Reviewed-By: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
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The Mantis ticket 1353 <https://mantis.uefi.org/mantis/view.php?id=1353>
and Mantis ticket 1472 <https://mantis.uefi.org/mantis/view.php?id=1472>
updated the description of the port multiplier port number parameter in
SATA Device Path Node and ATA Pass-Through Protocol.
Now, this parameter should be set to 0xFFFF instead of 0 to indicate that
an ATA device is directly attached on the controller port.
Please note that this is an incompatible change. The consumer of SATA
device path or ATA_PASS_THRU needs to re-examine its usage to follow UEFI
2.5 mantis 1353 and 1472.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
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Cc: Shumin Qiu <shumin.qiu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Shumin Qiu <shumin.qiu@intel.com>
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Change PciHostBridgeDxe driver to not install the
PciHostBridgeResourceAllocation protocol and let
PciRootBridgeIo.Configuration() return the correct PCI resource
assignment information when the ResourceAssigned is TRUE.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
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Some platform doesn't require PciBus driver to assign resource
to PCI devices which causes PciRootBridgeIo.Configuration() cannot
return correct resource information to caller.
When resource assignment by PciBus is not mandatory, only light
version of PCI bus enumeration is performed, which only collects
the device resource consumption and publishes the PciIo instance.
The corresponding logic is in PciEnumeratorLight() in PciBus driver.
But PciEnumeratorLight() still depends on
PciRootBridgeIo.Configuration() returns the starting bus number in
order to search down to find all PCI devices under the root bridge.
When ResourceAssigned in PCI_ROOT_BRIDGE returned by
PciHostBridgeGetRootBridges() is TRUE, PciHostBridge driver treats
the Bus/Io/Mem/MemAbove4G/PMem/PMemAbove4G as the resource that are
*actually assigned* to the root bridge, instead of the resource that
*can be assigned* to the root bridge.
So that PciRootBridgeIo.Configuration() can return the correct
information.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
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When the aperture base equals to aperture limit, the old code treats
the aperture as non-existent. It's not correct because it indicates
a range starting with base and the length is 1.
The new code corrects the comparing bug.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
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The patch aligns to the IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe
driver not flush the UART in Reset() and SetAttributes() function.
It was found the flush causes hang on certain PCI serial devices.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Eric Jin <eric.jin@intel.com>
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The RamDiskDxe driver originally uses a variable-length HII varstore to
retrieve the HII checkbox status of each registered RAM disk.
However, HII does not support the variable-length varstore feature.
Therefore, only the checkbox status for the first 8 RAM disks are tracked
for the following definition of HII varstore structure considering the
alignment:
typedef struct {
UINT64 Size;
UINT8 RamDiskList[0];
} RAM_DISK_CONFIGURATION;
This commit uses the private data of each registered RAM disks to track
the HII checkbox status instead to resolve the issue.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
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The RamDiskDxe now will report RAM disks with reserved memory type to NFIT
in the ACPI table.
This commit will also make sure that an NVDIMM root device exists in the
\SB scope before reporting any RAM disk to NFIT.
To properly report the NVDIMM root device, one will need to append the
following content in the [Rule.Common.DXE_DRIVER] field in platform FDF
files:
RAW ACPI Optional |.acpi
RAW ASL Optional |.aml
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
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It's done by producing EFI_ERASE_BLOCK_PROTOCOL protocol instance.
Cc: Hao Wu <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
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when there's no volume label 'Info' can be NULL
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Zimmermann <sigmaepsilon92@gmail.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
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Before switch to a bus mode, we need check if the SD device supports
this bus mode.
Cc: Wu, Hao A <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
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Enhance the code to reset tuning circuit when tuning error case happens.
Cc: Wu, Hao A <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
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The original code is using ADMA mode to do clock tuning procedure. It
may have problem on some SD/MMC host controllers as there is no way to
know when to send next tuning cmd.
Update it to PIO mode to strictly follow SD Host Controller Simplified
Specification 3.0 Figure 2-29. By this way, if the Buffer Read Ready
interrupt is set, we could know it's ok to send the next clock tuning
cmd.
Cc: Wu, Hao A <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
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The original code has a bug to calculate which clock freq should be
used when the target clock freq is larger than the BaseClock Freq
provided by the system.
Cc: Wu, Hao A <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
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