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Update the new introduced ATA_CMD_SEEK to ATA_CMD_ATAPI_SEEK.
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
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Add definitions complying Industry Standard specifications.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Anandakrishnan Loganathan <anandakrishnanl@ami.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
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v2:
*add some new arch types for PXE boot.
refine the definition of arch types for http boot
Add a new head file Dhcp.h in Mde/Include/IndustryStandard, normalize the
universal option numbers and other network number tags.
Cc: Sriram Subramanian <sriram-s@hpe.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Wu Jiaxin <jiaxin.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Zhang Lubo <lubo.zhang@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
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The definitions are required by certain platform initialization
code.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Reviewed-by: Amy Chan <amy.chan@intel.com>
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Adds a public header for NVMe v1.1 spec. definitions. The majority
of these definitions where copied from a private header in
MdeModulePkg/Bus/Pci/NvmExpress/NvmExpressHci.h. Additional
definitions were added e.g. the NVMe Smart Health Log and
Firmware Info. Log structures. These definitions should be
in a public header so that clients of the NVMe passthru protocol
can use them to execute NVMe commands.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Darbin Reyes <darbin.emm.reyes@hpe.com>
Reviewed-by: Samer El-Haj-Mahmoud <samer.el-haj-mahmoud@hpe.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
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Update WSMT table link to official MSDN URL.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
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According to the SCSI Block Commands - 4 (SBC-4) spec, the patch add SCSI
unmap command support in IndustryStandard/Scsi.h.
The following changes have been made:
1. Add SCSI unmap command OP Code
2. Update the structure definition for Block Limits VPD page
3. Add structure definitions for UNMAP parameter list header & UNMAP block
descriptor.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
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Add NFIT definition from ACPI 6.1 for the NVDIMM Control Region
Structure Valid Fields for Manufacturing Location and Manufacturing Date
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
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The ComId for Block SID authentication command is
0x0005 according to "TCG Storage Feature Set: Block
SID Authentication Specification Version 1.0.0". Update code to
follow this spec requirement.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
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This patch adds Windows SMM Security Mitigation
Table @ http://download.microsoft.com/download/1/8/A/18A21244-EB67-4538-BAA2-1A54E0E490B6/WSMT.docx
Cc: "Gao, Liming" <liming.gao@intel.com>
Cc: "Kinney, Michael D" <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Gao, Liming" <liming.gao@intel.com>
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Add #defines for "Expect" header, which is a part of RFC 2616
and used for HTTP PUT/POST operations.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hegde, Nagaraj P <nagaraj-p.hegde@hpe.com>
Reviewed-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
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The Microsoft Debug Port Table 2 (DBG2) specification revision
October 6, 2015 adds support for Serial Port Subtypes for ARM.
This patch adds these definitions.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
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The Serial Port Console Redirection Table specification Version 1.03 -
August 10, 2015 adds support for Serial Port Subtypes for ARM. These
Subtypes are described in the Table 3 of the Microsoft Debug Port Table
2 (DBG2) Specification - December 10, 2015.
This patch adds macro definitions for these.
Code at: https://github.com/EvanLloyd/tianocore/commit/79678a0f399e97883cfba09275e750861e24cd70
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
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These definitions are defined in SD physical layer simplified spec
and eMMC electrical standard spec.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
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The definitions are defined in TCG storage core and opal spec.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
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As the SMBIOS table types belong to the SMBIOS standard, they were
moved from the SMBIOS Protocol header into the SMBIOS
IndustryStandard header without the EFI_-prefix. Defines with the
EFI_-prefix have been kept in the Protocol header for
backwards-compatibility, resolving to the IndustryStandard defines.
The same has been done with the C types.
The SMBIOS table header structure had been duplicated -
SMBIOS_STRUCTURE in the IndustryStandard header and
EFI_SMBIOS_TABLE_HEADER in the Protocol file - and thus the
Protocol type was replaced with a typedef to the InudstryStandard's.
This doesn't only make it easier to maintain, but it also prevents
potential future issues as the Protocol type has been aligned, while
the standard and the IndustryStandard header declare it as
byte-packed.
This has worked well till now only because the members of the
structure do not require alignment yet.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Marvin Haeuser <Marvin.Haeuser@outlook.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Shumin Qiu <shumin.qiu@intel.com>
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Fix ACPI 6.0 and 6.1 NFIT GUID definitions to avoid GCC compiler error
for missing braces.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
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Add additional HTTP 1.1 definitions that are useful in HTTP
applications, such as User-Agent, Location, and x-Auth-Token
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
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The HeaderLog field of the PCIe Extended Capabilities Advanced Error
Reporting structure was incorrectly defined as a 32-bit field. The PCIe
2.1 Base Specification, section 7.10, lists this as 16 bytes, or 4
DWORDs.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
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Update Acpi.h to include latest Acpi6.1
header file.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Gao, Liming" <liming.gao@intel.com>
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Add ACPI 6.1 definitions from the ACPI
Specification Revision 6.1 January, 2016.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Gao, Liming" <liming.gao@intel.com>
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Add missing definition in ACPI6.0 specification.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Gao, Liming" <liming.gao@intel.com>
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TPM TIS (TPM Interface Specification) is TCG standard.
Add definition here.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Zhang, Chao B" <chao.b.zhang@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19739 6f19259b-4bc3-4df7-8a09-765794883524
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TPM PTP (Platform TPM Profile) is TCG standard.
Add definition here.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Zhang, Chao B" <chao.b.zhang@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19738 6f19259b-4bc3-4df7-8a09-765794883524
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Microsoft updated secure MOR lock document with version 2.
So we update comment here.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed: "Zhang, Chao B" <chao.b.zhang@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19687 6f19259b-4bc3-4df7-8a09-765794883524
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Update Ipmi2.0 definitions header files for data structure
name suffix for request/response data and completion code.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Daocheng Bu <daocheng.bu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19484 6f19259b-4bc3-4df7-8a09-765794883524
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Update BaseAddress in the SPCR structure to use
EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19456 6f19259b-4bc3-4df7-8a09-765794883524
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Add common HTTP 1.1 industry standard definitions for use in HTTP
clients/applications. List includes: HTTP methods, request/response
headers, and encodings.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19435 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19289 6f19259b-4bc3-4df7-8a09-765794883524
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The GicVersion field is defined in ACPI 5.1 and 6.0
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Samer El-Haj-Mahmoud" <elhaj@hpe.com>
Reviewed-by: "Yao, Jiewen" <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19288 6f19259b-4bc3-4df7-8a09-765794883524
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Re-add Ipmi2.0 definitions header files based on Ipmi category:
App, Storage and etc.
In V3, the file name has been changed for short.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Daocheng Bu <daocheng.bu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19272 6f19259b-4bc3-4df7-8a09-765794883524
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The file name is too long and with "Definitions" word
that is duplicated meanings for the header file.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Daocheng Bu <daocheng.bu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19231 6f19259b-4bc3-4df7-8a09-765794883524
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Add 3 macro to TPM_RH Constants, which is in latest TPM2 spec.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Zhang, Chao B" <chao.b.zhang@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19230 6f19259b-4bc3-4df7-8a09-765794883524
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Add Ipmi2.0 definitions head file based on Ipmi category:
App, Storage and etc.
In V2, correct #include IndustryStandard/IpmiNetFnSensorEventDefinitions.h,
and remove trailing space.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Daocheng Bu <daocheng.bu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19125 6f19259b-4bc3-4df7-8a09-765794883524
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Document link:
http://msdn.microsoft.com/en-us/library/windows/hardware/dn639132(v=vs.85).aspx
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Heyi Guo" <heyi.guo@linaro.org>
Reviewed-by: "Jiewen Yao" <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18782 6f19259b-4bc3-4df7-8a09-765794883524
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So that other module can also refer to them.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Zeng, Star" <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18674 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com>
Reviewed-by: "Zhang, Chao B" <chao.b.zhang@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18221 6f19259b-4bc3-4df7-8a09-765794883524
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1) TCG Physical Presence Interface Specification 1.30 at http://www.trustedcomputinggroup.org/resources/tcg_physical_presence_interface_specification
2) TCG EFI Protocol Specification for TPM 2.0 at http://www.trustedcomputinggroup.org/resources/tcg_efi_protocol_specification
3) Update TPM2.0 header file to include Hash Algo definition.
4) Update UEFI TCG platform header file to include more TCG event structure.
Test Win8/Win10 with secure boot enabled, PCR7 shows bound.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com>
Reviewed-by: "Zhang, Chao B" <chao.b.zhang@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18218 6f19259b-4bc3-4df7-8a09-765794883524
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Add a new module MemoryOverwriteRequestControlLock to register VarCheck handler to enforce MorLock Policy.
Only SMM version is added because MOR is only supported in SMM variable case.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com>
Reviewed-by: "Chao Zhang" <chao.b.zhang@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18092 6f19259b-4bc3-4df7-8a09-765794883524
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Add P2P Bridge Secondary Latency Timer register definition to Pci22.h
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Samer El-Haj-Mahmoud <samer.el-haj-mahmoud@hp.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17793 6f19259b-4bc3-4df7-8a09-765794883524
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Update to follow Tiano Coding style.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Qiu Shumin <shumin.qiu@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17557 6f19259b-4bc3-4df7-8a09-765794883524
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Update to follow Tiano Coding style.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chao Zhang <chao.b.zhang@intel.com>
Reviewed-by: Qiu Shumin <shumin.qiu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17473 6f19259b-4bc3-4df7-8a09-765794883524
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Add Microsoft UX capsule GUID & layout into IndustryStandard
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chao Zhang <chao.b.zhang@intel.com>
Reviewed-by: Gao Liming <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17424 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Qiu Shumin <shumin.qiu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17311 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com>
Reviewed-by: "Liming Gao" <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17192 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com>
Reviewed-by: "Liming Gao" <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17191 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Shumin Qiu <shumin.qiu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17181 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Shumin Qiu <shumin.qiu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17180 6f19259b-4bc3-4df7-8a09-765794883524
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