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2015-05-06Copy PCD from IntelFrameworkModulePkg to MdePkg and MdeModulePkgRuiyu Ni
to MdePkg: PcdHardwareErrorRecordLevel, PcdPlatformBootTimeout to MdeModulePkg: PcdSetupConOutColumn, PcdSetupConOutRow, PcdSetupVideoHorizontalResolution, PcdSetupVideoVerticalResolution Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17313 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-06MdePkg: Add bluetooth devicepath handling in device path library.Qiu Shumin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Qiu Shumin <shumin.qiu@intel.com> Reviewed-by: Yao Jiewen <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17312 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-06MdePkg: Add UEFI2.5 bluetooth protocol/devicepath definition in MdePkg.Qiu Shumin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Qiu Shumin <shumin.qiu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Yao Jiewen <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17311 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-06Add ASSERT comment for SafeString API in BaseLib for MdePkg.Yao, Jiewen
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com> Reviewed-by: "Carsey, Jaben" <jaben.carsey@intel.com> Reviewed-by: "Justen, Jordan L" <jordan.l.justen@intel.com> Reviewed-by: "Gao, Liming" <Liming.Gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17310 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-05MdePkg: Add UEFI2.5 USB Function I/O protocol definitionsFeng Tian
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17295 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-05MdePkg: Add UEFI2.5 Smart Card Edge protocol definitionsFeng Tian
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17294 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-05MdePkg: Add UEFI2.5 Smart Card Reader protocol definitionsFeng Tian
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17293 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-05MdePkg: Add UEFI2.5 Inline Cryptographic Interface definitionFeng Tian
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17292 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-05Add UEFI2.5 HASH protocol definition.Yao, Jiewen
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com> Reviewed-by: "Long, Qin" <Qin.Long@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17287 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-04MdePkg: Add UEFI2.5 EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL definitionsFeng Tian
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17285 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-30MdePkg/BaseLib: Preserve EBX register and fix stack offset to LinearAddress ↵Michael Kinney
in AsmFlushCacheLine() The value of EBX must be preserved to follow IA32 cdecl calling convention in the assembly implementation of AsmFlushCacheLine(). The CPUID instruction modifies the EBX register. The EBX register value is saved onto the stack before CPUID and restored from the stack after CPUID. The update to the inline assembly implementation of AsmFlushCacheLine() changed the location of the LinearAddress parameter value on the stack. The hardcoded lookup using [esp + 4] is not correct. Use the parameter name LinearAddress instead of the hard coded [esp + 4] stack location to prevent this issue from occurring again if there are changes to the inline assembly in the future. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17279 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-30Add IPV6 support from UNDIYe Ting
Add new information block ‘IPV6 support from UNDI’ in AIP protocol and provide sample implementation in UNDI driver. Update PXE driver to get ‘Ipv6Available’ of PXE BC Mode data from UNDI driver, if unsupported then not to start PXE over IPv6 path. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ye Ting <ting.ye@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-by: Wu Jiaxin <jiaxin.wu@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17275 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-29MdePkg: Add UFS (Universal Flash Storage) related definitionsFeng Tian
These definitions are defined in UEFI2.5/PI1.4 spec. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17245 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-29MdePkg: Add UEFI2.5 and PI1.4 PersistentMemory definitionLiming Gao
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17241 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-28MdePkg: Trim trailing whitespaces for ESRT related filesHao Wu
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17236 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-28MdePkg: Add ESRT Interface DefinitionsHao Wu
Add EFI System Resource Table (ESRT) interface (API only). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17235 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-28MdePkg: Add the header file for UEFI PI Multi-processor PPIHao Wu
The MP Services PPI is installed by some platform or chipset-specific PEIM that abstracts handling multiprocessor support. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17234 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-28MdePkg: Add PI 1.4 Graphics HOB and PPI header filesHao Wu
The PeiGraphicsPpi is the main interface exposed by the Graphics PEIM to be used by the other firmware modules. When graphics capability is included in PEI, it produces a EFI_PEI_GRAPHICS_INFO_HOB which provides information about the graphics mode and the framebuffer. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17233 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-27MdePkg/BaseMemoryLibRepStr: Support IA32 processors without CMOVxMichael Kinney
Remove use of CMOVx instruction from IA32 assembly files in BaseMemoryLibRepStr. This matches compiler flags for all supported C compilers. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17214 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-27MdePkg/BaseLib: Support IA32 processors without CMOVxMichael Kinney
Remove use of CMOVx instruction from IA32 assembly files in BaseLib. This matches compiler flags for all supported C compilers. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17213 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-27MdePkg/BaseLib: Support IA32 processors without CLFLUSHMichael Kinney
Use CPUID Leaf 01 to detect support for CLFLUSH instruction. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17212 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-27MdePkg/BaseCacheMaintenanceLib: Support IA32 processors without CLFLUSHMichael Kinney
Use CPUID Leaf 01 to detect support for CLFLUSH instruction. If CLFLUSH is supported, use CPUID to determine the cache line size to use with CLFLUSH. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17211 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-21ACPI5.1 definition bug fix.Yao, Jiewen
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com> Reviewed-by: "Liming Gao" <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17192 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-21Add ACPI6.0 header file.Yao, Jiewen
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com> Reviewed-by: "Liming Gao" <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17191 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-15ARM toolchain raised this compilation error when using the macro ↵Michael Kinney
ACPI_DISPLAY_ADR(). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <Michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Tested-by: Olivier Martin <Olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17182 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-15Rollback r17180.Shumin Qiu
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Shumin Qiu <shumin.qiu@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17181 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-15MdePkg: Add Bluetooth related definition.Shumin Qiu
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Shumin Qiu <shumin.qiu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17180 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-10MdePkg: Add a set of PcdSetXXS APIs into PcdLib and remove the ASSERT in ↵Star Zeng
original PcdSetXX APIs. And also use DISABLE_NEW_DEPRECATED_INTERFACES macro to include the old PcdSetXX APIs. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17162 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-10MdePkg: Fix build fail when DDK3790 tool chain is usedScott Duplichan
Modify the preprocessor check for variadic macro support. The existing check assumes all Microsoft compilers with major version of 14 and greater support variadic macros. This is almost correct. An exception is the X64 compiler from DDK3790. This compiler has version 14.00.40310.41, yet does not support variadic macros. Both VS2005 compilers have version number 14.00.50727.762 and do support variadic macros. For simplicity, this change suppresses the use of variadic macros for all Microsoft compilers with version 14 or smaller. If the variadic macro support needs to be restored for VS2005, that could be done using new logic invloving _MSC_FULL_VER. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17155 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-03Rollback r17113.Hao Wu
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17114 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-03MdePkg: Add ESRT Interface DefinitionsHao Wu
Add EFI System Resource Table (ESRT) interface (API only). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17113 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-02MdePkg: Missing GUID variable in DiskInfo.hFelix Polyudov
The DiskInfo.h defines EFI_DISK_INFO_NVME_INTERFACE_GUID, but does not declare a corresponding EFI_GUID variable. The attached patch adds "extern" statement for the variable in DiskInfo.h. It also adds variable definition to MdePkg.dec. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Felix Polyudov <felixp@ami.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17102 6f19259b-4bc3-4df7-8a09-765794883524
2015-03-27MdePkg: fix ARM version of InternalMathSwapBytes64 ()Ard Biesheuvel
The ARM asm implementation of InternalMathSwapBytes64 () does interesting things if bit 7 of operand r1 (upper 32 bits of the input value) is set. After the recursive swap, bit 7 ends up in the sign bit position, after which it is right shifted with sign extension, and or'ed with the upper half of the output value. This means SwapBytes64 (0x00000080_00000000) returns an incorrect value of 0xFFFFFFFF_80000000. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Ronald Cron <Ronald.Cron@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17077 6f19259b-4bc3-4df7-8a09-765794883524
2015-03-20MdePkg: BaseSynchronizationLib: fix Increment/Decrement retvals for ARMTyler Smith
The procedure call standard dictates that we move the result to r0 before returning. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Tyler Smith <tylers@hp.com> Reviewed-by: Eugene Cohen <eugene@hp.com> Reviewed-by: Leif Lindholm <leif.lindholm@arm.com> Reviewed-by: Ronald Cron <Ronald.Cron@arm.com> [lersek@redhat.com: cleaned up commit message] git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17068 6f19259b-4bc3-4df7-8a09-765794883524
2015-03-20Updated Memory Error Record Per UEFI Specification 2.4a.Jeff Fan
Support up to 64GiB DIMMS and support for DDR4 and Chip Identification. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17067 6f19259b-4bc3-4df7-8a09-765794883524
2015-03-17MdePkg:Fix typo 'caculate' in MdePkg.Qiu Shumin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Qiu Shumin <shumin.qiu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Bruce Cran <bruce.cran@gmail.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17057 6f19259b-4bc3-4df7-8a09-765794883524
2015-03-16MdePkg: Add SMBIOS 3.0 configuration table Guid.Elvin Li
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Elvin Li <elvin.li@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17050 6f19259b-4bc3-4df7-8a09-765794883524
2015-03-05MdePkg: Convert non DOS format files to DOS formatHot Tian
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hot Tian <hot.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17010 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-28MdePkg/BaseSynchronizationLib: Add InterlockedCompareExchange16Ard Biesheuvel
This implements the function InterlockedCompareExchange16 () for all architectures, using architecture and toolchain specific intrinsics or primitive assembler instructions. Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Olivier Martin <olivier.martin@arm.com> Acked-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16966 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-28MdePkg/BaseSynchronizationLib: Added proper support for ARM architectureOlivier Martin
This implements the following synchronization primitives for AArch64 (GCC) and ARM (GCC & RVCT): InternalSyncCompareExchange32 InternalSyncCompareExchange64 InternalSyncIncrement InternalSyncDecrement Note: these functions are implemented using the exclusive monitor, which implies that they can only be used after the caches (and hence the MMU) have been enabled. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16965 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-25Fix typo.Yao, Jiewen
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com> Reviewed-by: "Fan, Jeff" <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16919 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-25MdePkg: Fixed wrong definition in smbios.h.Elvin Li
SlotTypeAgp8X should be used per SMBIOS spec. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Elvin Li <elvin.li@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16917 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-23MdePkg: BasePciLibPciExpress: list ARM and AARCH64 as valid architecturesLaszlo Ersek
"ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualization.dsc.inc" references this PciLib instance. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <Olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16915 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-15MdePkg: Add new definitions for SMBIOS 3.0.Elvin Li
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Elvin Li <elvin.li@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16869 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-10MdePkg: Add missing library classes in DEC declaration.Shumin Qiu
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Shumin Qiu <shumin.qiu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16821 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-10MdePkg: Fix WINDDK3790 build failureLiming Gao
WINDDK3790 doesn't support __VA_ARGS__ macro. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16820 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-06MdePkg: Correct Help of Error LevelLiming Gao
1. Error Level should be BIT31 instead of BIT28. 2. New PCD PcdFixedDebugPrintErrorLevel value should be mask value of all BITs so that it doesn't bring impact for current platform. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16799 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-06MdePkg: Update BaseDebugLibStdErr libraryLiming Gao
Implement new API DebugPrintLevelEnabled() to base on PCD PcdFixedDebugPrintErrorLevel. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16794 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-06MdePkg: Update BaseDebugLibConOut libraryLiming Gao
Implement new API DebugPrintLevelEnabled() to base on PCD PcdFixedDebugPrintErrorLevel. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16792 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-06MdePkg: Update BaseDebugLibNull libraryLiming Gao
Implement new API DebugPrintLevelEnabled() to return FALSE. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16791 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-04 02:43:55 +0000