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path: root/Platform/BroxtonPlatformPkg/Board/LeafHill
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2018-01-05Aurora Glacier Code.zwei4
Add board specific code for Aurora Glacier. Build command is "BuildBIOS /AG /A /vs13 Broxton Release". Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 <david.wei@intel.com>
2017-12-22I2S Audio Configurezwei4
Customize I2S virtual bus ID for different boards. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 <david.wei@intel.com>
2017-12-13Enable HD audio.zwei4
Enable HD audio on Intel reference board. (1) Enable HdAudioDspUaaCompliance. (2) Move audio verb table to board specifc folder. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 <david.wei@intel.com>
2017-11-30Set eMMCHost Speed.lushifex
Add a temporary platform workaround to downgrade eMMC host from HS400 to HS200 on MinnowBoard 3 FAB B and MinnowBoard 3 Next Pre-production board. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: lushifex <shifeix.a.lu@intel.com>
2017-11-14Benson FAB Bzwei4
Add code for Benson Glacier FAB B. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 <david.wei@intel.com>
2017-11-10Set MaxPkgCStateGuo Mang
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Guo Mang <mang.guo@intel.com>
2017-10-10Enable SueCreekYeon Sil Yoon
1. Change SPI mode and speed for SueCreek 2. Update SueCreek HOST_IRQ and HOST_RST GPIO configuration 3. Add a PCD to make sure that SueCreek only reported to OS when it is actually present on the board. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yeon Sil Yoon <yeon.sil.yoon@intel.com> Signed-off-by: Guo Mang <mang.guo@intel.com> Reviewed-by: zwei4 <david.wei@intel.com>
2017-09-29VBT table changezwei4
Move VBT tables from common folder into board specific folders. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 <david.wei@intel.com> Cc: Loeppert, Anthony <anthony.loeppert@intel.com>
2017-09-26Board Name.Lu, ShifeiX A
Show different board names for different boards. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: lushifex <shifeix.a.lu@intel.com> Reviewed-by: zwei4 <david.wei@intel.com>
2017-09-12Change Reset TypeLu, ShifeiX A
Change Reset Type according to different Board. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: lushifex <shifeix.a.lu@intel.com>
2017-09-02Enable GT RC6.zwei4
Remove code that disables GT RC6. This could allow GT to enter deep sleep when it is idle, so that more power could be saved for core to use. This temp solution allows core frequency maximally rise to 1100MHz. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 <david.wei@intel.com>
2017-07-28Integrate MR3 FSPGuo Mang
Change code to integrate MR3 FSP. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Guo Mang <mang.guo@intel.com>
2017-07-13Multi board support.zwei4
Cleanup libraries for multi boards. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 <david.wei@intel.com>
2017-06-09Add Benson GPIO CodeGuo Mang
Add GPIO setting for Benson Glacier Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang <mang.guo@intel.com>
2017-05-11Fixed some GCC build errors.zwei4
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 <david.wei@intel.com>
2017-05-09Use GP_CAMERASB10 as Board_ID3.zwei4
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 <david.wei@intel.com> CC: Mang Guo <mang.guo@intel.com> CC: Shifei Lu <shifeix.a.lu@intel.com>
2017-05-09Clean up BOARD_ID identification code.zwei4
BOARD_ID bits and GPIO pins mapping: BOARD_ID0 GPIO_224(J45) BOARD_ID1 GPIO_213(M47) BOARD_ID2 GPIO_223(H48) BOARD_ID3 GP_CAMERASB10(R34) Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 <david.wei@intel.com> CC: Mang Guo <mang.guo@intel.com> CC: Shifei Lu <shifeix.a.lu@intel.com>
2017-05-09GPIO clean up.Wei, David
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: lushifex <shifeix.a.lu@intel.com> Reviewed-by: zwei4 <david.wei@intel.com>
2017-05-09Fix MRC restore issueGuo Mang
MCR parameter restored in the second time of boot, so the boot time is less than the first time of boot. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang <mang.guo@intel.com> Reviewed-by: zwei4 <david.wei@intel.com>
2017-05-09Change MRC parameterGuo Mang
These code cause HDMI cable of some vendor couldn't work. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang <mang.guo@intel.com> Reviewed-by: lushifex <shifeix.a.lu@intel.com>
2017-05-09Fix MRC parameters restore failure issueGuo Mang
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang <mang.guo@intel.com>
2017-05-09BroxtonPlatformPkg: Add LeafHill/BoardInitPreMemGuo Mang
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang <mang.guo@intel.com>
2017-05-09BroxtonPlatformPkg: Add LeafHill/BoardInitPostMemGuo Mang
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang <mang.guo@intel.com>
2017-05-09BroxtonPlatformPkg: Add LeafHill/BoardInitDxeGuo Mang
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang <mang.guo@intel.com>
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