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path: root/Platform/BroxtonPlatformPkg/Board
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2018-02-14IDTP9180 PMIC Power Sequence Configuration.zwei4
Change Bit 2 (SUSPWRDNACKCFG) of Power Sequence Configuration register (offset 0x2A) to 1. If SUSPWRDNACKCFG is 0, SUSPWRDNACK signal is ignored. PMIC will not go to G3 when SUSPWRDNACK goes high in S4 state. If SUSPWRDNACKCFG is 1, PMIC responses to SUSPWRDNACK signal. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 <david.wei@intel.com>
2018-01-15Add support for Sony camera imx219Teemu Rytkonen
Adds support for two ACPI entries for imx219 as front and back camera of IPU. Both camera entries can be configured from the Front, Back camera of the BIOS menu settings. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Teemu Rytkonen <teemu.s.rytkonen@intel.com> Reviewed-by: zwei4 <david.wei@intel.com>
2018-01-10FAB ID.zwei4
Add code to detect FAB ID of Aurora Glacier. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 <david.wei@intel.com>
2018-01-05Aurora Glacier Code.zwei4
Add board specific code for Aurora Glacier. Build command is "BuildBIOS /AG /A /vs13 Broxton Release". Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 <david.wei@intel.com>
2017-12-22I2S Audio Configurezwei4
Customize I2S virtual bus ID for different boards. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 <david.wei@intel.com>
2017-12-13Enable HD audio.zwei4
Enable HD audio on Intel reference board. (1) Enable HdAudioDspUaaCompliance. (2) Move audio verb table to board specifc folder. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 <david.wei@intel.com>
2017-12-12Board Name.lushifex
Change board name on Minnowboard 3 and Minnowboard 3 Module. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: lushifex <shifeix.a.lu@intel.com>
2017-11-30SATA LED.zwei4
Enable SATA LED function on MinnowBoard3 Next pre-production board. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 <david.wei@intel.com>
2017-11-30Set eMMCHost Speed.lushifex
Add a temporary platform workaround to downgrade eMMC host from HS400 to HS200 on MinnowBoard 3 FAB B and MinnowBoard 3 Next Pre-production board. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: lushifex <shifeix.a.lu@intel.com>
2017-11-24Minnowboard3 Next Pre-production.zwei4
Add code for Minnowboard3 Next pre-production board. Build Command: BuildBios /vs13 /MX /A Broxton Release. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 <david.wei@intel.com>
2017-11-24Board Specific Code.zwei4
Add VBT for Minnowboard3 Next pre-production board. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 <david.wei@intel.com>
2017-11-24Board Specific Code.zwei4
Add BoardInitPreMem lib for Minnowboard3 Next pre-production board. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 <david.wei@intel.com>
2017-11-24Board Specific Code.zwei4
Add BoardInitPostMem lib for Minnowboard3 Next pre-product board. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 <david.wei@intel.com>
2017-11-24Board Specific Code.zwei4
Add BoardInitDxe lib for Minnowboard3 Next pre-product board. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 <david.wei@intel.com>
2017-11-15GPIOs Change.zwei4
GPIOs Change for FAB B. (FAB A does not use these GPIOs) Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 <david.wei@intel.com>
2017-11-15Fix GCC build failure.zwei4
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 <david.wei@intel.com>
2017-11-15BensonGlacier: Enable generic SPI deviceRytkonen, Teemu S
-Enable generic SPI device for BensonGlacier config to be used with SenseHat board. -Enable GPIO config to enable SenseHat board programming Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Teemu Rytkonen <teemu.s.rytkonen@intel.com>
2017-11-15SueCreek Bypasszwei4
Add code in ACPI table for TI audio codec under I2C5. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 <david.wei@intel.com>
2017-11-14Benson FAB Bzwei4
Add code for Benson Glacier FAB B. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 <david.wei@intel.com>
2017-11-10Set MaxPkgCStateGuo Mang
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Guo Mang <mang.guo@intel.com>
2017-10-23Logoxianhu2x
Change QR code from https://minnowboard.org to https://minnowboard.org/setup Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: xianhu2x <xianhuix.liu@intel.com>
2017-10-14Blue tooth devicelushifex
Use Pcd to select blue tooth device. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: lushifex <shifeix.a.lu@intel.com>
2017-10-12QR Code Showing Under EFI Shell Put Logo files under correct directoryxianhu2x
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: xianhu2x <xianhuix.liu@intel.com>
2017-10-12QR code display under EFI Shellxianhu2x
Showing QR code and website link to screen under EFI shell for MinnowBoard. Output website link to serial port too. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: xianhu2x <xianhuix.liu@intel.com>
2017-10-10Enable SueCreekYeon Sil Yoon
1. Change SPI mode and speed for SueCreek 2. Update SueCreek HOST_IRQ and HOST_RST GPIO configuration 3. Add a PCD to make sure that SueCreek only reported to OS when it is actually present on the board. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yeon Sil Yoon <yeon.sil.yoon@intel.com> Signed-off-by: Guo Mang <mang.guo@intel.com> Reviewed-by: zwei4 <david.wei@intel.com>
2017-09-29VBT table changezwei4
Move VBT tables from common folder into board specific folders. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 <david.wei@intel.com> Cc: Loeppert, Anthony <anthony.loeppert@intel.com>
2017-09-26Board Name.Lu, ShifeiX A
Show different board names for different boards. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: lushifex <shifeix.a.lu@intel.com> Reviewed-by: zwei4 <david.wei@intel.com>
2017-09-12Change Reset TypeLu, ShifeiX A
Change Reset Type according to different Board. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: lushifex <shifeix.a.lu@intel.com>
2017-09-02Enable GT RC6.zwei4
Remove code that disables GT RC6. This could allow GT to enter deep sleep when it is idle, so that more power could be saved for core to use. This temp solution allows core frequency maximally rise to 1100MHz. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 <david.wei@intel.com>
2017-08-24BroxtonPlatformPkg: Disable NPK based on DciEnGuo Mang
Disable NPK based on DciEn Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang <mang.guo@intel.com>
2017-08-24BroxtonPlatformPkg: Fix MRC param issueGuo Mang
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang <mang.guo@intel.com>
2017-08-24BroxtonPlatformPkg: Add BensonTypeC supportGuo Mang
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang <mang.guo@intel.com>
2017-08-24BroxtonPlatformPkg: Code cleanupGuo Mang
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang <mang.guo@intel.com>
2017-07-28Integrate MR3 FSPGuo Mang
Change code to integrate MR3 FSP. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Guo Mang <mang.guo@intel.com>
2017-07-17WIFI Pin Settingzwei4
Configure GPIO pins of on-board WIFI. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 <david.wei@intel.com>
2017-07-13Multi board support.zwei4
Cleanup libraries for multi boards. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 <david.wei@intel.com>
2017-07-10LPDDR4 Configuration.zwei4
Change LPDDR4 configuration for Benson Glacier. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 <david.wei@intel.com>
2017-07-10GPIO Changezwei4
Change GPIO for buttons and UART. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 <david.wei@intel.com>
2017-07-03GPIO configuration.zwei4
Change GPIO configuration for LED and buttons. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 <david.wei@intel.com>
2017-06-16Set I2S pins.zwei4
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 <david.wei@intel.com>
2017-06-14Add code for WIFI/BTzwei4
Add code for LBEE5KL1DX WIFI & Blue Tooth on FAB B. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 <david.wei@intel.com>
2017-06-09Add Benson GPIO CodeGuo Mang
Add GPIO setting for Benson Glacier Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang <mang.guo@intel.com>
2017-05-11Fixed some GCC build errors.zwei4
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 <david.wei@intel.com>
2017-05-09Use GP_CAMERASB10 as Board_ID3.zwei4
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 <david.wei@intel.com> CC: Mang Guo <mang.guo@intel.com> CC: Shifei Lu <shifeix.a.lu@intel.com>
2017-05-09Clean up BOARD_ID identification code.zwei4
BOARD_ID bits and GPIO pins mapping: BOARD_ID0 GPIO_224(J45) BOARD_ID1 GPIO_213(M47) BOARD_ID2 GPIO_223(H48) BOARD_ID3 GP_CAMERASB10(R34) Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 <david.wei@intel.com> CC: Mang Guo <mang.guo@intel.com> CC: Shifei Lu <shifeix.a.lu@intel.com>
2017-05-09Configure GPIO.Lu, ShifeiX A
GPIO configuration for Low Speed Expander and System Feature Expander pins. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: lushifex <shifeix.a.lu@intel.com> Reviewed-by: zwei4 <david.wei@intel.com>
2017-05-09GPIO clean up.Lu, ShifeiX A
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: lushifex <shifeix.a.lu@intel.com>
2017-05-09GPIO clean up.Wei, David
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: lushifex <shifeix.a.lu@intel.com> Reviewed-by: zwei4 <david.wei@intel.com>
2017-05-09Fix RAM size issueGuo Mang
RAM SIZE in frontpage is not correct. Pass correct DRAM density parameter to FSP to fix this issue. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang <mang.guo@intel.com> Reviewed-by: zwei4 <david.wei@intel.com>
2017-05-09Fix MRC restore issueGuo Mang
MCR parameter restored in the second time of boot, so the boot time is less than the first time of boot. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang <mang.guo@intel.com> Reviewed-by: zwei4 <david.wei@intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-01 19:13:10 +0000