Age | Commit message (Collapse) | Author |
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Upgrate core to UDK2018: Fix GCC build failure.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Guo Mang <mang.guo@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Guo Mang <mang.guo@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Guo Mang <mang.guo@intel.com>
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Copy Pei core and PCD driver from edk2 because we need to do override on these two drivers.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Guo Mang <mang.guo@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Guo Mang <mang.guo@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: David Wei <david.wei@intel.com>
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Change from BDS of IntelFrameworkModulePkg to BDS of MdeModulePkg.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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Add library instance of PlatformBootManagerLib.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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The _UID must be unique across all devices with a common _HID.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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Change Bit 2 (SUSPWRDNACKCFG) of Power Sequence Configuration register (offset 0x2A) to 1.
If SUSPWRDNACKCFG is 0, SUSPWRDNACK signal is ignored. PMIC will not go to G3 when SUSPWRDNACK goes high in S4 state.
If SUSPWRDNACKCFG is 1, PMIC responses to SUSPWRDNACK signal.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: tsrytkon <teemu.s.rytkonen@intel.com>
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Adds support for two ACPI entries for PCA9956 LED drivers
for SueCreek DMIC board.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Teemu Rytkonen <teemu.s.rytkonen@intel.com>
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The FSP-S preferred memory region, which is defined in FSP Integration Guide, must be reserved for BIOS S3 resume.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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Disable xDCI and assign USB3 Port 0 (OTG port) to xHCI.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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Adds support for two ACPI entries for imx219 as front
and back camera of IPU. Both camera entries can be configured
from the Front, Back camera of the BIOS menu settings.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Teemu Rytkonen <teemu.s.rytkonen@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Add board specific code for Aurora Glacier.
Build command is "BuildBIOS /AG /A /vs13 Broxton Release".
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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Customize I2S virtual bus ID for different boards.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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Change binaries from Common folder to Board folder.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
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Add build script for E0 stepping LeafHill FAB D CRB board.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
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Enable HD audio on Intel reference board.
(1) Enable HdAudioDspUaaCompliance.
(2) Move audio verb table to board specifc folder.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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Change board name on Minnowboard 3 and Minnowboard 3 Module.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
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Add a temporary platform workaround to downgrade eMMC host from HS400 to HS200 on MinnowBoard 3 FAB B and MinnowBoard 3 Next Pre-production board.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
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Add code for Minnowboard3 Next pre-production board.
Build Command: BuildBios /vs13 /MX /A Broxton Release.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Guo Mang <mang.guo@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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-Enable generic SPI device for BensonGlacier config to be
used with SenseHat board.
-Enable GPIO config to enable SenseHat board programming
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Teemu Rytkonen <teemu.s.rytkonen@intel.com>
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Add code in ACPI table for TI audio codec under I2C5.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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Add code for Benson Glacier FAB B.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Guo Mang <mang.guo@intel.com>
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Add I2C table for on-board WM8731 I2S audio.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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New FCE will cause 15063 Windows10 install fail, so revert it to old version
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Guo Mang <mang.guo@intel.com>
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1. Add FCE for GCC build
2. Change build script to make sure that system can still boot after Setup variable deletion
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Guo Mang <mang.guo@intel.com>
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Change VS build FCE version to 0.33
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Guo Mang <mang.guo@intel.com>
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"TPM Device" setup display redundant items. Remove "TPM Device" "dTPM 1.2" and "dTPM 2.0" options
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: xianhu2x <xianhuix.liu@intel.com>
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Use Pcd to select blue tooth device.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: xianhu2x <xianhuix.liu@intel.com>
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Showing QR code and website link to screen under EFI shell for MinnowBoard. Output website link to serial port too.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: xianhu2x <xianhuix.liu@intel.com>
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1. Change SPI mode and speed for SueCreek
2. Update SueCreek HOST_IRQ and HOST_RST GPIO configuration
3. Add a PCD to make sure that SueCreek only reported to OS when it is actually present on the board.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yeon Sil Yoon <yeon.sil.yoon@intel.com>
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Move VBT tables from common folder into board specific folders.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
Cc: Loeppert, Anthony <anthony.loeppert@intel.com>
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Show different board names for different boards.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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Change build script to generate different BIOS ID to differentiate Minnow3 and Benson Glacier board.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
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Change Reset Type according to different Board.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
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Force RTC century to 20 in case core driver has failed to
initialize it.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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Some PCIe device, such as Intel8265NGW/8260NGW WiFi device, disappears after reboot. PCIe root port De-emphasis has to be disabled to fix this issue.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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Remove code that disables GT RC6. This could allow GT to enter deep sleep when it is idle, so that more power could be saved for core to use. This temp solution allows core frequency maximally rise to 1100MHz.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
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