Age | Commit message (Collapse) | Author |
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Add Apollo Lake SMBus host controller DXE driver.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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Apollo Lake South Cluster SMBus executive code, which is common for PEI, DXE and SMM modules.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
Cc: Mang Guo <mang.guo@intel.com>
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Customize I2S virtual bus ID for different boards.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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Add build script for E0 stepping LeafHill FAB D CRB board.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Guo Mang <mang.guo@intel.com>
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Add code for Minnowboard3 Next pre-production board.
Build Command: BuildBios /vs13 /MX /A Broxton Release.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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Add code in ACPI table for TI audio codec under I2C5.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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Boot failed after PTT is enabled with gcc-built image
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: xianhu2x <xianhuix.liu@intel.com>
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1. Change SPI mode and speed for SueCreek
2. Update SueCreek HOST_IRQ and HOST_RST GPIO configuration
3. Add a PCD to make sure that SueCreek only reported to OS when it is actually present on the board.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yeon Sil Yoon <yeon.sil.yoon@intel.com>
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Change Max Baud Rate to 115200.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Guo Mang <mang.guo@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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Change Reset Type according to different Board.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
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Change code to integrate MR3 FSP.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Guo Mang <mang.guo@intel.com>
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Enable GCC build BIOS image Yocto S3 support. Replace CPU drivers with drivers from core packages.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
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Signed-off-by: zwei4 <david.wei@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
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Add Platform eMMC/SD driver.
This reverts commit 66d48af2d24645263b8068e261abc58d84cc2b93.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
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Change code which is not compatible with GCC.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Upgrade core to UDK2017
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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When restoring MSR for S3 setting, SmmStartupThisAp will return error if CPU index is BSP. This issue caused S3 resume failed sometimes. This patch is mainly fix this issue.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Add additional SATA initialization code.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Fix "AcpiGlobalVariable" couldn't be get issue. S3 memory info was saved in this variable.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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MCR parameter restored in the second time of boot, so the boot time is less than the first time of boot.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
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Cleanup code about locking SPI Flash; Change the default value of BIOS Lock setup option to FALSE.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: David Wei <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
Reviewed-by: David Wei <david.wei@intel.com>
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These code cause HDMI cable of some vendor couldn't work.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: lushifex <shifeix.a.lu@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: David Wei <david.wei@intel.com>
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Restore P2SB's, as well as GPIO controllers', MMIO resources to original values which have been overridden by PCI bus driver.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Remove silicon platform policy which is not used by any silicon code.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
Reviewed-by: Mang Guo <mang.guo@intel.com>
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Fix build error for latest VS2015 compiler with IA32 tip.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
Reviewed-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
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