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AgeCommit message (Expand)Author
2017-10-05D05/PCIe: Modify PcieRegionBase of secondary chipMing Huang
2017-10-05Hisilicon/PciHostBridgeDxe: Assign BAR resource from PciRegionBaseHeyi Guo
2017-10-05Hisilicon: Fix the drivers use the same GUID issueHeyi Guo
2017-09-01Platform/Hisilicon: switch to NonCoherentDmaLibArd Biesheuvel
2017-08-29Silicon/Hisilicon: switch to NonDiscoverable driver for EHCIArd Biesheuvel
2017-08-29Silicon/Hisilicon/SasV1Dxe: remove bogus UncachedMemoryAllocationLib refArd Biesheuvel
2017-08-24Silicon/Openmoko: add driver for ChaosKey RNG USB deviceArd Biesheuvel
2017-08-21Silicon/AMD/Styx: Use PcdSataPortMode properly for two controllersAlan Ott
2017-08-21Silicon/AMD/Styx: Make PcdSataPortMode 32 bitsAlan Ott
2017-08-03Platform,Silicon: Import Hisilicon D02,D03,D05 and HiKeyLeif Lindholm
2017-08-03Platform,Silicon: import AMD Styx SoC support and platformsLeif Lindholm