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2015-09-05UefiCpuPkg/MtrrLib: MtrrValidBitsMask and MtrrValidAddressMask wrongJeff Fan
Per IA32 SDM, if CPUID.80000008H is not available, software may assume that the processor supports a 36-bit physical address size. However, for such old processors (For example, Quark processor), MtrrValidBitsMask and MtrrValidAddressMask values are reverted and wrong in MtrrLib. MtrrValidBitsMask should be 0xFFFFFFFFFULL and MtrrValidAddressMask should be 0xFFFFFF000ULL. (Sync patch r18396 from main trunk.) Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18399 6f19259b-4bc3-4df7-8a09-765794883524
2014-01-07MtrrDebugPrintAllMtrrs() should loop until the max physical address is reached. Jeff Fan
GetMemoryCacheTypeFromMtrrType () should return the default memory type instead of UC type for MTRR_CACHE_INVALID_TYPE. Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15053 6f19259b-4bc3-4df7-8a09-765794883524
2012-10-10Add missing parameter in functions header.vanjeff
signed-off-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13815 6f19259b-4bc3-4df7-8a09-765794883524
2012-09-27Save and disable CPU interrupt before programming MTRR settings, and restore ↵vanjeff
the CPU interrupt after programming MTRR setting. signed-off-by: Kinney, Michael D <michael.d.kinney@intel.com> reviewed-by: Bjorge, Erik C <erik.c.bjorge@intel.com> reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13749 6f19259b-4bc3-4df7-8a09-765794883524
2012-04-11UefiCpuPkg MtrrLib: For MtrrSetAllMtrrs(), do not set FE/E bits in ↵rsun3
IA32_MTRR_DEF_TYPE MSR after the MSR is restored. Signed-off-by: Sun Rui <rui.sun@intel.com> Reviewed-by: Fan Jeff <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13182 6f19259b-4bc3-4df7-8a09-765794883524
2011-11-25UefiCpuPkg MTRR Library: Remove a buggy check logic in ↵rsun3
MtrrSetMemoryAttribute() that may incorrectly RETURN_OUT_OF_RESOURCES in some cases. Signed-off-by: rsun3 Reviewed-by: vanjeff git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12780 6f19259b-4bc3-4df7-8a09-765794883524
2011-10-281. Introduce the API MtrrGetDefaultMemoryType () in Mtrr Library.vanjeff
2. Invoke MtrrGetDefaultMemoryType() to get the default memory type instead of the hard code value in module. 3. Add go though for UC attributes. Signed-off-by: vanjeff Reviewed-by: rsun3 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12587 6f19259b-4bc3-4df7-8a09-765794883524
2011-09-20UefiCpuPkg MTRR Library: enhance MTRR Library.rsun3
When it finds that a request range is covered by an existing MTRR with same cache type, the MTRR library set a flag and continues to check other MTRRs and invalidate any MTRR of the same request range with a higher-priority cache type. Signed-off-by: rsun3 Reviewed-by: gxing git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12388 6f19259b-4bc3-4df7-8a09-765794883524
2011-09-13Enhance the MTRR lib to support the case where alignment of base address < ↵rsun3
length. Signed-off by: rsun3 Reviewed-by: hhuan13 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12330 6f19259b-4bc3-4df7-8a09-765794883524
2011-01-11Remove extra {} inside DEBUG_CODE() macromdkinney
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11244 6f19259b-4bc3-4df7-8a09-765794883524
2011-01-07Fix 32-bit build breakmdkinney
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11235 6f19259b-4bc3-4df7-8a09-765794883524
2011-01-06Add DEBUG() macros for DEBUG_CACHE to MTRR Library show all changes memory ↵mdkinney
caches setting changes. If DEBUG_PROPERTY_DEBUG_CODE_ENABLED is also set in PcdDebugPropertyMask, then the entire set of MTRRs will be displayed on every memory cache setting change. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11231 6f19259b-4bc3-4df7-8a09-765794883524
2010-08-10Add boundary check against variable MTRR count.xli24
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10787 6f19259b-4bc3-4df7-8a09-765794883524
2010-07-13Code refinement.xli24
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10647 6f19259b-4bc3-4df7-8a09-765794883524
2010-04-24Update the copyright notice formathhtian
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10429 6f19259b-4bc3-4df7-8a09-765794883524
2010-04-16Fixed GCC 4.4 build issues due to EFIAPI not being used when required.geekboy15a
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10380 6f19259b-4bc3-4df7-8a09-765794883524
2010-03-10Add Checking for MTRR existence.xli24
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10223 6f19259b-4bc3-4df7-8a09-765794883524
2010-03-04Add array index check to avoid potential buffer overflow.xli24
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10179 6f19259b-4bc3-4df7-8a09-765794883524
2010-02-14Use atomic AsmDisableCache() and AsmDisableCache() functions instead of ↵mdkinney
AsmWriteCr0() and AsmWbinvd() calls git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9998 6f19259b-4bc3-4df7-8a09-765794883524
2010-02-05Revert incompatible change:jyao1
1) No API change from old version. 2) Change MACRO: #define MTRR_NUMBER_OF_VARIABLE_MTRR 32 // the semantics are changed from NUMBER to MAX_NUMBER. #define FIRMWARE_VARIABLE_MTRR_NUMBER 6 // wrong and deprecated #define MTRR_LIB_IA32_VARIABLE_MTRR_END 0x20F // wrong and deprecated #define RESERVED_FIRMWARE_VARIABLE_MTRR_NUMBER 2 // add new one. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9941 6f19259b-4bc3-4df7-8a09-765794883524
2010-02-05Original MTRR lib hardcode VARIABLE_MTRR as 8. But it is 7 in Core2 if SMRR ↵jyao1
enabled, and 10 in latest Corei7. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9935 6f19259b-4bc3-4df7-8a09-765794883524
2009-05-27Add MTRR library for IA32 & X64 processor architectures.jljusten
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8394 6f19259b-4bc3-4df7-8a09-765794883524
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