summaryrefslogtreecommitdiff
path: root/UefiCpuPkg/Library
AgeCommit message (Collapse)Author
2015-04-27UefiCpuPkg/CpuExceptionHandlerLib: Support IA32 processors without DE or ↵Michael Kinney
FXSAVE/FXRESTOR Use CPUID Leaf 01 to detect support for debug extensions and FXSAVE/FXRESTOR instructions. Do not enable those features in CR4 if they are not supported. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17221 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-27MdePkg/BaseXApicX2ApicLib: Support IA32 processors without ↵Michael Kinney
MSR_IA32_APIC_BASE_ADDRESS Use Family from CPUID 01 to detect support for the Local APIC Base Address MSR (MSR_IA32_APIC_BASE_ADDRESS). If this MSR is not supported, then use Local APIC Base Address from the PCD PcdCpuLocalApicBaseAddress. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17217 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-27MdePkg/BaseXApicLib: Support IA32 processors without MSR_IA32_APIC_BASE_ADDRESSMichael Kinney
Use Family from CPUID 01 to detect support for the Local APIC Base Address MSR (MSR_IA32_APIC_BASE_ADDRESS). If this MSR is not supported, then use Local APIC Base Address from the PCD PcdCpuLocalApicBaseAddress. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17216 6f19259b-4bc3-4df7-8a09-765794883524
2015-01-16Refine the format of PCD in INF files for UefiCpuPkg.Shumin Qiu
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Shumin Qiu <shumin.qiu@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16617 6f19259b-4bc3-4df7-8a09-765794883524
2014-12-17UefiCpuPkg CpuExceptionHandlerLib: Use %rax instead of %eax to make code ↵Jeff Fan
consistence. Make code consistence between ASM and S files. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16530 6f19259b-4bc3-4df7-8a09-765794883524
2014-11-06Remove un-used PPI reference.Jeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16303 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-12UefiCpuPkg: error: invalid instruction mnemonic 'retf'Nikolai Saoukh
.S assembler files must be AT&T syntax ones. So Intel syntax mnemonic is not good. Discovered by clang integrated assembler. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Nikolai Saoukh <nms@otdel-1.org> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16100 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-12UefiCpuPkg: error: invalid instruction mnemonic 'retf'Nikolai Saoukh
.S assembler files must be AT&T syntax ones. So Intel syntax mnemonic is not good. Discovered by clang integrated assembler. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Nikolai Saoukh <nms@otdel-1.org> Reviewed-by: Andrew Fish <afish@apple.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16098 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-09UefiCpuPkg: CpuExceptionHandlerLib: Make self modifying code work with XcodeAnderw Fish
CpuExceptionHandlerLib has code that contains absolute relocations, not supported by Xcode for X64, and it then copies this code to an alternate location in memory. It is very hard to write IP relative self-modifiying code. I had to update AsmVectorNumFixup() to also patch in the absolute addressess after the code was copied. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Anderw Fish <afish@apple.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16068 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-03UefiCpuPkg: Convert non DOS format files to DOS formatGao, Liming
Module UNI and Package UNI files are not DOS format. Convert them to DOS format. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gao, Liming <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16047 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-28UefiCpuPkg: INF/DEC file updates to EDK II packagesGao, Liming
2. Add MODULE_UNI_FILE file that contains the localized Abstract and Description of a module. a. Addresses an information gap between INF files and the UEFI Distribution Packaging Specification XML schema b. There will be an associated update to UPT in BaseTools to consume MODULE_UNI_FILE and associated UNI file during UDP creation that performs the INF -> XML conversion. c. There will be an associated update to UPT in BaseTools to produce MODULE_UNI_FILE and associated UNI file during UDP installation that performs the XML -> INF conversion. 3. Add Module Extra UNI file that provides the localized Name of a module. a. [UserExtensions.TianoCore."ExtraFiles"] provides an easy method for a module to specify extra files not listed in [Sources] or [Binaries] sections to be added to a UDP without having to list the files in the UPT package information data file. b. There will be an associated update to UPT in BaseTools to package up files listed in [UserExtensions.TianoCore."ExtraFiles"] during UDP creation. c. UNI file contains localized name of a module to go along with the localized Abstract and Description from the MODULE_UNI_FILE. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gao, Liming <liming.gao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15934 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-28UefiCpuPkg: INF/DEC file updates to EDK II packagesGao, Liming
1. Usage information in INF file comment blocks are either incomplete or incorrect. This includes usage information for Protocols/PPIs/GUIDs/PCDs/HOBs/Events/BootModes. The syntax for usage information in comment blocks is defined in the EDK II Module Information (INF) Specification Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gao, Liming <liming.gao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15933 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-111. Save/restore ICR high 32bit value and check Delivery Status before ↵Jeff Fan
sending IPI. It could be fix the interrupted issue between ICR high/low writes by SMI handler. 2. Save/restore CPU Interrupt state around sending IPI. It could avoid sending IPI be interrupted by CPU interrupt handler. 3. Add note for SetApicMode() API that must not be called from an interrupt handler or SMI handler. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Kinney, Michael <michael.d.kinney@intel.com> Reviewed-by: Mudusuru, Giri <giri.p.mudusuru@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15652 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-10Introduce one PCD PcdCpuInitIpiDelayInMicroSeconds to specify the delay ↵Jeff Fan
value after sending out INIT IPI instead of hard code 10 MicroSeconds. Its default value is 10 millisecond per IA32 manual. Platform could customize this PCD value for performance requirement. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Kinney, Michael <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15650 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-09Fixed typos: hanlder should be handler.Chen Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15642 6f19259b-4bc3-4df7-8a09-765794883524
2014-06-30Fix the potential address overflow issue when checking PE signature. Jeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15602 6f19259b-4bc3-4df7-8a09-765794883524
2014-01-22Fix CRLF formatTian, Hot
Signed-off-by: Tian, Hot <hot.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15162 6f19259b-4bc3-4df7-8a09-765794883524
2014-01-10Fix bug when reserve stack space to fill exception context.Jeff Fan
Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15086 6f19259b-4bc3-4df7-8a09-765794883524
2014-01-07MtrrDebugPrintAllMtrrs() should loop until the max physical address is reached. Jeff Fan
GetMemoryCacheTypeFromMtrrType () should return the default memory type instead of UC type for MTRR_CACHE_INVALID_TYPE. Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15053 6f19259b-4bc3-4df7-8a09-765794883524
2013-12-201. Only dump CPU Context and CpuDeadLoop () for CPU exception.Jeff Fan
2. mEnabledInterruptNum is total enabled interrupt number, InterruptType should less than mEnabledInterruptNum. Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15012 6f19259b-4bc3-4df7-8a09-765794883524
2013-12-13Fix meta file issue.Jeff Fan
Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Hesheng Chen <hesheng.chen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14978 6f19259b-4bc3-4df7-8a09-765794883524
2013-12-11Correct INF file to make module pass ICC compiler.Liming Gao
Signed-off-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14961 6f19259b-4bc3-4df7-8a09-765794883524
2013-12-06Fix comments format issue.Jeff Fan
Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14934 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-30Add missing ASM_PFX for HookAfterStubHeaderEnd.Jeff Fan
Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14922 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-29Fixed typo: HookAfterStubEnd should be HookAfterStubHeaderEnd. It will make ↵Jeff Fan
UINIXGCC IA32 build issue: Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14921 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-29UefiCpuPkg: Using the "movabsq" instruction to read global variable ↵Laszlo Ersek
mDoFarReturnFlag and mErrorCodeFlag to avoid page fault with big RAM sizes (> 2GB). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14920 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-26Cleanup unused ReportStatusCodeLib reference.Jeff Fan
Signed-off-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14898 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-221. Separated DxeSmmCpuExceptionHandlerLib.inf into 2 instance ↵Jeff Fan
DxeCpuExceptionHandlerLib.inf and SmmCpuExceptionHandlerLib.inf. 2. Updated CPU Exception Handler Library instance according to the new CPU Exception Handler Library class definitions. 3. Updated CPU Exception Handler Library instance to handle the vector attributes defined in PI 1.2.1. Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Hot Tian <hot.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14885 6f19259b-4bc3-4df7-8a09-765794883524
2013-09-161. Read 32bit CPU Init APIC ID from CPUID leaf B in XAPIC mode.Jeff Fan
2. Read CPU APIC ID from CPUID leaf B in case CPU Init APIC ID is larger 255 in XAPIC mode. Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14674 6f19259b-4bc3-4df7-8a09-765794883524
2013-08-27Removed the assumption on APIC timer initial Count is all 1s and updated it ↵Jeff Fan
to handle the long delay that timer initial count. Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14604 6f19259b-4bc3-4df7-8a09-765794883524
2013-02-05Fix build issue on DDK3790 tool chain.vanjeff
Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14122 6f19259b-4bc3-4df7-8a09-765794883524
2012-10-10Add missing parameter in functions header.vanjeff
signed-off-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13815 6f19259b-4bc3-4df7-8a09-765794883524
2012-09-27Save and disable CPU interrupt before programming MTRR settings, and restore ↵vanjeff
the CPU interrupt after programming MTRR setting. signed-off-by: Kinney, Michael D <michael.d.kinney@intel.com> reviewed-by: Bjorge, Erik C <erik.c.bjorge@intel.com> reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13749 6f19259b-4bc3-4df7-8a09-765794883524
2012-08-231. Added SetLocalApicBaseAdress() and GetLocalApicBaseAddress() APIs in ↵vanjeff
Local APIC library. 2. Updated Local APIC library instances to get Local APIC base Address by invoking GetLocalApicBaseAddress() instead of by PCD PcdCpuLocalApicBaseAddress. Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Kinney Michael D <michael.d.kinney@intel.com> Reviewed-by: Rui Sun <rui.sun@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13668 6f19259b-4bc3-4df7-8a09-765794883524
2012-07-05UefiCpuPkg BaseUefiCpuLib: Change the initialization value for x87 FPU ↵rsun3
Control Word for x64 arch from 0x27f to 0x37f per UEFI 2.3.1c spec. Signed-off-by: Sun Rui <rui.sun@intel.com> Reviewed-by: Fan Jeff <jeff.fan@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13506 6f19259b-4bc3-4df7-8a09-765794883524
2012-05-31Remove CPU dead loop code from IA32 assembly codes.vanjeff
Signed-off-by: Fan Jeff <jeff.fan@intel.com> Reviewed-by: Sun Rui <rui.sun@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13388 6f19259b-4bc3-4df7-8a09-765794883524
2012-04-11UefiCpuPkg MtrrLib: For MtrrSetAllMtrrs(), do not set FE/E bits in ↵rsun3
IA32_MTRR_DEF_TYPE MSR after the MSR is restored. Signed-off-by: Sun Rui <rui.sun@intel.com> Reviewed-by: Fan Jeff <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13182 6f19259b-4bc3-4df7-8a09-765794883524
2012-03-19Fix doxgen format issue.vanjeff
Signed-off-by: vanjeff git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13112 6f19259b-4bc3-4df7-8a09-765794883524
2012-03-15Import two CPU Exception Handler Library instances: ↵vanjeff
SecPeiCpuExceptionHandler.inf and DxeSmmCpuExceptionHandler.inf. Signed-off-by: vanjeff Reviewed-by: jyao1 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13098 6f19259b-4bc3-4df7-8a09-765794883524
2011-11-25UefiCpuPkg MTRR Library: Remove a buggy check logic in ↵rsun3
MtrrSetMemoryAttribute() that may incorrectly RETURN_OUT_OF_RESOURCES in some cases. Signed-off-by: rsun3 Reviewed-by: vanjeff git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12780 6f19259b-4bc3-4df7-8a09-765794883524
2011-10-281. Introduce the API MtrrGetDefaultMemoryType () in Mtrr Library.vanjeff
2. Invoke MtrrGetDefaultMemoryType() to get the default memory type instead of the hard code value in module. 3. Add go though for UC attributes. Signed-off-by: vanjeff Reviewed-by: rsun3 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12587 6f19259b-4bc3-4df7-8a09-765794883524
2011-10-27Update Base type SecPeiDxeTimerLibUefiCpu to support all module type.lgao4
Signed-off-by: lgao4 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12576 6f19259b-4bc3-4df7-8a09-765794883524
2011-09-20UefiCpuPkg MTRR Library: enhance MTRR Library.rsun3
When it finds that a request range is covered by an existing MTRR with same cache type, the MTRR library set a flag and continues to check other MTRRs and invalidate any MTRR of the same request range with a higher-priority cache type. Signed-off-by: rsun3 Reviewed-by: gxing git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12388 6f19259b-4bc3-4df7-8a09-765794883524
2011-09-13Enhance the MTRR lib to support the case where alignment of base address < ↵rsun3
length. Signed-off by: rsun3 Reviewed-by: hhuan13 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12330 6f19259b-4bc3-4df7-8a09-765794883524
2011-09-02Add generic HPET Timer DXE Driver and support librariesmdkinney
Signed-off-by: mdkinney Reviewed-by: li-elvin git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12259 6f19259b-4bc3-4df7-8a09-765794883524
2011-08-25Add new API GetTimeInNanoSecond() to TimerLib to convert elapsed ticks to ↵xdu2
time in unit of nanoseconds. Signed-off-by: xdu2 Reviewed-by: mdkinney git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12206 6f19259b-4bc3-4df7-8a09-765794883524
2011-01-11Remove extra {} inside DEBUG_CODE() macromdkinney
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11244 6f19259b-4bc3-4df7-8a09-765794883524
2011-01-07Fix 32-bit build breakmdkinney
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11235 6f19259b-4bc3-4df7-8a09-765794883524
2011-01-06Add DEBUG() macros for DEBUG_CACHE to MTRR Library show all changes memory ↵mdkinney
caches setting changes. If DEBUG_PROPERTY_DEBUG_CODE_ENABLED is also set in PcdDebugPropertyMask, then the entire set of MTRRs will be displayed on every memory cache setting change. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11231 6f19259b-4bc3-4df7-8a09-765794883524
2010-11-29Lost a file in last check-in.rsun3
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11101 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-19 09:04:05 +0000