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2015-09-05UefiCpuPkg/MtrrLib: MtrrValidBitsMask and MtrrValidAddressMask wrongJeff Fan
Per IA32 SDM, if CPUID.80000008H is not available, software may assume that the processor supports a 36-bit physical address size. However, for such old processors (For example, Quark processor), MtrrValidBitsMask and MtrrValidAddressMask values are reverted and wrong in MtrrLib. MtrrValidBitsMask should be 0xFFFFFFFFFULL and MtrrValidAddressMask should be 0xFFFFFF000ULL. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18396 6f19259b-4bc3-4df7-8a09-765794883524
2015-09-01UefiCpuPkg/CpuMpPei: Fix CPU Healthy issue in PeiGetProcessorInfo ()Jeff Fan
CPU Healthy state maybe changed by software. We should return Healthy state from Healthy bit instead of from CPU BIST hardware information. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18374 6f19259b-4bc3-4df7-8a09-765794883524
2015-09-01UefiCpuPkg/CpuMpPei: Check Function pointer in PeiStartupAllAPs ()Jeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18373 6f19259b-4bc3-4df7-8a09-765794883524
2015-09-01UefiCpuPkg/CpuMpPei: Update the old/new BSP state in SwitchBsp()Jeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18372 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-08UefiCpuPkg CpuDxe: Sync up the settings of Execute Disable to APsStar Zeng
when stack NX has been enabled for BSP. DxeIpl may have enabled Execute Disable for BSP, APs need to get the status and sync up the settings, otherwise EFI_MP_SERVICES_PROTOCOL->StartupAllAPs may not work. Got positive comments and test result from Laszlo for the early draft patch, thanks. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Tested-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18191 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-06UefiCpuPkg/CpuMpPei: Update files format to DOSJeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18168 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-05UefiCpuPkg/CpuMpPei: Add meta data descriptionJeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Qiu Shumin <shumin.qiu@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18158 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-28UefiCpuPkg: Add missing PCD usage information in UNI files.Qiu Shumin
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Qiu Shumin <shumin.qiu@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18086 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Register callback on End Of Pei PPIJeff Fan
Add CpuMpEndOfPeiCallback () to restore wakeup buffer data on S3 path and flag flag wakeup buffer to be un-used type on normal boot path. Set one EndOfPei flag save/restore wakeup buffer when wakeup APs every time. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18014 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Add AsmHltLoop ()Jeff Fan
Add AsmHltLoop () in assembly code, it will not be copied into AP wakeup buffer and invoked at end of ApCFunction (). To make sure AP work in case AP wakeup buffer is restored to original data. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18013 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Install PI CPU MP PPIJeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18012 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Implementation of PeiEnableDisableAP ()Jeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18011 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Implementation of PeiSwitchBSP ()Jeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18010 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Implementation of PeiStartupThisAP ()Jeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18009 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Implementation of PeiStartupAllAPs ()Jeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18008 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Implementation of PeiGetProcessorInfo ()Jeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18007 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Implementation of PeiGetNumberOfProcessors ()Jeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18006 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Implementation of PeiWhoAmI ()Jeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18005 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Update and publish CPU BIST informationJeff Fan
Get CPU BIST information from SEC Platform Information(2) PPIs and update them accordingly. Install(Reinstall) SEC Platform Information2 PPI to published the new CPU BIST. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18004 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Build one GUIDed HOB to save CPU MP DataJeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18003 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Load microcode on BSP and APsJeff Fan
Add DetectMicrocode() to load microcode on BSP and APs. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18002 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg: Add some CPUID definitionsJeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18001 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg: Add microcode PCDsJeff Fan
Add PCDs PcdCpuMicrocodePatchAddress and PcdCpuMicrocodePatchRegionSize that are used to detect microcode patch from microcode region. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18000 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Sync BPS's mtrr setting to APsJeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17999 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Sort APIC ID in ascending orderJeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17998 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Wakeup APs and collect AP countJeff Fan
BSP will send broadcast INIT Startup IPI to all APs and collect APs count and BIST information. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17997 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg: Add PcdCpuApInitTimeOutInMicroSecondsJeff Fan
This PCD is used to specify timeout value for BSP to detect all APs for the first time. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17996 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Prepare for buffer for AP wakeup and CPU MP dataJeff Fan
Get AP wakeup buffer and copy AP reset code into it. Allocate APs' stack and CPU MP data buffer. Fill CPU MP data fields accordingly. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17995 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Get AP reset code size and far jump informationJeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17994 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Initialize FPU per UEFI specificationJeff Fan
Invoke InitializeFloatingPointUnits() to initialize FPU per UEFI specification before call C function in assembly code. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17993 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Add AP reset x64 assembly codeJeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17992 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Add AP reset IA32 assembly codeJeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17991 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Add MP exchange structure definitionJeff Fan
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17990 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Find available memory < 1MB for AP reset codeJeff Fan
Search memory resource HOB list to find one available system memory under 1MB for AP reset code and exchange information between BSP and APs. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17989 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg/CpuMpPei: Load GDT table on BSPJeff Fan
Load new GDT table and update segment accordingly. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17988 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15UefiCpuPkg: Add CpuMpPei moduleJeff Fan
This module is to provide MP PPI services defined in PI 1.4. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17987 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-13UefiCpuPkg S3Resume2Pei: Fix ASSERT in WriteToOsS3PerformanceDataHao Wu
This commit will resolve the issue brought by r17744. AsciiStrCpyS (PerfData->Token, PERF_TOKEN_SIZE, Token); The above using of AsciiStrCpyS will cause ASSERT if Token is longer than PerfData->Token. Therefore, AsciiStrnCatS is used here to resolve the issue. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Qiu Shumin <shumin.qiu@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17934 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-08UefiCpuPkg/Library/CpuExceptionHandlerLib: Add exception type decoderJeff Fan
Add exception type decoder to print exception name string beside print exception type value. The exception names are from IA32 SDM. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17877 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-30UefiCpuPkg S3Resume2Pei: Use safe string functionsHao Wu
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17744 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-19UefiCpuPkg/CpuDxe: NumberOfData is not BOOLEAN typeJeff Fan
Should check NumberOfData value instead of treat its value as one BOOLEAN type. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Shuming Qiu <shuming.qiu@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17672 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-16UefiCpuPkg/CpuDxe: Get CPU BIST information from Guided HOBJeff Fan
Get CPU BIST information from gEfiSecPlatformInformation2PpiGuid or gEfiSecPlatformInformationPpiGuid Guided HOB and update the CPU healthy status for CPU MP Service. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17641 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-27UefiCpuPkg/CpuExceptionHandlerLib: Support IA32 processors without DE or ↵Michael Kinney
FXSAVE/FXRESTOR Use CPUID Leaf 01 to detect support for debug extensions and FXSAVE/FXRESTOR instructions. Do not enable those features in CR4 if they are not supported. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17221 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-27MdePkg/BaseXApicX2ApicLib: Support IA32 processors without ↵Michael Kinney
MSR_IA32_APIC_BASE_ADDRESS Use Family from CPUID 01 to detect support for the Local APIC Base Address MSR (MSR_IA32_APIC_BASE_ADDRESS). If this MSR is not supported, then use Local APIC Base Address from the PCD PcdCpuLocalApicBaseAddress. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17217 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-27MdePkg/BaseXApicLib: Support IA32 processors without MSR_IA32_APIC_BASE_ADDRESSMichael Kinney
Use Family from CPUID 01 to detect support for the Local APIC Base Address MSR (MSR_IA32_APIC_BASE_ADDRESS). If this MSR is not supported, then use Local APIC Base Address from the PCD PcdCpuLocalApicBaseAddress. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17216 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-09UefiCpuPkg: Avoid "error A2085" when DDK3790 tool chain is usedScott Duplichan
The DDK3790 tool chain fails when the PAUSE instruction is assembled: error A2085: instruction or register not accepted in current CPU mode The solution is to use the .686 directive along with the .xmm directive. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17134 6f19259b-4bc3-4df7-8a09-765794883524
2015-03-09UefiCpuPkg/MpSerivce: add volatile qualifiersChen Fan
For avoid the compiler optimizing the code, we let Parameter and Procedure in CpuData volatile. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17024 6f19259b-4bc3-4df7-8a09-765794883524
2015-03-09UefiCpuPkg/MpService: Put APs to sleep when not busy.Chen Fan
Add a new sleeping state for APs, when no procedure execution, put AP to sleep. when need to execute procedure, only need to wake up this AP by sent SIPI. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17023 6f19259b-4bc3-4df7-8a09-765794883524
2015-03-09UefiCpuPkg/MpService: put AP to busy state when executionChen Fan
CpuState should follow the process? Idle -> Ready -> Busy -> Finished ^ | | | + - - - - - - - - - - - - + Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17022 6f19259b-4bc3-4df7-8a09-765794883524
2015-03-09UefiCpuPkg/MpService: fix trivial typo in cpu stateChen Fan
CpuStateBuzy => CpuStateBusy Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17021 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-03*/Contributions.txt: Update example email addressJordan Justen
Use the example.com domain as recommended in RFC 2606. NOTE: This does not modify the wording of the "TianoCore Contribution Agreement 1.0" section Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Bruce Cran <bruce.cran@gmail.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16724 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-09 13:29:43 +0000