Age | Commit message (Collapse) | Author |
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Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15086 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Hot Tian <hot.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15079 6f19259b-4bc3-4df7-8a09-765794883524
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GetMemoryCacheTypeFromMtrrType () should return the default memory type instead of UC type for MTRR_CACHE_INVALID_TYPE.
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15053 6f19259b-4bc3-4df7-8a09-765794883524
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2. mEnabledInterruptNum is total enabled interrupt number, InterruptType should less than mEnabledInterruptNum.
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15012 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Hesheng Chen <hesheng.chen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14978 6f19259b-4bc3-4df7-8a09-765794883524
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S3RestoreConfig2() can optionally stack-switch to the SMM S3 Resume Entry
Point and ask it to transfer to S3ResumeExecuteBootScript().
Similarly, S3ResumeExecuteBootScript() stack-switches explicitly to the
boot script executor, and asks it to transfer to S3ResumeBootOs().
Currently the stack pointers specified for the SMM S3 Resume Entry Point
and the boot script executor to use for returning are derived from
addresses of the first local variables in S3RestoreConfig2() and
S3ResumeExecuteBootScript(), respectively.
Since (theoretically) the stack grows down as local variables are defined
and functions are called, the idea is presumably to allow the respective
callee to overwrite the caller's local variables. (The callees in
question can never return normally, only by explicit stack switching.)
Taking the address of "Status" is less portable than optimal however.
Compilers are free to juggle local variables at build time as they
please, including order and alignment on the stack. For example, when the
code is built for 64-bit PEI with gcc-4.8.2, the address of "Status"
trips up the alignment assertion in SwitchStack().
Let's align the address of "Status" down to CPU_STACK_ALIGNMENT
explicitly. If a compiler ensures such alignment and places "Status" at
the highest address automatically, then this change has no effect.
Otherwise, we'll prepare ReturnStackPointer values that (a) are correctly
aligned, (b) preserve the same amount or more (but never less) from the
caller's local variables than before, which should be safe.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed by: Jiewen Yao <Jiewen.Yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14977 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14961 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14934 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14922 6f19259b-4bc3-4df7-8a09-765794883524
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UINIXGCC IA32 build issue:
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14921 6f19259b-4bc3-4df7-8a09-765794883524
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mDoFarReturnFlag and mErrorCodeFlag to avoid page fault with big RAM sizes (> 2GB).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14920 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14898 6f19259b-4bc3-4df7-8a09-765794883524
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DxeCpuExceptionHandlerLib.inf and SmmCpuExceptionHandlerLib.inf.
2. Updated CPU Exception Handler Library instance according to the new CPU Exception Handler Library class definitions.
3. Updated CPU Exception Handler Library instance to handle the vector attributes defined in PI 1.2.1.
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Hot Tian <hot.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14885 6f19259b-4bc3-4df7-8a09-765794883524
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these are marked as DEBUG_ERROR when they are really not errors.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Samer El-Haj-Mahmoud <samer.el-haj-mahmoud@hp.com>
reviewed-by: Fan, Jeff <jeff.fan@intel.com>
reviewed-by: Tian, Feng <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14750 6f19259b-4bc3-4df7-8a09-765794883524
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Now, Transition32FlatTo64Flat calls SetCr3ForPageTables64
which is located in Ia32/PageTables64.asm.
This change is required so OVMF can replace the code in
Ia32/PageTables64.asm with code that generates page tables in
RAM.
Note: Since this change does not impact the functionality of the
current VTF0 binaries, they are not being updated. The resulting
new binaries were tested to verify there is no regression.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14714 6f19259b-4bc3-4df7-8a09-765794883524
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2. Read CPU APIC ID from CPUID leaf B in case CPU Init APIC ID is larger 255 in XAPIC mode.
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14674 6f19259b-4bc3-4df7-8a09-765794883524
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to handle the long delay that timer initial count.
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14604 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14122 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Li Elvin <elvin.li@intel.com>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
Reviewed-by: Ni Ruiyu <ruiyu.ni@intel.com>
Reviewed-by: Gao Liming <liming.gao@intel.com>
Reviewed-by: Tian Feng <feng.tian@intel.com>
Reviewed-by: Fan Jeff <jeff.fan@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13892 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Qian Ouyang <qian.ouyang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13817 6f19259b-4bc3-4df7-8a09-765794883524
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signed-off-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13815 6f19259b-4bc3-4df7-8a09-765794883524
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the CPU interrupt after programming MTRR setting.
signed-off-by: Kinney, Michael D <michael.d.kinney@intel.com>
reviewed-by: Bjorge, Erik C <erik.c.bjorge@intel.com>
reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13749 6f19259b-4bc3-4df7-8a09-765794883524
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signed-off-by: Jeff Fan <jeff.fan@intel.com>
reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13709 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Sun Rui <rui.sun@intel.com>
Reviewed-by: Gao Liming <liming.gao@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13686 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13684 6f19259b-4bc3-4df7-8a09-765794883524
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Local APIC library.
2. Updated Local APIC library instances to get Local APIC base Address by invoking GetLocalApicBaseAddress() instead of by PCD PcdCpuLocalApicBaseAddress.
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Kinney Michael D <michael.d.kinney@intel.com>
Reviewed-by: Rui Sun <rui.sun@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13668 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Rui Sun <rui.sun@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13667 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13649 6f19259b-4bc3-4df7-8a09-765794883524
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improve S3 performance.
signed-off-by: jiewen.yao@intel.com
reviewed-by: rui.sun@intel.com
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13631 6f19259b-4bc3-4df7-8a09-765794883524
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locating SmmAccess PPI in S3Resume S3ResumeExecuteBootScript(), and locate SmmAccess PPI and Open SMRAM region only when gEfiAcpiVariableGuid HOB is found in S3Resume S3RestoreConfig2().
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13592 6f19259b-4bc3-4df7-8a09-765794883524
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initialize X87 FPU Control Word for BSP.
For a platform tip with 32-bit PEI+64-bit DXE, InitializeFloatingPointUnits () should be called for BSP in the DXE phase.
Signed-off-by: Sun Rui <rui.sun@intel.com>
Reviewed-by: Fan Jeff <jeff.fan@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13511 6f19259b-4bc3-4df7-8a09-765794883524
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Control Word for x64 arch from 0x27f to 0x37f per UEFI 2.3.1c spec.
Signed-off-by: Sun Rui <rui.sun@intel.com>
Reviewed-by: Fan Jeff <jeff.fan@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13506 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13461 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Fan Jeff <jeff.fan@intel.com>
Reviewed-by: Sun Rui <rui.sun@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13388 6f19259b-4bc3-4df7-8a09-765794883524
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This patch enables interrupt delivery via the Local APIC as part of the initialization process.
Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
Reviewed-by: Rosenbaum, Lee G <lee.g.rosenbaum@intel.com>
Reviewed-by: Sun Rui <rui.sun@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13338 6f19259b-4bc3-4df7-8a09-765794883524
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SMM S3 resume.
SMM S3 resume may change memory cache type for flash memory range and thus RestoreS3PageTables() in which loops are executed to create page table would have negative performance impact on S3 resume. Move the call to RestoreS3PageTables() earlier before SMM S3 resume can avoid this issue.
Signed-off-by: Sun Rui <rui.sun@intel.com>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13231 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Hot Tian <hot.tian@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13213 6f19259b-4bc3-4df7-8a09-765794883524
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Contributions.txt documents the contribution process for all
tianocore projects. The conents of Contributions.txt should
match in all cases.
License.txt is a per-project document showing the license terms
used by that project.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13187 6f19259b-4bc3-4df7-8a09-765794883524
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IA32_MTRR_DEF_TYPE MSR after the MSR is restored.
Signed-off-by: Sun Rui <rui.sun@intel.com>
Reviewed-by: Fan Jeff <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13182 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: vanjeff
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13112 6f19259b-4bc3-4df7-8a09-765794883524
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and record S3 "ScriptExec" performance log before and after executing BootScriptExecutorEntrypoint in S3Reusme2Pei driver.
Signed-off-by: lzeng14
Reviewed-by: lgao4
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13108 6f19259b-4bc3-4df7-8a09-765794883524
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2. Updated BootScriptSaveOnS3SaveStateThunk restore IA32 IDT table before transferring to protected mode.
It could support exception handler in 32-bit Framework Boot Script code.
Signed-off-by: vanjeff
Reviewed-by: jyao1
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13099 6f19259b-4bc3-4df7-8a09-765794883524
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SecPeiCpuExceptionHandler.inf and DxeSmmCpuExceptionHandler.inf.
Signed-off-by: vanjeff
Reviewed-by: jyao1
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13098 6f19259b-4bc3-4df7-8a09-765794883524
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MdeModulePkg 0.91->0.92
UefiCpuPkg 0.1->0.2
Signed-off-by: rsun3
Reviewed-by: hhtian
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12851 6f19259b-4bc3-4df7-8a09-765794883524
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32-bit aligned on IA32 system.
Signed-off-by: vanjeff
Reviewed-by: mdkinney
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12808 6f19259b-4bc3-4df7-8a09-765794883524
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MtrrSetMemoryAttribute() that may incorrectly RETURN_OUT_OF_RESOURCES in some cases.
Signed-off-by: rsun3
Reviewed-by: vanjeff
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12780 6f19259b-4bc3-4df7-8a09-765794883524
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unregister user defined interrupt handler.
Signed-off-by: vanjeff
Reviewed-by: rsun3
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12719 6f19259b-4bc3-4df7-8a09-765794883524
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type, from MTRR_MEMORY_CACHE_TYPE to UINT8 since MtrrAttributes may be the value not belongs to MTRR_MEMORY_CACHE_TYPE.
Signed-off-by: vanjeff
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12609 6f19259b-4bc3-4df7-8a09-765794883524
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2. Invoke MtrrGetDefaultMemoryType() to get the default memory type instead of the hard code value in module.
3. Add go though for UC attributes.
Signed-off-by: vanjeff
Reviewed-by: rsun3
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12587 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: lgao4
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12576 6f19259b-4bc3-4df7-8a09-765794883524
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