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2016-11-09UefiCpuPkg/MpInitLib: Do not wakeup AP if only one processor supportedJeff Fan
If MaxLogicalProcessorNumber is only 1, we needn't to wake up APs at all and needn't to register callback functions. It could improve boot performance on single supported system. https://bugzilla.tianocore.org/show_bug.cgi?id=204 Cc: Feng Tian <feng.tian@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-11-09UefiCpuPkg: Display new stack base and sizeJeff Fan
Dump new stack base and size information could help developer to narrow down stack crash issue. Cc: Feng Tian <feng.tian@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-11-08UefiCpuPkg/MicrocodeUpdate: Add Microcode FMP build sampleJiewen Yao
This folder provides the sample build for Microcode FMP. The DSC/FDF is to convert the Microcode binary/text to Microcode FMP. Cc: Jeff Fan <jeff.fan@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
2016-11-08UefiCpuPkg/MicrocodeUpdate: Add MicrocodeUpdate component.Jiewen Yao
MicrocodeUpdate supports update Microcode region via UEFI FMP capsule. MicrocodeUpdate SetImage() will perform the Microcode version, ProcessorSignature/ProcessorFlag, and try to load microcode. If and only if the Microcode is loaded successfully, and new Microcode will be updated to system flash region. Cc: Jeff Fan <jeff.fan@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
2016-11-08UefiCpuPkg/MicrocodeFlashAccessLib: Add NULL MicrocodeFlashAccessLib.Jiewen Yao
Add NULL instance to pass build. Cc: Jeff Fan <jeff.fan@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
2016-11-08UefiCpuPkg/UefiCpuPkg.dec: Add Microcode capsule related definition.Jiewen Yao
1) Add Microcode capsule related GUID. gMicrocodeFmpImageTypeIdGuid 2) Add Microcode capsule related library. MicrocodeFlashAccessLib Cc: Jeff Fan <jeff.fan@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
2016-11-08UefiCpuPkg/Include: Add MicrocodeFlashAccessLib header.Jiewen Yao
This library is used to abstract microcode flash region access. This library is consumed by a microcode capsule update module. Cc: Jeff Fan <jeff.fan@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
2016-11-08UefiCpuPkg/Include: Add Microcode FMP definition.Jiewen Yao
It defined ImageTypeId for Microcode. Cc: Jeff Fan <jeff.fan@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
2016-11-08UefiCpuPkg/UefiCpuPkg.dsc: Add MicrocodeCapsule related component.Jiewen Yao
Add Microcode capsule related component to check build. Cc: Jeff Fan <jeff.fan@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
2016-11-03UefiCpuPkg PeiCpuExceptionHandlerLib: Add the missing nasm files in INFLiming Gao
All CpuExceptionHandlerLib library instances use nasm source files. Cc: Reviewed-by: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2016-11-02UefiCpuPkg/LocalApicLib: Add EFIAPI for GetProcessorLocationByApicId()Jeff Fan
We need to add EFIAPI for all interface service including library API. Contributed-under: TianoCore Contribution Agreement 1.0 Cc: Leo Duran <leo.duran@amd.com> Cc: Michael Kinney <Michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <Michael.d.kinney@intel.com> Reviewed-by: Leo Duran <leo.duran@amd.com>
2016-11-02UefiCpuPkg/LocalApicLib: Rename GetProcessorLocation()Jeff Fan
GetProcessorLocation() is too generic and will conflict with the API defined in Galileo Board Software Package v1.0.0. This update is just to rename GetProcessorLocation() to one specific name GetProcessorLocationByApicId(). Contributed-under: TianoCore Contribution Agreement 1.0 Cc: Leo Duran <leo.duran@amd.com> Cc: Michael Kinney <Michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <Michael.d.kinney@intel.com> Reviewed-by: Leo Duran <leo.duran@amd.com>
2016-11-01UefiCpuPkg: Move GetProcessorLocation() to LocalApicLib libraryLeo Duran
1) Remove SmmGetProcessorLocation() from PiSmmCpuDxeSmm driver. 2) Remove ExtractProcessorLocation() from MpInitLib library. 3) Add GetProcessorLocation() to BaseXApicLib and BaseXApicX2ApicLib. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leo Duran <leo.duran@amd.com> Signed-off-by: Michael Kinney <Michael.d.kinney@intel.com> Tested-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael Kinney <Michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2016-10-24UefiCpuPkg: Fix typos in commentsGary Lin
- excute -> execute - Retrive -> Retrieve - possilbe -> possible - CONTINOUS -> CONTINUOUS - storgage -> storage - allcated -> allocated - triggerred -> triggered - paramter -> parameter - perodically -> periodically - retore -> restore v2: - ruturn -> return Cc: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2016-10-18UefiCpuPkg/Cpuid: Remove wrong while-loop check after for-loopJeff Fan
while-loop check should not co-exist with for-loop. This should be typo when we check-in the original code. We should keep one loop only. This issue caused CLANG38 build failure reported by https://tianocore.acgmultimedia.com/show_bug.cgi?id=148 Contributed-under: TianoCore Contribution Agreement 1.0 Cc: Liming Gao <liming.gao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-09-21UefiCpuPkg/SecCore: SecPlatformInformation(2) are optional PPIsJeff Fan
Currently, this is ASSERT() if neither SecPlatformInformation2 nor SecPlatformInformation PPIs are found. This is not correct. Per PI specification both of them are optional PPI. Platform may not install them. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
2016-09-21UefiCpuPkg/SecCore: Fix comment typoJeff Fan
Revert SecPlatformInformation2 and SecPlatformInformation in two comment blocks. And correct the words. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
2016-09-14UefiCpuPkg/SecCore: Re-install SEC platform information(2) PPIJeff Fan
In SecTemporaryRamDone(), we will build one privated GUIDed-HOB to save CPU BIST Data and re-install SEC platform information(2) PPI. Then other PEI drivers could get CPU BIST data from the private GUIDed-HOB by new installed PPI. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@Intel.com>
2016-09-14UefiCpuPkg/SecCore: Abstract worker function GetBistFromHob()Jeff Fan
Abstract one worker function to get CPU BIST from the GUIDed-HOB. Add SecPlatformInformationBist() and SecPlatformInformation2Bist() to invoke GetBistFromHob(). Add in/out for parameter in function header. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@Intel.com>
2016-09-14UefiCpuPkg/SecCore: Add SecBist.cJeff Fan
Add SecBist.c and copy GetBistInfoFromPpi() and SecPlatformInformation2() from UefiCpuPkg/CpuMpPei/CpuBist.c. And update SecMain.c, SecMain.inf and UefiCpuPkg.dsc accordinlgy to pass build. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@Intel.com>
2016-09-14UefiCpuPkg/CpuMpPei: Build GUIDed-HOB to store all CPU BIST DataJeff Fan
Build gEfiSecPlatformInformation2PpiGuid GUIDed-HOB to store all CPU BIST data that could be used not only by SecPlatformInformation2(), but also by CPU MP Dxe driver to get CPU BIST data. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@Intel.com>
2016-09-14UefiCpuPkg/CpuMpPei: Fix BistData ouput errorJeff Fan
ProcessorInfo.ProcessorId is UINT64 type even it's valid value is UINT32. Use %x only output the low 4 bytes and keep the high 4 bytes in stack that will be output as the second parameter BistData. Typecast ProcessorInfo.ProcessorId to UINT32 could make BistData output correctly. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@Intel.com>
2016-09-14UefiCpuPkg/CpuMpPei: Add parameter BistInformationSizeJeff Fan
Add one OPTIONAL parameter BistInformationSize for GetBistInfoFromPpi(). Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@Intel.com>
2016-09-14UefiCpuPkg/CpuDxe: Fix duplicated status code reportJeff Fan
If CPU Bist data is not zero, we will report Status code. But there is one bug that will report each processor's status code duplicated with NumberOfData times. This fix is to exchange the loop order on NumberOfData and mNumberOfProcessors. It could make sure the report status code only once for each processor. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@Intel.com>
2016-09-08UefiCpuPkg/XeonPhiMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/XeonE7Msr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/XeonDMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/Xeon5600Msr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/SkylakeMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/SilvermontMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/SandyBridgeMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/PentiumMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/PentiumMMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/Pentium4Msr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/P6Msr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/NehalemMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/IvyBridgeMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/HaswellMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/HaswellEMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/CoreMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/Core2Msr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/BroadwellMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/AtomMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/ArchitecturalMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-01UefiCpuPkg/PiSmmCpuDxeSmm: Consume PcdAcpiS3Enable to control the codeStar Zeng
if PcdAcpiS3Enable is disabled, then skip S3 related logic. Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Laszlo Ersek <lersek@redhat.com>
2016-09-01UefiCpuPkg/PiSmmCpuDxeSmm: Move S3 related code to CpuS3.cStar Zeng
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Tested-by: Laszlo Ersek <lersek@redhat.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
2016-09-01UefiCpuPkg/CpuS3DataDxe: Consume PcdAcpiS3Enable to control the codeStar Zeng
If PcdAcpiS3Enable is disabled, then return an EFI_UNSUPPORTED error which forces the module to be unloaded. Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Laszlo Ersek <lersek@redhat.com>
2016-08-25UefiCpuPkg/MpInitLib: Don't allocate reset vector in Exit Boot ServiceJeff Fan
In Exit Boot Services callback function, we cannot use allocate memory services because it may change the memory map that has been gotten by OS. This fix is not to allocate reset vector buffer after SaveRestoreFlag is set to TRUE in MpInitExitBootServicesCallback(). Instead AllocateResetVector() will use the previous allocated buffer address and save the contents before copying reset vector code. At the same time, FreeResetVector() will restore original contents after if SaveRestoreFlag is TRUE. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-08-25UefiCpuPkg/MpInitLib: Move two functions locationJeff Fan
Just move BackupAndPrepareWakeupBuffer() and RestoreWakeupBuffer() from PeiMpLib.c to MpLib.c. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-08-25UefiCpuPkg/MpInitLib: Fix function header comments typoJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2025-01-08 16:57:09 +0000