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Add SmmCpuPlatformHookLib library class declaration
Add SmmCpuFeaturesLib library class declaration
Add gEfiSmmCpuServiceProtocolGuid protocol declaration
Build SmmCpuPlatformHookLibNull library instance
Build SmmCpuFeaturesLib library instance
Changes between [PATCH v1] and [PATCH v2]:
1) Use module type specific CpuExceptionHandlerLib in DSC file
instead of Null library instance
(Sync patch r18644 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18839 6f19259b-4bc3-4df7-8a09-765794883524
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Add CpuHotPlugData.h that defines a data structure that is shared between
modules and is required for to support hot plug CPUs.
(Sync patch r18643 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18838 6f19259b-4bc3-4df7-8a09-765794883524
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Add AcpuCpuData.h that defines a data structure that is shared between
modules and is required for ACPI S3 support.
APState field removed between V1 and V2 patch.
(Sync patch r18642 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18837 6f19259b-4bc3-4df7-8a09-765794883524
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Add SmramSaveStateMap.h file that defines the 32-bit and 64-bit CPU
SMRAM Save State Map.
(Sync patch r18641 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18836 6f19259b-4bc3-4df7-8a09-765794883524
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Add definition of the SMM CPU Service Protocol that is produced by
the PiSmmCpuDxeSmm module.
(Sync patch r18640 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18835 6f19259b-4bc3-4df7-8a09-765794883524
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Add SmmCpuPlatformHookLib that provides platform specific functions
that are used to initialize SMM and process SMIs. A Null instance
of this library is provided that should work for most platforms.
(Sync patch r18639 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18834 6f19259b-4bc3-4df7-8a09-765794883524
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Add SmmCpuFeaturesLib that provides CPU specific functions that are
used to initialize SMM and process SMIs. A functional implementation
of this library class is provided that is based on the
Intel(R) 64 and IA-32 Architectures Software Developer's Manual
(Sync patch r18638 from main trunk.)
[jeff.fan@intel.com: Fix code style issues reported by ECC]
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18833 6f19259b-4bc3-4df7-8a09-765794883524
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Add declaration of PlatformSecLib library class to DEC file
Add declaration of PcdPeiTemporaryRamStackSize PCD to DEC/UNI file
Add build of PlatformSecLibNull to DSC file
Add build of SecCore to DSC file
(Sync patch r18637 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18832 6f19259b-4bc3-4df7-8a09-765794883524
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Add SecCore module that uses the PlatformSecLib class for platform
specific actions. The SecCore module also uses a new PCD to
configure the size of the stack used in the SEC phase. If the
stack size PCD is set to 0, the stack is configured to use half
of the available temporary RAM.
(Sync patch r18636 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18831 6f19259b-4bc3-4df7-8a09-765794883524
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Add PlatformSecLib class and PlatformSecLibNull instance
that is used by the SecCore. PlatformSecLibNull should
not be used in a platform build. Instead, it should be
used as a template for implementing a platform specific
instance of the PlatformSecLib library class.
(Sync patch r18635 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18830 6f19259b-4bc3-4df7-8a09-765794883524
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Add modules that produce the SMM Communications PPI and
install a SW SMI handler for SMM Communication requests
(Sync patch r18634 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18829 6f19259b-4bc3-4df7-8a09-765794883524
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Move CPUID related defines from LocalApic.h to Cpuid.h
Update LocalApicLib instances to include Cpuid.h
Update CpuMpPei module to include Cpuid.h
(Sync patch r18633 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18828 6f19259b-4bc3-4df7-8a09-765794883524
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The Quark_EDKII_v1.1.0/IA32FamilyCpuBasePkg/CpuArchDxe
driver applies any MTRR changes to APs, if the
EFI_MP_SERVICES_PROTOCOL is available. We should do the same.
Additionally, the broadcast should occur at MP startup as well,
not only when MTRR settings are changed. The inspiration is
taken from
Quark_EDKII_v1.1.0/IA32FamilyCpuBasePkg/CpuMpDxe/
(see the EarlyMpInit() function and its call sites in
"ProcessorConfig.c").
(Sync patch r18632 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18827 6f19259b-4bc3-4df7-8a09-765794883524
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Address a race condition in first call to StartupAllAPs() with
SingleThread set to TRUE in the MP initialization. If the APs
have not entered their idle loop before StartupAllAPs() is called,
then some of the APs will be in an unexpected state, and
StartupAllAPs() will hang. This is the hang condition that is
only seen when SingleThread parameter is set to TRUE and
StartupAllAPs() is called very shortly after mAPsAlreadyInitFinished
is set to TRUE that releases the APs to complete their initialization.
An internal function has been added to check if all APs are in the
sleeping state in their idle loop. On the first call to
StartupAllAPs(), this internal function is used in a loop to make
sure the APs are in a state that is compatible with the use of
StartupAllAPs(). PcdCpuApInitTimeOutInMicroSeconds is used as the
maximum wait time for the APs to enter their idle loop. If all
APs have not entered their idle loop within the timeout, then
an ASSERT() is generated.
(Sync patch r18631 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18826 6f19259b-4bc3-4df7-8a09-765794883524
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Use PcdCpuApInitTimeOutInMicroSeconds instead of hardcoded 100ms for
the time to wait for all APs to respond to first INIT SIPI SIPI
wake request.
(Sync patch r18630 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18825 6f19259b-4bc3-4df7-8a09-765794883524
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Only perform AP detection if PcdCpuMaxLogicalProcessorNumber > 1
Only free AP related structures of they were allocated
(Sync patch r18629 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18824 6f19259b-4bc3-4df7-8a09-765794883524
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CpuData buffer should be located in allocated buffer instead of at end of
WakeupBuffer.
(Sync patch r18550 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18552 6f19259b-4bc3-4df7-8a09-765794883524
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(Sync patch r18549 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18551 6f19259b-4bc3-4df7-8a09-765794883524
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Per IA32 SDM, if CPUID.80000008H is not available, software may assume that the
processor supports a 36-bit physical address size.
However, for such old processors (For example, Quark processor),
MtrrValidBitsMask and MtrrValidAddressMask values are reverted and wrong in
MtrrLib. MtrrValidBitsMask should be 0xFFFFFFFFFULL and MtrrValidAddressMask
should be 0xFFFFFF000ULL.
(Sync patch r18396 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18399 6f19259b-4bc3-4df7-8a09-765794883524
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CPU Healthy state maybe changed by software. We should return Healthy state
from Healthy bit instead of from CPU BIST hardware information.
(Sync patch r18374 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18382 6f19259b-4bc3-4df7-8a09-765794883524
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(Sync patch r18373 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18381 6f19259b-4bc3-4df7-8a09-765794883524
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(Sync patch r18372 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18380 6f19259b-4bc3-4df7-8a09-765794883524
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when stack NX has been enabled for BSP.
DxeIpl may have enabled Execute Disable for BSP,
APs need to get the status and sync up the settings,
otherwise EFI_MP_SERVICES_PROTOCOL->StartupAllAPs
may not work.
Got positive comments and test result from Laszlo
for the early draft patch, thanks.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18191 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18168 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Qiu Shumin <shumin.qiu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18158 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Qiu Shumin <shumin.qiu@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18086 6f19259b-4bc3-4df7-8a09-765794883524
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Add CpuMpEndOfPeiCallback () to restore wakeup buffer data on S3 path and flag
flag wakeup buffer to be un-used type on normal boot path. Set one EndOfPei
flag save/restore wakeup buffer when wakeup APs every time.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18014 6f19259b-4bc3-4df7-8a09-765794883524
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Add AsmHltLoop () in assembly code, it will not be copied into AP wakeup
buffer and invoked at end of ApCFunction (). To make sure AP work in case
AP wakeup buffer is restored to original data.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18013 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18012 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18011 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18010 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18009 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18008 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18007 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18006 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18005 6f19259b-4bc3-4df7-8a09-765794883524
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Get CPU BIST information from SEC Platform Information(2) PPIs and update them
accordingly. Install(Reinstall) SEC Platform Information2 PPI to published the
new CPU BIST.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18004 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18003 6f19259b-4bc3-4df7-8a09-765794883524
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Add DetectMicrocode() to load microcode on BSP and APs.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18002 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18001 6f19259b-4bc3-4df7-8a09-765794883524
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Add PCDs PcdCpuMicrocodePatchAddress and PcdCpuMicrocodePatchRegionSize that
are used to detect microcode patch from microcode region.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18000 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17999 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17998 6f19259b-4bc3-4df7-8a09-765794883524
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BSP will send broadcast INIT Startup IPI to all APs and collect APs count and
BIST information.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17997 6f19259b-4bc3-4df7-8a09-765794883524
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This PCD is used to specify timeout value for BSP to detect all APs for the
first time.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17996 6f19259b-4bc3-4df7-8a09-765794883524
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Get AP wakeup buffer and copy AP reset code into it. Allocate APs' stack and CPU
MP data buffer. Fill CPU MP data fields accordingly.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17995 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17994 6f19259b-4bc3-4df7-8a09-765794883524
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Invoke InitializeFloatingPointUnits() to initialize FPU per UEFI specification
before call C function in assembly code.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17993 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17992 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17991 6f19259b-4bc3-4df7-8a09-765794883524
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