From 102c046d3c9fb90e4ba215ebd549fb8aaff6c69c Mon Sep 17 00:00:00 2001 From: Jiewen Yao Date: Wed, 20 Dec 2017 12:07:42 +0800 Subject: Rename gMinPlatformModuleTokenSpaceGuid to gMinPlatformPkgTokenSpaceGuid. Suggested-by: Isaac W Oram Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao --- .../Acpi/BoardAcpiDxe/BoardAcpiDxe.inf | 2 +- .../Include/Fdf/FlashMapInclude.fdf | 46 ++--- .../Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf | 6 +- .../BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf | 6 +- .../KabylakeRvp3/OpenBoardPkg.dsc | 6 +- .../KabylakeRvp3/OpenBoardPkg.fdf | 68 +++--- .../KabylakeRvp3/OpenBoardPkgConfig.dsc | 46 ++--- .../KabylakeRvp3/OpenBoardPkgPcd.dsc | 44 ++-- .../KabylakeOpenBoardPkg/KabylakeRvp3/bld.bat | 2 +- .../Intel/MinPlatformPkg/Acpi/AcpiSmm/AcpiSmm.inf | 4 +- .../Acpi/AcpiTables/AcpiPlatform.inf | 40 ++-- .../DxePlatformBootManagerLib.inf | 12 +- .../Flash/SpiFvbService/SpiFvbServiceSmm.inf | 4 +- .../PeiFspWrapperHobProcessLib.inf | 4 +- .../SecFspWrapperPlatformSecLib.inf | 10 +- .../Hsti/HstiIbvPlatformDxe/HstiIbvPlatformDxe.inf | 2 +- .../MinPlatformPkg/Include/Dsc/CoreCommonLib.dsc | 4 +- .../MinPlatformPkg/Include/Dsc/CoreDxeInclude.dsc | 16 +- .../MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc | 10 +- .../MinPlatformPkg/Include/Dsc/CorePeiInclude.dsc | 2 +- .../MinPlatformPkg/Include/Dsc/CorePeiLib.dsc | 4 +- .../Include/Fdf/CoreOsBootInclude.fdf | 6 +- .../Include/Fdf/CoreSecurityLateInclude.fdf | 4 +- .../Include/Fdf/CoreSecurityPreMemoryInclude.fdf | 2 +- .../Include/Fdf/CoreUefiBootInclude.fdf | 2 +- Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec | 228 ++++++++++----------- Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc | 12 +- .../PciHostBridgeLibSimple.inf | 26 +-- .../PlatformInitPei/PlatformInitPreMem.inf | 30 +-- .../TestPointCheckLib/DxeTestPointCheckLib.inf | 2 +- .../TestPointCheckLib/PeiTestPointCheckLib.inf | 2 +- .../TestPointCheckLib/SmmTestPointCheckLib.inf | 2 +- 32 files changed, 327 insertions(+), 327 deletions(-) diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf index 4fdd6233fb..6c22f0a5ad 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf +++ b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf @@ -60,7 +60,7 @@ gBoardModuleTokenSpaceGuid.PcdAcpiSleepState gBoardModuleTokenSpaceGuid.PcdAcpiHibernate - gMinPlatformModuleTokenSpaceGuid.PcdLowPowerS0Idle + gMinPlatformPkgTokenSpaceGuid.PcdLowPowerS0Idle gBoardModuleTokenSpaceGuid.PcdDisableActiveTripPoints gBoardModuleTokenSpaceGuid.PcdDisablePassiveTripPoints gBoardModuleTokenSpaceGuid.PcdDisableCriticalTripPoints diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/KabylakeOpenBoardPkg/Include/Fdf/FlashMapInclude.fdf index 4133c6649f..7ed3fe5256 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/Include/Fdf/FlashMapInclude.fdf +++ b/Platform/Intel/KabylakeOpenBoardPkg/Include/Fdf/FlashMapInclude.fdf @@ -22,31 +22,31 @@ DEFINE FLASH_BLOCK_SIZE = 0x00010000 DEFINE FLASH_NUM_BLOCKS = 0x00000080 # #=================================================================================# -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashNvStorageOffset = 0x00000000 # Flash addr (0xFF800000) -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashNvStorageSize = 0x00040000 # -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashNvStorageVariableOffset = 0x00000000 # Flash addr (0xFF800000) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset = 0x00000000 # Flash addr (0xFF800000) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize = 0x00040000 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset = 0x00000000 # Flash addr (0xFF800000) SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize = 0x0001E000 # -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = 0x0001E000 # Flash addr (0xFF81E000) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = 0x0001E000 # Flash addr (0xFF81E000) SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize = 0x00002000 # -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = 0x00020000 # Flash addr (0xFF820000) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = 0x00020000 # Flash addr (0xFF820000) SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize = 0x00020000 # -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashFvAdvancedOffset = 0x00040000 # Flash addr (0xFF840000) -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x00060000 # -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashFvSecurityOffset = 0x000A0000 # Flash addr (0xFF8A0000) -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashFvSecuritySize = 0x00070000 # -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x00110000 # Flash addr (0xFF910000) -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashFvOsBootSize = 0x00090000 # -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashFvUefiBootOffset = 0x001A0000 # Flash addr (0xFF9A0000) -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashFvUefiBootSize = 0x001E0000 # -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00380000 # Flash addr (0xFFB80000) -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00180000 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset = 0x00040000 # Flash addr (0xFF840000) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x00060000 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = 0x000A0000 # Flash addr (0xFF8A0000) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize = 0x00070000 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x00110000 # Flash addr (0xFF910000) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize = 0x00090000 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = 0x001A0000 # Flash addr (0xFF9A0000) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize = 0x001E0000 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00380000 # Flash addr (0xFFB80000) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00180000 # SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00500000 # Flash addr (0xFFD00000) SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x000A0000 # -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspSOffset = 0x005A0000 # Flash addr (0xFFDA0000) -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspSSize = 0x00060000 # -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00600000 # Flash addr (0xFFE00000) -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspMSize = 0x000BC000 # -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspTOffset = 0x006BC000 # Flash addr (0xFFEBC000) -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspTSize = 0x00004000 # -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPreMemoryOffset = 0x006C0000 # Flash addr (0xFFEC0000) -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPreMemorySize = 0x00140000 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x005A0000 # Flash addr (0xFFDA0000) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x00060000 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00600000 # Flash addr (0xFFE00000) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize = 0x000BC000 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset = 0x006BC000 # Flash addr (0xFFEBC000) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize = 0x00004000 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset = 0x006C0000 # Flash addr (0xFFEC0000) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize = 0x00140000 # diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf index 0cd63164b3..b1ee3a4c15 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf @@ -42,9 +42,9 @@ [Pcd] gBoardModuleTokenSpaceGuid.PcdPs2KbMsEnable - gMinPlatformModuleTokenSpaceGuid.PcdPciExpNative - gMinPlatformModuleTokenSpaceGuid.PcdNativeAspmEnable - gMinPlatformModuleTokenSpaceGuid.PcdLowPowerS0Idle + gMinPlatformPkgTokenSpaceGuid.PcdPciExpNative + gMinPlatformPkgTokenSpaceGuid.PcdNativeAspmEnable + gMinPlatformPkgTokenSpaceGuid.PcdLowPowerS0Idle gBoardModuleTokenSpaceGuid.PcdAcpiGnvsAddress [Sources] diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf index 8aabdcd385..66dee2a73a 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf @@ -43,9 +43,9 @@ [Pcd] gBoardModuleTokenSpaceGuid.PcdPs2KbMsEnable - gMinPlatformModuleTokenSpaceGuid.PcdPciExpNative - gMinPlatformModuleTokenSpaceGuid.PcdNativeAspmEnable - gMinPlatformModuleTokenSpaceGuid.PcdLowPowerS0Idle + gMinPlatformPkgTokenSpaceGuid.PcdPciExpNative + gMinPlatformPkgTokenSpaceGuid.PcdNativeAspmEnable + gMinPlatformPkgTokenSpaceGuid.PcdLowPowerS0Idle gBoardModuleTokenSpaceGuid.PcdAcpiGnvsAddress [Sources] diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc index c9411d7099..9b1c1e2b53 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc @@ -216,7 +216,7 @@ # Security # -!if gMinPlatformModuleTokenSpaceGuid.PcdTpm2Enable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformPei/Tcg2PlatformPei.inf !endif @@ -252,7 +252,7 @@ # # OS Boot # -!if gMinPlatformModuleTokenSpaceGuid.PcdBootToShellOnly == FALSE +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf { !if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport == FALSE @@ -287,7 +287,7 @@ # $(PLATFORM_PACKAGE)/Hsti/HstiIbvPlatformDxe/HstiIbvPlatformDxe.inf -!if gMinPlatformModuleTokenSpaceGuid.PcdTpm2Enable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf !endif diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf index 21926c746b..e13f4e9835 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf @@ -46,7 +46,7 @@ DEFINE SIPKG_PEI_BIN = INF # Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because macro expression is not supported. # So, PlatformSecLib uses PcdFlashAreaBaseAddress + PcdNemCodeCacheBase to get the real CodeCache base address. -SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase = $(gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPreMemoryOffset) +SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase = $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset) SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset) SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60 @@ -54,13 +54,13 @@ SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gSiPkgTokenSpac SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset) SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset = 0x60 -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashFvMicrocodeBase = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashFvMicrocodeSize = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashFvMicrocodeOffset = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize = gSiPkgTokenSpaceGuid.PcdFlashAreaSize -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress -SET gMinPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = gSiPkgTokenSpaceGuid.PcdFlashAreaSize +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress = gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize = gSiPkgTokenSpaceGuid.PcdFlashAreaSize ################################################################################ # # Following are lists of FD Region layout which correspond to the locations of different @@ -77,7 +77,7 @@ SET gMinPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = gSiPkgTokenSpa # Fv Size can be adjusted # ################################################################################ -gMinPlatformModuleTokenSpaceGuid.PcdFlashNvStorageVariableOffset|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize +gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize #NV_VARIABLE_STORE DATA = { @@ -102,7 +102,7 @@ DATA = { #Blockmap[1]: End 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ## This is the VARIABLE_STORE_HEADER -!if gMinPlatformModuleTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }} 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43, 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92, @@ -118,7 +118,7 @@ DATA = { 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } -gMinPlatformModuleTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize +gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize #NV_FTW_WORKING DATA = { @@ -132,28 +132,28 @@ DATA = { 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } -gMinPlatformModuleTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize +gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize #NV_FTW_SPARE -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvAdvancedOffset|gMinPlatformModuleTokenSpaceGuid.PcdFlashFvAdvancedSize -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvAdvancedBase|gMinPlatformModuleTokenSpaceGuid.PcdFlashFvAdvancedSize +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize FV = FvAdvanced -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvSecurityOffset|gMinPlatformModuleTokenSpaceGuid.PcdFlashFvSecuritySize -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvSecurityBase|gMinPlatformModuleTokenSpaceGuid.PcdFlashFvSecuritySize +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize FV = FvSecurity -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvOsBootOffset|gMinPlatformModuleTokenSpaceGuid.PcdFlashFvOsBootSize -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvOsBootBase|gMinPlatformModuleTokenSpaceGuid.PcdFlashFvOsBootSize +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize FV = FvOsBoot -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvUefiBootOffset|gMinPlatformModuleTokenSpaceGuid.PcdFlashFvUefiBootSize -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvUefiBootBase|gMinPlatformModuleTokenSpaceGuid.PcdFlashFvUefiBootSize +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize FV = FvUefiBoot -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPostMemoryOffset|gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPostMemorySize -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPostMemoryBase|gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPostMemorySize +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize FV = FvPostMemory gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize @@ -161,23 +161,23 @@ gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFlashMicroc #Microcode FV = FvMicrocode -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspSOffset|gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspSSize -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspSBase|gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspSSize +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize # FSP_S Section FILE = $(PLATFORM_FSP_BIN_PACKAGE)/Fsp_Rebased_S.fd -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspMOffset|gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspMSize -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspMBase|gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspMSize +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize # FSP_M Section FILE = $(PLATFORM_FSP_BIN_PACKAGE)/Fsp_Rebased_M.fd -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspTOffset|gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspTSize -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspTBase|gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspTSize +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize # FSP_T Section FILE = $(PLATFORM_FSP_BIN_PACKAGE)/Fsp_Rebased_T.fd -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPreMemoryOffset|gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPreMemorySize -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPreMemoryBase|gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPreMemorySize +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize FV = FvPreMemory ################################################################################ @@ -379,7 +379,7 @@ FvNameGuid = A0F04529-B715-44C6-BCA4-2DEBDD01EEEC !include $(PLATFORM_PACKAGE)/Include/Fdf/CoreOsBootInclude.fdf -!if gMinPlatformModuleTokenSpaceGuid.PcdBootToShellOnly == FALSE +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE INF $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyDxe/SiliconPolicyDxe.inf INF $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf INF $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf @@ -413,7 +413,7 @@ READ_LOCK_CAP = TRUE READ_LOCK_STATUS = TRUE FvNameGuid = 97F09B89-9E83-4DDC-A3D1-10C4AF539D1E -!if gMinPlatformModuleTokenSpaceGuid.PcdBootToShellOnly == FALSE +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE $(SIPKG_DXE_SMM_BIN) $(PLATFORM_SI_PACKAGE)/Pch/PchInit/Dxe/PchInitDxe.inf $(SIPKG_DXE_SMM_BIN) $(PLATFORM_SI_PACKAGE)/SystemAgent/SaInit/Dxe/SaInitDxe.inf @@ -509,7 +509,7 @@ FvNameGuid = 4199E560-54AE-45E5-91A4-F7BC3804E14A !include $(PLATFORM_PACKAGE)/Include/Fdf/CoreSecurityPostMemoryInclude.fdf -!if gMinPlatformModuleTokenSpaceGuid.PcdTpm2Enable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE INF $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformPei/Tcg2PlatformPei.inf !endif @@ -537,17 +537,17 @@ FvNameGuid = F753FE9A-EEFD-485B-840B-E032D538102C INF IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf -!if gMinPlatformModuleTokenSpaceGuid.PcdBootToShellOnly == FALSE +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE INF $(PLATFORM_SI_PACKAGE)/Hsti/Dxe/HstiSiliconDxe.inf !endif -!if gMinPlatformModuleTokenSpaceGuid.PcdBootToShellOnly == FALSE +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE INF $(PLATFORM_PACKAGE)/Hsti/HstiIbvPlatformDxe/HstiIbvPlatformDxe.inf -!if gMinPlatformModuleTokenSpaceGuid.PcdTpm2Enable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE INF $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf !endif diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgConfig.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgConfig.dsc index 6913ef7bde..e5220cd8dd 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgConfig.dsc +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgConfig.dsc @@ -21,35 +21,35 @@ # Stage 4 - boot to OS # Stage 5 - boot to OS with security boot enabled # - gMinPlatformModuleTokenSpaceGuid.PcdBootStage|4 + gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4 - gMinPlatformModuleTokenSpaceGuid.PcdStopAfterDebugInit|FALSE - gMinPlatformModuleTokenSpaceGuid.PcdStopAfterMemInit|FALSE - gMinPlatformModuleTokenSpaceGuid.PcdBootToShellOnly|FALSE - gMinPlatformModuleTokenSpaceGuid.PcdUefiSecureBootEnable|FALSE - gMinPlatformModuleTokenSpaceGuid.PcdTpm2Enable|FALSE - -!if gMinPlatformModuleTokenSpaceGuid.PcdBootStage >= 1 - gMinPlatformModuleTokenSpaceGuid.PcdStopAfterDebugInit|TRUE + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|FALSE + +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 1 + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|TRUE !endif -!if gMinPlatformModuleTokenSpaceGuid.PcdBootStage >= 2 - gMinPlatformModuleTokenSpaceGuid.PcdStopAfterDebugInit|FALSE - gMinPlatformModuleTokenSpaceGuid.PcdStopAfterMemInit|TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 2 + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|TRUE !endif -!if gMinPlatformModuleTokenSpaceGuid.PcdBootStage >= 3 - gMinPlatformModuleTokenSpaceGuid.PcdStopAfterMemInit|FALSE - gMinPlatformModuleTokenSpaceGuid.PcdBootToShellOnly|TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 3 + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|TRUE !endif -!if gMinPlatformModuleTokenSpaceGuid.PcdBootStage >= 4 - gMinPlatformModuleTokenSpaceGuid.PcdBootToShellOnly|FALSE +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 4 + gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE !endif -!if gMinPlatformModuleTokenSpaceGuid.PcdBootStage >= 5 - gMinPlatformModuleTokenSpaceGuid.PcdUefiSecureBootEnable|TRUE - gMinPlatformModuleTokenSpaceGuid.PcdTpm2Enable|TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 5 + gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|TRUE + gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|TRUE !endif # @@ -133,9 +133,9 @@ !endif !if $(TARGET) == DEBUG - gMinPlatformModuleTokenSpaceGuid.PcdSmiHandlerProfileEnable|TRUE + gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|TRUE !else - gMinPlatformModuleTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE !endif - gMinPlatformModuleTokenSpaceGuid.PcdPerformanceEnable|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable|FALSE diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc index 8040ca16be..08e74aeb80 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc @@ -34,12 +34,12 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE [PcdsFixedAtBuild.common] -!if gMinPlatformModuleTokenSpaceGuid.PcdPerformanceEnable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0x1 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|140 !endif -!if gMinPlatformModuleTokenSpaceGuid.PcdSmiHandlerProfileEnable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable == TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdSmiHandlerProfilePropertyMask|0x1 !endif @@ -108,17 +108,17 @@ gSiPkgTokenSpaceGuid.PcdTsegSize|0x800000 gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddressMask|0xFFFC !if $(TARGET) == RELEASE - gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x402 + gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x402 !else - gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x188B + gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x188B !endif - gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b + gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b !if $(TARGET) == RELEASE - gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x70 + gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x70 !else - gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0xE0 + gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0xE0 !endif gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0xFFEBC000 @@ -154,7 +154,7 @@ gSiPkgTokenSpaceGuid.PcdTsegSize|0x800000 # BIT2: Firmware setting this bit is an indication that it will not allow reconfiguration of system resources via non-architectural mechanisms. # BIT3-31: Reserved # - gMinPlatformModuleTokenSpaceGuid.PcdWsmtProtectionFlags|0x07 + gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags|0x07 # # See HstiFeatureBit.h for the definition @@ -162,34 +162,34 @@ gSiPkgTokenSpaceGuid.PcdTsegSize|0x800000 gSiPkgTokenSpaceGuid.PcdHstiIhvFeature1|0xF2 gSiPkgTokenSpaceGuid.PcdHstiIhvFeature2|0x07 -!if gMinPlatformModuleTokenSpaceGuid.PcdBootStage == 1 - gMinPlatformModuleTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 1 + gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} !endif -!if gMinPlatformModuleTokenSpaceGuid.PcdBootStage == 2 - gMinPlatformModuleTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 2 + gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} !endif -!if gMinPlatformModuleTokenSpaceGuid.PcdBootStage == 3 - gMinPlatformModuleTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x07, 0x03, 0x05, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 3 + gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x07, 0x03, 0x05, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} !endif -!if gMinPlatformModuleTokenSpaceGuid.PcdBootStage == 4 - gMinPlatformModuleTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x07, 0x03, 0x05, 0x1F, 0x00, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 4 + gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x07, 0x03, 0x05, 0x1F, 0x00, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} !endif -!if gMinPlatformModuleTokenSpaceGuid.PcdBootStage == 5 - gMinPlatformModuleTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x07, 0x1F, 0x1F, 0x0F, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 5 + gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x07, 0x1F, 0x1F, 0x0F, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} !endif -!if gMinPlatformModuleTokenSpaceGuid.PcdBootStage >= 6 - gMinPlatformModuleTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x07, 0x1F, 0x1F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 6 + gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x07, 0x1F, 0x1F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} !endif [PcdsFixedAtBuild.IA32] gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0 gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress|0xFED00148 - gMinPlatformModuleTokenSpaceGuid.PcdPeiPhaseStackTop|0xA0000 + gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0xA0000 gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000 [PcdsFixedAtBuild.X64] @@ -213,7 +213,7 @@ gSiPkgTokenSpaceGuid.PcdTsegSize|0x800000 gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 # Variable: L"Timeout" gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport" -!if gMinPlatformModuleTokenSpaceGuid.PcdPerformanceEnable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"Timeout" !endif diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/bld.bat b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/bld.bat index c8620322fa..5e7b7d6790 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/bld.bat +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/bld.bat @@ -16,7 +16,7 @@ :: 1) /s = Redirects all output to a file called EDK2.log(Prep.log must be existed), which will be located at the root. :: 2) /f = Defines the passing in of a single override to a feature PCD that is used in the platform :: DSC file. If this parameter is used, it is to be followed immediately after by both the feature -:: pcd name and value. FeaturePcd is the full PCD name, like gMinPlatformModuleTokenSpaceGuid.PcdOptimizeCompilerEnable +:: pcd name and value. FeaturePcd is the full PCD name, like gMinPlatformPkgTokenSpaceGuid.PcdOptimizeCompilerEnable :: 3) /r = Useful for faster rebuilds when no changes have been made to .inf files. Passes -u to :: build.exe to skip the generation of makefiles. :: 4) rom = Build Bios.rom only and building SPIs will be skipped. diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiSmm/AcpiSmm.inf b/Platform/Intel/MinPlatformPkg/Acpi/AcpiSmm/AcpiSmm.inf index 2d82bd14ce..8675a45b7a 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiSmm/AcpiSmm.inf +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiSmm/AcpiSmm.inf @@ -38,8 +38,8 @@ MinPlatformPkg/MinPlatformPkg.dec [Pcd] - gMinPlatformModuleTokenSpaceGuid.PcdAcpiEnableSwSmi ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdAcpiDisableSwSmi ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdAcpiEnableSwSmi ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdAcpiDisableSwSmi ## CONSUMES [Sources] AcpiSmm.h diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf index d8e6897a20..6e4429dfe3 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf @@ -56,30 +56,30 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId ## CONSUMES gPcAtChipsetPkgTokenSpaceGuid.PcdHpetBaseAddress - gMinPlatformModuleTokenSpaceGuid.PcdPreferredPmProfile - gMinPlatformModuleTokenSpaceGuid.PcdLowPowerS0Idle - gMinPlatformModuleTokenSpaceGuid.PcdTenSecondPowerButtonEnable - gMinPlatformModuleTokenSpaceGuid.PcdPciExpNative - gMinPlatformModuleTokenSpaceGuid.PcdNativeAspmEnable + gMinPlatformPkgTokenSpaceGuid.PcdPreferredPmProfile + gMinPlatformPkgTokenSpaceGuid.PcdLowPowerS0Idle + gMinPlatformPkgTokenSpaceGuid.PcdTenSecondPowerButtonEnable + gMinPlatformPkgTokenSpaceGuid.PcdPciExpNative + gMinPlatformPkgTokenSpaceGuid.PcdNativeAspmEnable [FixedPcd] - gMinPlatformModuleTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress - gMinPlatformModuleTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress - gMinPlatformModuleTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress - gMinPlatformModuleTokenSpaceGuid.PcdAcpiPm1BControlBlockAddress - gMinPlatformModuleTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress - gMinPlatformModuleTokenSpaceGuid.PcdAcpiPmTimerBlockAddress - gMinPlatformModuleTokenSpaceGuid.PcdAcpiGpe0BlockAddress - gMinPlatformModuleTokenSpaceGuid.PcdAcpiGpe1BlockAddress - gMinPlatformModuleTokenSpaceGuid.PcdPciExpressRegionLength + gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BControlBlockAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress + gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength - gMinPlatformModuleTokenSpaceGuid.PcdApicLocalAddress ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdApicIoAddress ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdAcpiEnableSwSmi ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdAcpiDisableSwSmi ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdApicIoIdPch ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdApicLocalAddress ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdApicIoAddress ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdAcpiEnableSwSmi ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdAcpiDisableSwSmi ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdApicIoIdPch ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdWsmtProtectionFlags + gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags [Protocols] gEfiAcpiTableProtocolGuid ## CONSUMES diff --git a/Platform/Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/DxePlatformBootManagerLib.inf b/Platform/Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/DxePlatformBootManagerLib.inf index f9d5d21e68..bd9c0467b9 100644 --- a/Platform/Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/DxePlatformBootManagerLib.inf +++ b/Platform/Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/DxePlatformBootManagerLib.inf @@ -54,7 +54,7 @@ MinPlatformPkg/MinPlatformPkg.dec [Pcd] - gMinPlatformModuleTokenSpaceGuid.PcdTpm2Enable ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable ## CONSUMES gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut ## PRODUCES gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution ## PRODUCES gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution ## PRODUCES @@ -65,11 +65,11 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution ## CONSUMES gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution ## CONSUMES gEfiMdeModulePkgTokenSpaceGuid.PcdConInConnectOnDemand ## PRODUCES - gMinPlatformModuleTokenSpaceGuid.PcdPlatformMemoryCheckLevel ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdBootToShellOnly ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdTrustedConsoleInputDevicePath ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdTrustedConsoleOutputDevicePath ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdTrustedStorageDevicePath ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdPlatformMemoryCheckLevel ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdTrustedConsoleInputDevicePath ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdTrustedConsoleOutputDevicePath ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdTrustedStorageDevicePath ## CONSUMES [Sources] BdsPlatform.c diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf index 0d900730b0..3da8e31d4f 100644 --- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf +++ b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf @@ -50,8 +50,8 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## CONSUMES gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize ## CONSUMES gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdFlashFvMicrocodeBase ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdFlashFvMicrocodeSize ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize ## CONSUMES [Sources] Common/SpiFvbServiceCommon.c diff --git a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf index b77ac8cf0f..362851e128 100644 --- a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf +++ b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf @@ -69,8 +69,8 @@ gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize ## CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize ## CONSUMES gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress - gMinPlatformModuleTokenSpaceGuid.PcdPciExpressRegionLength - gMinPlatformModuleTokenSpaceGuid.PcdFspCpuPeiApWakeupBufferAddr + gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength + gMinPlatformPkgTokenSpaceGuid.PcdFspCpuPeiApWakeupBufferAddr [Guids] gFspReservedMemoryResourceHobGuid ## CONSUMES ## HOB diff --git a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf index be102c4804..08f903b3c8 100644 --- a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf +++ b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf @@ -90,7 +90,7 @@ gUefiCpuPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize ## CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress ## CONSUMES gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdSecSerialPortDebugEnable ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdSecSerialPortDebugEnable ## CONSUMES [FixedPcd] gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress ## CONSUMES @@ -98,7 +98,7 @@ gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset ## CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress ## CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdFlashFvSecurityBase ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdFlashFvSecuritySize ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdFlashFvAdvancedBase ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdFlashFvAdvancedSize ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize ## CONSUMES diff --git a/Platform/Intel/MinPlatformPkg/Hsti/HstiIbvPlatformDxe/HstiIbvPlatformDxe.inf b/Platform/Intel/MinPlatformPkg/Hsti/HstiIbvPlatformDxe/HstiIbvPlatformDxe.inf index e78818d4c0..97356620f5 100644 --- a/Platform/Intel/MinPlatformPkg/Hsti/HstiIbvPlatformDxe/HstiIbvPlatformDxe.inf +++ b/Platform/Intel/MinPlatformPkg/Hsti/HstiIbvPlatformDxe/HstiIbvPlatformDxe.inf @@ -45,7 +45,7 @@ HstiLib [Pcd] - gMinPlatformModuleTokenSpaceGuid.PcdHstiIbvPlatformFeature + gMinPlatformPkgTokenSpaceGuid.PcdHstiIbvPlatformFeature [Protocols] diff --git a/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreCommonLib.dsc b/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreCommonLib.dsc index bcf762070b..ec112e384b 100644 --- a/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreCommonLib.dsc +++ b/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreCommonLib.dsc @@ -114,7 +114,7 @@ DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf !endif -!if gMinPlatformModuleTokenSpaceGuid.PcdSmiHandlerProfileEnable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable == TRUE SmiHandlerProfileLib|MdeModulePkg/Library/SmmSmiHandlerProfileLib/SmmSmiHandlerProfileLib.inf !else SmiHandlerProfileLib|MdePkg/Library/SmiHandlerProfileLibNull/SmiHandlerProfileLibNull.inf @@ -129,7 +129,7 @@ PlatformSecureLib|SecurityPkg/Library/PlatformSecureLibNull/PlatformSecureLibNull.inf AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableLibNull.inf -!if gMinPlatformModuleTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf !endif diff --git a/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeInclude.dsc b/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeInclude.dsc index 2e4d2c0871..93e1d1be55 100644 --- a/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeInclude.dsc +++ b/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeInclude.dsc @@ -36,7 +36,7 @@ PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf -!if gMinPlatformModuleTokenSpaceGuid.PcdBootToShellOnly == FALSE +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf { @@ -54,10 +54,10 @@ MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf { -!if gMinPlatformModuleTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.inf !endif -!if gMinPlatformModuleTokenSpaceGuid.PcdTpm2Enable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE NULL|SecurityPkg/Library/DxeTpm2MeasureBootLib/DxeTpm2MeasureBootLib.inf !endif } @@ -105,7 +105,7 @@ MdeModulePkg/Application/UiApp/UiApp.inf MdeModulePkg/Application/BootManagerMenuApp/BootManagerMenuApp.inf -!if gMinPlatformModuleTokenSpaceGuid.PcdBootToShellOnly == FALSE +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf @@ -118,18 +118,18 @@ MdeModulePkg/Universal/SmmCommunicationBufferDxe/SmmCommunicationBufferDxe.inf !endif -!if gMinPlatformModuleTokenSpaceGuid.PcdBootToShellOnly == FALSE +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf !endif -!if gMinPlatformModuleTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf !endif -!if gMinPlatformModuleTokenSpaceGuid.PcdTpm2Enable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf { @@ -141,7 +141,7 @@ SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigDxe.inf !endif -!if gMinPlatformModuleTokenSpaceGuid.PcdPerformanceEnable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE PerformancePkg/Dp_App/Dp.inf !endif diff --git a/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc b/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc index 29f2a6b5c7..d373f9fbce 100644 --- a/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc +++ b/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc @@ -38,7 +38,7 @@ FrameBufferBltLib|MdeModulePkg/Library/FrameBufferBltLib/FrameBufferBltLib.inf TimerLib|PcAtChipsetPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.inf -!if gMinPlatformModuleTokenSpaceGuid.PcdPerformanceEnable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf !endif @@ -53,7 +53,7 @@ MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf -!if gMinPlatformModuleTokenSpaceGuid.PcdPerformanceEnable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf !endif @@ -71,7 +71,7 @@ LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxSmmLib.inf SmmMemLib|MdePkg/Library/SmmMemLib/SmmMemLib.inf -!if gMinPlatformModuleTokenSpaceGuid.PcdPerformanceEnable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE PerformanceLib|MdeModulePkg/Library/SmmPerformanceLib/SmmPerformanceLib.inf !endif @@ -88,7 +88,7 @@ ReportStatusCodeLib|MdeModulePkg/Library/SmmReportStatusCodeLib/SmmReportStatusCodeLib.inf SmmMemLib|MdePkg/Library/SmmMemLib/SmmMemLib.inf -!if gMinPlatformModuleTokenSpaceGuid.PcdPerformanceEnable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE PerformanceLib|MdeModulePkg/Library/SmmCorePerformanceLib/SmmCorePerformanceLib.inf !endif @@ -108,6 +108,6 @@ FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf -!if gMinPlatformModuleTokenSpaceGuid.PcdPerformanceEnable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE PerformanceLib|MdeModulePkg/Library/DxeSmmPerformanceLib/DxeSmmPerformanceLib.inf !endif diff --git a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiInclude.dsc b/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiInclude.dsc index 5a0901cf91..31bfc71eca 100644 --- a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiInclude.dsc +++ b/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiInclude.dsc @@ -48,7 +48,7 @@ NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf } -!if gMinPlatformModuleTokenSpaceGuid.PcdTpm2Enable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf { diff --git a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc b/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc index 95429d1e79..2b43b420b8 100644 --- a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc +++ b/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc @@ -45,7 +45,7 @@ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf !endif -!if gMinPlatformModuleTokenSpaceGuid.PcdPerformanceEnable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf !endif @@ -58,6 +58,6 @@ HashLib|SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterPei.inf Tcg2PhysicalPresenceLib|SecurityPkg/Library/PeiTcg2PhysicalPresenceLib/PeiTcg2PhysicalPresenceLib.inf -!if gMinPlatformModuleTokenSpaceGuid.PcdPerformanceEnable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf !endif diff --git a/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreOsBootInclude.fdf b/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreOsBootInclude.fdf index 7abf89dc83..06251fcc79 100644 --- a/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreOsBootInclude.fdf +++ b/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreOsBootInclude.fdf @@ -13,13 +13,13 @@ # ## -!if gMinPlatformModuleTokenSpaceGuid.PcdBootToShellOnly == FALSE +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf !endif -!if gMinPlatformModuleTokenSpaceGuid.PcdBootToShellOnly == FALSE +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf @@ -29,7 +29,7 @@ INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf INF MdeModulePkg/Universal/SmmCommunicationBufferDxe/SmmCommunicationBufferDxe.inf !endif -!if gMinPlatformModuleTokenSpaceGuid.PcdBootToShellOnly == FALSE +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf diff --git a/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreSecurityLateInclude.fdf b/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreSecurityLateInclude.fdf index d51f024d90..ccb083a0a6 100644 --- a/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreSecurityLateInclude.fdf +++ b/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreSecurityLateInclude.fdf @@ -13,11 +13,11 @@ # ## -!if gMinPlatformModuleTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf !endif -!if gMinPlatformModuleTokenSpaceGuid.PcdTpm2Enable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf INF SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.inf diff --git a/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreSecurityPreMemoryInclude.fdf b/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreSecurityPreMemoryInclude.fdf index 803aec2331..d0a4d39d57 100644 --- a/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreSecurityPreMemoryInclude.fdf +++ b/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreSecurityPreMemoryInclude.fdf @@ -13,7 +13,7 @@ # ## -!if gMinPlatformModuleTokenSpaceGuid.PcdTpm2Enable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf INF SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf !endif diff --git a/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreUefiBootInclude.fdf b/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreUefiBootInclude.fdf index b93eab2c1f..66607bbef5 100644 --- a/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreUefiBootInclude.fdf +++ b/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreUefiBootInclude.fdf @@ -26,7 +26,7 @@ INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf -!if gMinPlatformModuleTokenSpaceGuid.PcdBootToShellOnly == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == TRUE INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf !endif diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec index 67eca3f394..94232c29b8 100644 --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec @@ -32,7 +32,7 @@ Include gEdkiiSiliconInitializedPpiGuid = {0x82a72dc8, 0x61ec, 0x403e, {0xb1, 0x5a, 0x8d, 0x7a, 0x3a, 0x71, 0x84, 0x98}} [Guids] -gMinPlatformModuleTokenSpaceGuid = {0x69d13bf0, 0xaf91, 0x4d96, {0xaa, 0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0}} +gMinPlatformPkgTokenSpaceGuid = {0x69d13bf0, 0xaf91, 0x4d96, {0xaa, 0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0}} gAdapterInfoPlatformTestPointGuid = {0x5381e3ea, 0xb77, 0x4580, {0xad, 0xdf, 0xa9, 0x1c, 0x8, 0x3b, 0xf2, 0x97}} @@ -78,71 +78,71 @@ TestPointCheckLib|Include/Library/TestPointCheckLib.h ## The Flash relevant PCD are ineffective and will be patched basing on FDF definitions during build. ## Set all of them to 0 here to prevent from confusion. ## -gMinPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT32|0x10000001 -gMinPlatformModuleTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x10000002 - -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvMicrocodeBase|0xFFE60000|UINT32|0x30000004 -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvMicrocodeSize|0x000A0000|UINT32|0x30000005 -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvMicrocodeOffset|0x00660000|UINT32|0x30000006 - -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPreMemoryBase|0x00000000|UINT32|0x20000004 -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPreMemorySize|0x00000000|UINT32|0x20000005 -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPreMemoryOffset|0x00000000|UINT32|0x20000006 -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPostMemoryBase|0x00000000|UINT32|0x20000007 -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPostMemorySize|0x00000000|UINT32|0x20000008 -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPostMemoryOffset|0x00000000|UINT32|0x20000009 -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvUefiBootBase|0x00000000|UINT32|0x2000000A -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvUefiBootSize|0x00000000|UINT32|0x2000000B -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvUefiBootOffset|0x00000000|UINT32|0x2000000C -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvOsBootBase|0x00000000|UINT32|0x2000000D -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvOsBootSize|0x00000000|UINT32|0x2000000E -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvOsBootOffset|0x00000000|UINT32|0x2000000F -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvSecurityBase|0x00000000|UINT32|0x20000010 -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvSecuritySize|0x00000000|UINT32|0x20000011 -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvSecurityOffset|0x00000000|UINT32|0x20000012 -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvAdvancedBase|0x00000000|UINT32|0x20000013 -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvAdvancedSize|0x00000000|UINT32|0x20000014 -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvAdvancedOffset|0x00000000|UINT32|0x20000015 - -gMinPlatformModuleTokenSpaceGuid.PcdFlashNvStorageBase|0x00000000|UINT32|0x20000016 -gMinPlatformModuleTokenSpaceGuid.PcdFlashNvStorageSize|0x00000000|UINT32|0x20000017 -gMinPlatformModuleTokenSpaceGuid.PcdFlashNvStorageOffset|0x00000000|UINT32|0x20000018 -gMinPlatformModuleTokenSpaceGuid.PcdFlashNvStorageVariableOffset|0x00000000|UINT32|0x20000019 -gMinPlatformModuleTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|0x00000000|UINT32|0x2000001A -gMinPlatformModuleTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset|0x00000000|UINT32|0x2000001B - -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspTBase|0x00000000|UINT32|0x20000021 -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspTSize|0x00000000|UINT32|0x20000022 -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspTOffset|0x00000000|UINT32|0x20000023 -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspMBase|0x00000000|UINT32|0x20000024 -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspMSize|0x00000000|UINT32|0x20000025 -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspMOffset|0x00000000|UINT32|0x20000026 -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspSBase|0x00000000|UINT32|0x20000027 -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspSSize|0x00000000|UINT32|0x20000028 -gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspSOffset|0x00000000|UINT32|0x20000029 - -gMinPlatformModuleTokenSpaceGuid.PcdFspMaxUpdSize|0x00000000|UINT32|0x80000000 -gMinPlatformModuleTokenSpaceGuid.PcdFspReservedSizeOnStackTop|0x00000040|UINT32|0x80000001 -gMinPlatformModuleTokenSpaceGuid.PcdPeiPhaseStackTop|0x00000000|UINT32|0x80000002 - -gMinPlatformModuleTokenSpaceGuid.PcdApicLocalAddress|0xFEE00000|UINT64|0x9000000B -gMinPlatformModuleTokenSpaceGuid.PcdApicLocalMmioSize|0x1000|UINT32|0x9000000C - -gMinPlatformModuleTokenSpaceGuid.PcdApicIoAddress|0xFEC00000|UINT64|0x9000000D -gMinPlatformModuleTokenSpaceGuid.PcdApicIoMmioSize|0x1000|UINT32|0x9000000E - -gMinPlatformModuleTokenSpaceGuid.PcdAcpiEnableSwSmi|0xF0|UINT8|0x90000012 -gMinPlatformModuleTokenSpaceGuid.PcdAcpiDisableSwSmi|0xF1|UINT8|0x90000013 - -gMinPlatformModuleTokenSpaceGuid.PcdApicIoIdPch|0x02|UINT8|0x9000001E - -gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize|0x65|UINT32|0x20000500 -gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize|0x30|UINT32|0x20000501 -gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x402|UINT32|0x20000502 -gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b|UINT32|0x20000503 -gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x25|UINT32|0x20000504 - -gMinPlatformModuleTokenSpaceGuid.PcdFspTemporaryRamSize|0x1000|UINT32|0x10001003 +gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT32|0x10000001 +gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x10000002 + +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase|0xFFE60000|UINT32|0x30000004 +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize|0x000A0000|UINT32|0x30000005 +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset|0x00660000|UINT32|0x30000006 + +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase|0x00000000|UINT32|0x20000004 +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize|0x00000000|UINT32|0x20000005 +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset|0x00000000|UINT32|0x20000006 +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|0x00000000|UINT32|0x20000007 +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize|0x00000000|UINT32|0x20000008 +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset|0x00000000|UINT32|0x20000009 +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootBase|0x00000000|UINT32|0x2000000A +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize|0x00000000|UINT32|0x2000000B +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset|0x00000000|UINT32|0x2000000C +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootBase|0x00000000|UINT32|0x2000000D +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize|0x00000000|UINT32|0x2000000E +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset|0x00000000|UINT32|0x2000000F +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase|0x00000000|UINT32|0x20000010 +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize|0x00000000|UINT32|0x20000011 +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset|0x00000000|UINT32|0x20000012 +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase|0x00000000|UINT32|0x20000013 +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize|0x00000000|UINT32|0x20000014 +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset|0x00000000|UINT32|0x20000015 + +gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageBase|0x00000000|UINT32|0x20000016 +gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize|0x00000000|UINT32|0x20000017 +gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset|0x00000000|UINT32|0x20000018 +gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset|0x00000000|UINT32|0x20000019 +gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|0x00000000|UINT32|0x2000001A +gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset|0x00000000|UINT32|0x2000001B + +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase|0x00000000|UINT32|0x20000021 +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize|0x00000000|UINT32|0x20000022 +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset|0x00000000|UINT32|0x20000023 +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase|0x00000000|UINT32|0x20000024 +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize|0x00000000|UINT32|0x20000025 +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset|0x00000000|UINT32|0x20000026 +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase|0x00000000|UINT32|0x20000027 +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize|0x00000000|UINT32|0x20000028 +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset|0x00000000|UINT32|0x20000029 + +gMinPlatformPkgTokenSpaceGuid.PcdFspMaxUpdSize|0x00000000|UINT32|0x80000000 +gMinPlatformPkgTokenSpaceGuid.PcdFspReservedSizeOnStackTop|0x00000040|UINT32|0x80000001 +gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0x00000000|UINT32|0x80000002 + +gMinPlatformPkgTokenSpaceGuid.PcdApicLocalAddress|0xFEE00000|UINT64|0x9000000B +gMinPlatformPkgTokenSpaceGuid.PcdApicLocalMmioSize|0x1000|UINT32|0x9000000C + +gMinPlatformPkgTokenSpaceGuid.PcdApicIoAddress|0xFEC00000|UINT64|0x9000000D +gMinPlatformPkgTokenSpaceGuid.PcdApicIoMmioSize|0x1000|UINT32|0x9000000E + +gMinPlatformPkgTokenSpaceGuid.PcdAcpiEnableSwSmi|0xF0|UINT8|0x90000012 +gMinPlatformPkgTokenSpaceGuid.PcdAcpiDisableSwSmi|0xF1|UINT8|0x90000013 + +gMinPlatformPkgTokenSpaceGuid.PcdApicIoIdPch|0x02|UINT8|0x9000001E + +gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize|0x65|UINT32|0x20000500 +gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize|0x30|UINT32|0x20000501 +gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x402|UINT32|0x20000502 +gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b|UINT32|0x20000503 +gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x25|UINT32|0x20000504 + +gMinPlatformPkgTokenSpaceGuid.PcdFspTemporaryRamSize|0x1000|UINT32|0x10001003 # # The PCDs are used to control the Windows SMM Security Mitigations Table - Protection Flags @@ -153,11 +153,11 @@ gMinPlatformModuleTokenSpaceGuid.PcdFspTemporaryRamSize|0x1000|UINT32|0x10001003 # BIT2: Firmware setting this bit is an indication that it will not allow reconfiguration of system resources via non-architectural mechanisms. # BIT3-31: Reserved # -gMinPlatformModuleTokenSpaceGuid.PcdWsmtProtectionFlags|0|UINT32|0x10001006 +gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags|0|UINT32|0x10001006 -gMinPlatformModuleTokenSpaceGuid.PcdPreferredPmProfile|0x0|UINT8|0x00100205 +gMinPlatformPkgTokenSpaceGuid.PcdPreferredPmProfile|0x0|UINT8|0x00100205 -gMinPlatformModuleTokenSpaceGuid.PcdSecSerialPortDebugEnable|TRUE|BOOLEAN|0x00100206 +gMinPlatformPkgTokenSpaceGuid.PcdSecSerialPortDebugEnable|TRUE|BOOLEAN|0x00100206 # # See HstiIbvFeatureBit.h for the definition @@ -166,7 +166,7 @@ gMinPlatformModuleTokenSpaceGuid.PcdSecSerialPortDebugEnable|TRUE|BOOLEAN|0x0010 # # It means BYTE BIT is for feature . # -gMinPlatformModuleTokenSpaceGuid.PcdHstiIbvPlatformFeature|{0x00, 0x00, 0x00}|VOID*|0x00100301 +gMinPlatformPkgTokenSpaceGuid.PcdHstiIbvPlatformFeature|{0x00, 0x00, 0x00}|VOID*|0x00100301 # # See TestPointCheckLib.h for the definition @@ -181,7 +181,7 @@ gMinPlatformModuleTokenSpaceGuid.PcdHstiIbvPlatformFeature|{0x00, 0x00, 0x00}|VO # Stage OS boot: {0x03, 0x07, 0x03, 0x05, 0x3F, 0x00, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} # Stage Secure boot: {0x03, 0x0F, 0x07, 0x1F, 0x3F, 0x0F, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} # Stage Advanced: {0x03, 0x0F, 0x07, 0x1F, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} -gMinPlatformModuleTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x07, 0x1F, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00100302 +gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x07, 0x1F, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00100302 [PcdsDynamic] @@ -191,38 +191,38 @@ gMinPlatformModuleTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x0 ## Allocate 56 KB [0x2000..0xFFFF] of I/O space for Pci Devices ## If PcdPciReservedMemLimit =0 Pci Reserved default MMIO Limit is PciExpressBase else use PcdPciReservedMemLimit . ## - gMinPlatformModuleTokenSpaceGuid.PcdPciReservedIobase |0x2000 |UINT16|0x40010041 - gMinPlatformModuleTokenSpaceGuid.PcdPciReservedIoLimit |0xFFFF |UINT16|0x40010042 - gMinPlatformModuleTokenSpaceGuid.PcdPciReservedMemBase |0x90000000 |UINT32|0x40010043 - gMinPlatformModuleTokenSpaceGuid.PcdPciReservedMemLimit |0x00000000 |UINT32|0x40010044 - gMinPlatformModuleTokenSpaceGuid.PcdPciReservedMemAbove4GBBase |0xFFFFFFFFFFFFFFFF |UINT64|0x40010045 - gMinPlatformModuleTokenSpaceGuid.PcdPciReservedMemAbove4GBLimit |0x0000000000000000 |UINT64|0x40010046 - gMinPlatformModuleTokenSpaceGuid.PcdPciReservedPMemBase |0xFFFFFFFF |UINT32|0x40010047 - gMinPlatformModuleTokenSpaceGuid.PcdPciReservedPMemLimit |0x00000000 |UINT32|0x40010048 - gMinPlatformModuleTokenSpaceGuid.PcdPciReservedPMemAbove4GBBase |0xFFFFFFFFFFFFFFFF |UINT64|0x40010049 - gMinPlatformModuleTokenSpaceGuid.PcdPciReservedPMemAbove4GBLimit|0x0000000000000000 |UINT64|0x4001004A - gMinPlatformModuleTokenSpaceGuid.PcdPciDmaAbove4G |FALSE|BOOLEAN|0x4001004B - gMinPlatformModuleTokenSpaceGuid.PcdPciNoExtendedConfigSpace |FALSE|BOOLEAN|0x4001004C - gMinPlatformModuleTokenSpaceGuid.PcdPciResourceAssigned |FALSE|BOOLEAN|0x4001004D - - gMinPlatformModuleTokenSpaceGuid.PcdLowPowerS0Idle|0|UINT8|0x40000006 - gMinPlatformModuleTokenSpaceGuid.PcdTenSecondPowerButtonEnable|0|UINT8|0x40000008 - gMinPlatformModuleTokenSpaceGuid.PcdPciExpNative|0|UINT8|0x40000004 - gMinPlatformModuleTokenSpaceGuid.PcdNativeAspmEnable|1|UINT8|0x40000005 - - gMinPlatformModuleTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress|0x1800|UINT16|0x00010035 - gMinPlatformModuleTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress|0x0000|UINT16|0x00010036 - gMinPlatformModuleTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress|0x1804|UINT16|0x0001037 - gMinPlatformModuleTokenSpaceGuid.PcdAcpiPm1BControlBlockAddress|0x0000|UINT16|0x00010038 - gMinPlatformModuleTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress|0x1850|UINT16|0x00010039 - gMinPlatformModuleTokenSpaceGuid.PcdAcpiPmTimerBlockAddress|0x1808|UINT16|0x0001003A - gMinPlatformModuleTokenSpaceGuid.PcdAcpiGpe0BlockAddress|0x1880|UINT16|0x0001003B - gMinPlatformModuleTokenSpaceGuid.PcdAcpiGpe1BlockAddress|0x0000|UINT16|0x0001003C - - gMinPlatformModuleTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000|UINT32|0x0010004 - gMinPlatformModuleTokenSpaceGuid.PcdFspCpuPeiApWakeupBufferAddr|0x9f000|UINT32|0x30000008 - - gMinPlatformModuleTokenSpaceGuid.PcdPlatformMemoryCheckLevel|0|UINT32|0x30000009 + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedIobase |0x2000 |UINT16|0x40010041 + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedIoLimit |0xFFFF |UINT16|0x40010042 + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemBase |0x90000000 |UINT32|0x40010043 + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemLimit |0x00000000 |UINT32|0x40010044 + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBBase |0xFFFFFFFFFFFFFFFF |UINT64|0x40010045 + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBLimit |0x0000000000000000 |UINT64|0x40010046 + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedPMemBase |0xFFFFFFFF |UINT32|0x40010047 + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedPMemLimit |0x00000000 |UINT32|0x40010048 + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedPMemAbove4GBBase |0xFFFFFFFFFFFFFFFF |UINT64|0x40010049 + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedPMemAbove4GBLimit|0x0000000000000000 |UINT64|0x4001004A + gMinPlatformPkgTokenSpaceGuid.PcdPciDmaAbove4G |FALSE|BOOLEAN|0x4001004B + gMinPlatformPkgTokenSpaceGuid.PcdPciNoExtendedConfigSpace |FALSE|BOOLEAN|0x4001004C + gMinPlatformPkgTokenSpaceGuid.PcdPciResourceAssigned |FALSE|BOOLEAN|0x4001004D + + gMinPlatformPkgTokenSpaceGuid.PcdLowPowerS0Idle|0|UINT8|0x40000006 + gMinPlatformPkgTokenSpaceGuid.PcdTenSecondPowerButtonEnable|0|UINT8|0x40000008 + gMinPlatformPkgTokenSpaceGuid.PcdPciExpNative|0|UINT8|0x40000004 + gMinPlatformPkgTokenSpaceGuid.PcdNativeAspmEnable|1|UINT8|0x40000005 + + gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress|0x1800|UINT16|0x00010035 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress|0x0000|UINT16|0x00010036 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress|0x1804|UINT16|0x0001037 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BControlBlockAddress|0x0000|UINT16|0x00010038 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress|0x1850|UINT16|0x00010039 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress|0x1808|UINT16|0x0001003A + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress|0x1880|UINT16|0x0001003B + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress|0x0000|UINT16|0x0001003C + + gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000|UINT32|0x0010004 + gMinPlatformPkgTokenSpaceGuid.PcdFspCpuPeiApWakeupBufferAddr|0x9f000|UINT32|0x30000008 + + gMinPlatformPkgTokenSpaceGuid.PcdPlatformMemoryCheckLevel|0|UINT32|0x30000009 ## This PCD is to control which device is the potential trusted console input device.

# For example:
@@ -231,7 +231,7 @@ gMinPlatformModuleTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x0 # {0x03, 0x0F, 0x0B, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x03, 0x01, 0x01,
# //Header
# 0x7F, 0xFF, 0x04, 0x00}
- gMinPlatformModuleTokenSpaceGuid.PcdTrustedConsoleInputDevicePath|{0x03, 0x0F, 0x0B, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x03, 0x01, 0x01, 0x7F, 0xFF, 0x04, 0x00}|VOID*|0x300000A + gMinPlatformPkgTokenSpaceGuid.PcdTrustedConsoleInputDevicePath|{0x03, 0x0F, 0x0B, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x03, 0x01, 0x01, 0x7F, 0xFF, 0x04, 0x00}|VOID*|0x300000A ## This PCD is to control which device is the potential trusted console output device.

# For example:
@@ -242,7 +242,7 @@ gMinPlatformModuleTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x0 # 0x01, 0x01, 0x06, 0x00, 0x00, 0x02, # //Header
# 0x7F, 0xFF, 0x04, 0x00}
- gMinPlatformModuleTokenSpaceGuid.PcdTrustedConsoleOutputDevicePath|{0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x06, 0x00, 0x00, 0x02, 0x7F, 0xFF, 0x04, 0x00}|VOID*|0x300000C + gMinPlatformPkgTokenSpaceGuid.PcdTrustedConsoleOutputDevicePath|{0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x06, 0x00, 0x00, 0x02, 0x7F, 0xFF, 0x04, 0x00}|VOID*|0x300000C ## This PCD is to control which device is the potential trusted storage device.

# For example:
@@ -253,7 +253,7 @@ gMinPlatformModuleTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x0 # 0x01, 0x01, 0x06, 0x00, 0x00, 0x17, # //Header
# 0x7F, 0xFF, 0x04, 0x00}
- gMinPlatformModuleTokenSpaceGuid.PcdTrustedStorageDevicePath|{0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x06, 0x00, 0x00, 0x17, 0x7F, 0xFF, 0x04, 0x00}|VOID*|0x3000010 + gMinPlatformPkgTokenSpaceGuid.PcdTrustedStorageDevicePath|{0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x06, 0x00, 0x00, 0x17, 0x7F, 0xFF, 0x04, 0x00}|VOID*|0x3000010 [PcdsFeatureFlag] # @@ -263,13 +263,13 @@ gMinPlatformModuleTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x0 # Stage 4 - boot to OS # Stage 5 - boot to OS with security boot enabled # - gMinPlatformModuleTokenSpaceGuid.PcdBootStage|4|UINT8|0xF00000A0 + gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4|UINT8|0xF00000A0 - gMinPlatformModuleTokenSpaceGuid.PcdStopAfterDebugInit |FALSE|BOOLEAN|0xF00000A1 - gMinPlatformModuleTokenSpaceGuid.PcdStopAfterMemInit |FALSE|BOOLEAN|0xF00000A2 - gMinPlatformModuleTokenSpaceGuid.PcdBootToShellOnly |FALSE|BOOLEAN|0xF00000A3 - gMinPlatformModuleTokenSpaceGuid.PcdUefiSecureBootEnable |FALSE|BOOLEAN|0xF00000A4 - gMinPlatformModuleTokenSpaceGuid.PcdTpm2Enable |FALSE|BOOLEAN|0xF00000A5 - gMinPlatformModuleTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE|BOOLEAN|0xF00000A6 - gMinPlatformModuleTokenSpaceGuid.PcdPerformanceEnable |FALSE|BOOLEAN|0xF00000A7 + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit |FALSE|BOOLEAN|0xF00000A1 + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit |FALSE|BOOLEAN|0xF00000A2 + gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly |FALSE|BOOLEAN|0xF00000A3 + gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable |FALSE|BOOLEAN|0xF00000A4 + gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable |FALSE|BOOLEAN|0xF00000A5 + gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE|BOOLEAN|0xF00000A6 + gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable |FALSE|BOOLEAN|0xF00000A7 diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc index 9cf1d373fe..c97f0e1017 100644 --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc @@ -45,11 +45,11 @@ [PcdsFeatureFlag] # configuration - gMinPlatformModuleTokenSpaceGuid.PcdBootToShellOnly|FALSE - gMinPlatformModuleTokenSpaceGuid.PcdUefiSecureBootEnable|FALSE - gMinPlatformModuleTokenSpaceGuid.PcdTpm2Enable|FALSE - gMinPlatformModuleTokenSpaceGuid.PcdPerformanceEnable|FALSE - gMinPlatformModuleTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE ################################################################################ # @@ -185,7 +185,7 @@ MinPlatformPkg/Test/TestPointStubDxe/TestPointStubDxe.inf MinPlatformPkg/Test/TestPointDumpApp/TestPointDumpApp.inf -!if gMinPlatformModuleTokenSpaceGuid.PcdTpm2Enable == TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE MinPlatformPkg/Tcg/Tcg2PlatformPei/Tcg2PlatformPei.inf MinPlatformPkg/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf !endif diff --git a/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciHostBridgeLibSimple.inf b/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciHostBridgeLibSimple.inf index e29c371d7e..f9a769155b 100644 --- a/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciHostBridgeLibSimple.inf +++ b/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciHostBridgeLibSimple.inf @@ -43,17 +43,17 @@ [Pcd] gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress - gMinPlatformModuleTokenSpaceGuid.PcdPciReservedIobase - gMinPlatformModuleTokenSpaceGuid.PcdPciReservedIoLimit - gMinPlatformModuleTokenSpaceGuid.PcdPciReservedMemBase - gMinPlatformModuleTokenSpaceGuid.PcdPciReservedMemLimit - gMinPlatformModuleTokenSpaceGuid.PcdPciReservedMemAbove4GBBase - gMinPlatformModuleTokenSpaceGuid.PcdPciReservedMemAbove4GBLimit - gMinPlatformModuleTokenSpaceGuid.PcdPciReservedPMemBase - gMinPlatformModuleTokenSpaceGuid.PcdPciReservedPMemLimit - gMinPlatformModuleTokenSpaceGuid.PcdPciReservedPMemAbove4GBBase - gMinPlatformModuleTokenSpaceGuid.PcdPciReservedPMemAbove4GBLimit - gMinPlatformModuleTokenSpaceGuid.PcdPciDmaAbove4G - gMinPlatformModuleTokenSpaceGuid.PcdPciNoExtendedConfigSpace - gMinPlatformModuleTokenSpaceGuid.PcdPciResourceAssigned + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedIobase + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedIoLimit + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemBase + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemLimit + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBBase + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBLimit + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedPMemBase + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedPMemLimit + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedPMemAbove4GBBase + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedPMemAbove4GBLimit + gMinPlatformPkgTokenSpaceGuid.PcdPciDmaAbove4G + gMinPlatformPkgTokenSpaceGuid.PcdPciNoExtendedConfigSpace + gMinPlatformPkgTokenSpaceGuid.PcdPciResourceAssigned diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf index 2afb3163ff..e67cc0ff24 100644 --- a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf +++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf @@ -41,23 +41,23 @@ UefiCpuPkg/UefiCpuPkg.dec [Pcd] - gMinPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdFlashAreaSize ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPostMemoryBase ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPostMemorySize ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdFlashFvUefiBootBase ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdFlashFvUefiBootSize ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdFlashFvOsBootBase ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdFlashFvOsBootSize ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdStopAfterDebugInit - gMinPlatformModuleTokenSpaceGuid.PcdStopAfterMemInit + gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootBase ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootBase ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit [FixedPcd] - gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiReservedMemorySize ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize ## CONSUMES - gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize ## CONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize ## CONSUMES [Sources] PlatformInitPreMem.c diff --git a/Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/DxeTestPointCheckLib.inf b/Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/DxeTestPointCheckLib.inf index 35cd825259..015aa579d8 100644 --- a/Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/DxeTestPointCheckLib.inf +++ b/Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/DxeTestPointCheckLib.inf @@ -110,4 +110,4 @@ gEfiSmmUsbDispatch2ProtocolGuid [Pcd] - gMinPlatformModuleTokenSpaceGuid.PcdTestPointIbvPlatformFeature + gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature diff --git a/Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf b/Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf index ad5461e451..d218adb2c5 100644 --- a/Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf +++ b/Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf @@ -52,7 +52,7 @@ PeiCheckDmaProtection.c [Pcd] - gMinPlatformModuleTokenSpaceGuid.PcdTestPointIbvPlatformFeature + gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature [Guids] gEfiHobMemoryAllocStackGuid diff --git a/Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/SmmTestPointCheckLib.inf b/Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/SmmTestPointCheckLib.inf index 2dd81ba261..9fc592bbf8 100644 --- a/Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/SmmTestPointCheckLib.inf +++ b/Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/SmmTestPointCheckLib.inf @@ -53,7 +53,7 @@ TestPointHelp.c [Pcd] - gMinPlatformModuleTokenSpaceGuid.PcdTestPointIbvPlatformFeature + gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature [Guids] gEdkiiPiSmmMemoryAttributesTableGuid -- cgit v1.2.3