From 13fd0d50b5f53a6a3cc0b294593ef8500cd9b985 Mon Sep 17 00:00:00 2001 From: rsun3 Date: Mon, 8 Nov 2010 07:36:12 +0000 Subject: Per the UEFI spec, if a PCI controller is a P2P bridge, then the I/O, Memory and Bus Master bits in the Command register of the PCI configuration header should be placed in the enabled state by the PCI Bus driver. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit But current PCI bus driver has a bug that if a P2P bridge has no child devices detected during enumeration, the bits won’t be set. This may impact PCI hot plug capable bridges because the OS may re-assign resources for them causing the reserved resource by the firmware will be overwritten. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11013 6f19259b-4bc3-4df7-8a09-765794883524 --- MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c index 1ad863c966..d0b17250e0 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c @@ -694,7 +694,7 @@ StartPciDevicesOnBridge ( // // If it is a PPB // - if (!IsListEmpty (&PciIoDevice->ChildList)) { + if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) { Status = StartPciDevicesOnBridge ( Controller, PciIoDevice, @@ -746,7 +746,7 @@ StartPciDevicesOnBridge ( (*NumberOfChildren)++; } - if (!IsListEmpty (&PciIoDevice->ChildList)) { + if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) { Status = StartPciDevicesOnBridge ( Controller, PciIoDevice, -- cgit v1.2.3