From 3a6119e1bed47febdfafc465136f59659c42d385 Mon Sep 17 00:00:00 2001 From: zwei4 Date: Tue, 9 May 2017 17:33:16 +0800 Subject: Extend IBB region. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 --- Platform/BroxtonPlatformPkg/BuildBios.bat | 4 ++-- Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc | 2 +- Platform/BroxtonPlatformPkg/PlatformPkg.fdf | 6 +++--- .../ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw | Bin 1556 -> 1556 bytes .../Cpu/ResetVector/Vtf0/Ia32/InitNEM.asm | 2 +- 5 files changed, 7 insertions(+), 7 deletions(-) diff --git a/Platform/BroxtonPlatformPkg/BuildBios.bat b/Platform/BroxtonPlatformPkg/BuildBios.bat index b57188d349..80de2f47b5 100644 --- a/Platform/BroxtonPlatformPkg/BuildBios.bat +++ b/Platform/BroxtonPlatformPkg/BuildBios.bat @@ -410,9 +410,9 @@ copy /y/b %BUILD_PATH%\FV\FvOBBY.fv %Storage_Folder% >nul if /i "%FSP_WRAPPER%" == "TRUE" ( if %Stepping%==B ( -:: 0xFEF63000 = gIntelFsp2WrapperTokenSpaceGuid.PcdFlashFvFspBase = $(CAR_BASE_ADDRESS) + $(BLD_RAM_DATA_SIZE) + $(FSP_RAM_DATA_SIZE) + $(FSP_EMP_DATA_SIZE) + $(BLD_IBBM_SIZE) +:: 0xFEF7A000 = gIntelFsp2WrapperTokenSpaceGuid.PcdFlashFvFspBase = $(CAR_BASE_ADDRESS) + $(BLD_RAM_DATA_SIZE) + $(FSP_RAM_DATA_SIZE) + $(FSP_EMP_DATA_SIZE) + $(BLD_IBBM_SIZE) pushd %WORKSPACE%\Silicon\BroxtonSoC\BroxtonFspPkg\ApolloLakeFspBinPkg\FspBin - python %WORKSPACE%\Core\IntelFsp2Pkg\Tools\SplitFspBin.py rebase -f ApolloLakeFsp.fd -c m -b 0xFEF63000 -o .\ -n FSP.fd + python %WORKSPACE%\Core\IntelFsp2Pkg\Tools\SplitFspBin.py rebase -f ApolloLakeFsp.fd -c m -b 0xFEF7A000 -o .\ -n FSP.fd python %WORKSPACE%\Core\IntelFsp2Pkg\Tools\SplitFspBin.py split -f FSP.fd -o .\ -n FSP.Fv popd copy /y/b %WORKSPACE%\Silicon\BroxtonSoC\BroxtonFspPkg\ApolloLakeFspBinPkg\FspBin\FSP_T.Fv %Storage_Folder%\FSP_T.Fv diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc index ff751c164f..842acf3085 100644 --- a/Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc +++ b/Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc @@ -153,7 +153,7 @@ DEFINE FSP_IBBL_SIZE = 0x2000 DEFINE BLD_IBBL_SIZE = 0x6000 DEFINE FSP_IBBM_SIZE = 0x58000 - DEFINE BLD_IBBM_SIZE = 0x1E000 + DEFINE BLD_IBBM_SIZE = 0x35000 DEFINE CAR_BASE_ADDRESS = 0xFEF00000 # @PcdTemporaryRamBase DEFINE BLD_RAM_DATA_SIZE = 0x16000 # BOOTLOADER temp memory size diff --git a/Platform/BroxtonPlatformPkg/PlatformPkg.fdf b/Platform/BroxtonPlatformPkg/PlatformPkg.fdf index 3b4d9e7801..7522153a3e 100644 --- a/Platform/BroxtonPlatformPkg/PlatformPkg.fdf +++ b/Platform/BroxtonPlatformPkg/PlatformPkg.fdf @@ -19,10 +19,10 @@ #========================================================================================== # 3MB BIOS Layout Definition #========================================================================================== - DEFINE FLASH_BASE = 0xFFD00000 #The base address of the 3MB FLASH Device. - DEFINE FLASH_SIZE = 0x00300000 #The flash size in bytes of the 3MB FLASH Device + DEFINE FLASH_BASE = 0xFFCE9000 #The base address of the 3MB FLASH Device. + DEFINE FLASH_SIZE = 0x00317000 #The flash size in bytes of the 3MB FLASH Device DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 3MB FLASH Device. - DEFINE FLASH_NUM_BLOCKS = 0x300 #The number of blocks in 3MB FLASH Device. + DEFINE FLASH_NUM_BLOCKS = 0x317 #The number of blocks in 3MB FLASH Device. !else #========================================================================================== # 5MB BIOS Layout Definition diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/Cpu/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw b/Silicon/BroxtonSoC/BroxtonSiPkg/Cpu/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw index f1fc0417a9..2cb2466ed5 100644 Binary files a/Silicon/BroxtonSoC/BroxtonSiPkg/Cpu/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw and b/Silicon/BroxtonSoC/BroxtonSiPkg/Cpu/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw differ diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/Cpu/ResetVector/Vtf0/Ia32/InitNEM.asm b/Silicon/BroxtonSoC/BroxtonSiPkg/Cpu/ResetVector/Vtf0/Ia32/InitNEM.asm index 28560ab89f..12d274676c 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/Cpu/ResetVector/Vtf0/Ia32/InitNEM.asm +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/Cpu/ResetVector/Vtf0/Ia32/InitNEM.asm @@ -183,7 +183,7 @@ istruc HobStruc dd 0x00100000 ; .CarSize dd 0xFFF00000 ; .IBBSource = Not used dd 0xFEF45000 ; .IBBBase = .CarBase - dd 0x00076000 ; .IBBSize = size of (FVIBBM.fv+FSP_M.fv) = BLD_IBBM_SIZE + FSP_IBBM_SIZE = 0x76000 + dd 0x0008D000 ; .IBBSize = size of (FVIBBM.fv+FSP_M.fv) = BLD_IBBM_SIZE + FSP_IBBM_SIZE = 0x8D000 dd 0xFFFFF000 ; .IBBLSource = 0x100000000 - .IBBLSize = PcdFlashFvIBBLBase dd 0xFEF40000 ; .IBBLBase = .IBBBase + .IBBSize dd 0x00001000 ; .IBBLSize = PcdFlashFvIBBLSize = FLASH_REGION_FV_IBBL_SIZE in .fdf -- cgit v1.2.3