From 472adcec6fc2d4c5bf94f140781bd4f9dd18785b Mon Sep 17 00:00:00 2001 From: Jeff Fan Date: Sat, 5 Sep 2015 02:19:52 +0000 Subject: UefiCpuPkg/MtrrLib: MtrrValidBitsMask and MtrrValidAddressMask wrong Per IA32 SDM, if CPUID.80000008H is not available, software may assume that the processor supports a 36-bit physical address size. However, for such old processors (For example, Quark processor), MtrrValidBitsMask and MtrrValidAddressMask values are reverted and wrong in MtrrLib. MtrrValidBitsMask should be 0xFFFFFFFFFULL and MtrrValidAddressMask should be 0xFFFFFF000ULL. (Sync patch r18396 from main trunk.) Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan Reviewed-by: Jiewen Yao git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18399 6f19259b-4bc3-4df7-8a09-765794883524 --- UefiCpuPkg/Library/MtrrLib/MtrrLib.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c b/UefiCpuPkg/Library/MtrrLib/MtrrLib.c index d9449bcca5..a65560542c 100644 --- a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c +++ b/UefiCpuPkg/Library/MtrrLib/MtrrLib.c @@ -1,7 +1,7 @@ /** @file MTRR setting library - Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.
+ Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at @@ -840,8 +840,8 @@ MtrrLibInitializeMtrrMask ( *MtrrValidBitsMask = LShiftU64 (1, PhysicalAddressBits) - 1; *MtrrValidAddressMask = *MtrrValidBitsMask & 0xfffffffffffff000ULL; } else { - *MtrrValidBitsMask = MTRR_LIB_CACHE_VALID_ADDRESS; - *MtrrValidAddressMask = 0xFFFFFFFF; + *MtrrValidBitsMask = MTRR_LIB_MSR_VALID_MASK; + *MtrrValidAddressMask = MTRR_LIB_CACHE_VALID_ADDRESS; } } -- cgit v1.2.3